ST56034ARMG [MICROCHIP]

MUX/DEMUX, QCC32;
ST56034ARMG
型号: ST56034ARMG
厂家: MICROCHIP    MICROCHIP
描述:

MUX/DEMUX, QCC32

ATM 异步传输模式 电信 电信集成电路
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SY56034AR  
Low Voltage 1.2V/1.8V/2.5V 2:6 MUX with  
Crosspoint Capability 5GHz/6.4Gbps  
General Description  
The SY56034AR is a fully differential, low voltage  
1.2V/1.8V/2.5V CML 2:6 (2+4) MUX with crosspoint  
capability. The SY56034AR can process clock signals  
as fast as 5GHz or data patterns up to 6.4Gbps.  
Precision Edge®  
Features  
1.2V/1.8V/2.5V CML 2:6 (2+4) MUX with Crosspoint  
The differential input includes Micrel’s unique, 3-pin  
input termination architecture that interfaces to  
LVPECL, LVDS or CML differential signals as small  
as 100mV (200mVpp) without any level-shifting or  
termination resistor networks in the signal path. For  
AC-coupled input interface applications, an internal  
voltage reference is provided to bias the VT pin. The  
outputs are 400mV CML, with extremely fast rise/fall  
times guaranteed to be less than 80ps.  
Capability  
Guaranteed AC performance over temperature and  
voltage:  
– DC-to- > 6.4Gbps throughput  
– <300ps propagation delay (IN-to-Q)  
– <25ps Output skew  
– <80ps rise/fall times  
Ultra-low jitter design  
– <1psRMS cycle-to-cycle jitter  
– <10psPP total jitter  
– <1psRMS random jitter  
– <10psPP deterministic jitter  
High-speed CML outputs  
The SY56034AR operates from a 2.5V ±5% core  
supply and a 1.2V/1.8V/2.5V ±5% output supply and  
is guaranteed over the full industrial temperature  
range (–40°C to +85°C). The SY56034AR is part of  
Micrel’s high-speed, Precision Edge® product line.  
Datasheets and support documentation can be found  
on Micrel’s web site at: www.micrel.com.  
2.5V ±5% , 1.2V/1.8V/2.5V ±5% power supply  
operation  
Industrial temperature range: –40°C to +85°C  
Available in 32-pin QFN package  
Functional Block Diagram  
Applications  
Data Distribution: OC-48, OC-48+FEC  
SONET clock and data distribution  
Fibre Channel clock and data distribution  
Gigabit Ethernet clock and data distribution  
Markets  
Storage  
ATE  
Test and measurement  
Enterprise networking equipment  
High-end servers  
Access  
Metro area network equipment  
Precision Edge is a registered trademark of Micrel, Inc.  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
Micrel, Inc.  
SY56034AR  
Ordering Information(1)  
Part Number  
SY56034ARMG  
SY56034ARMGTR(2)  
Notes:  
Package  
Type  
Operating  
Range  
Package Marking  
Lead  
Finish  
QFN-32  
Industrial  
56034AR with Pb-Free  
bar-line indicator  
NiPdAu  
Pb-Free  
QFN-32  
Industrial  
56034AR with Pb-Free  
bar-line indicator  
NiPdAu  
Pb-Free  
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.  
2. Tape and Reel.  
Pin Configuration  
32-Pin QFN  
Truth Table  
SEL0  
SEL1  
Bank1  
IN0  
Bank2  
IN0  
L
L
L
H
L
IN0  
IN1  
H
H
IN1  
IN0  
H
IN1  
IN1  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
2
Micrel, Inc.  
SY56034AR  
Pin Description  
Pin Number  
Pin Name  
IN0, /IN0  
IN1,/IN1  
Pin Function  
2,3  
6,7  
Differential Inputs: These input pairs are the differential signal inputs to the device.  
They accept differential signals as small as 100mV (200mVPP). Each input pin  
internally terminates with 50Ω to the VT pin.  
1
8
VT0  
VT1  
Input Termination Center-Tap: Each side of the differential input pair terminates to a  
VT pin. This pin provides a center-tap to a termination network for maximum  
interface flexibility. An internal high impedance resistor divider biases VT to allow  
input AC-coupling. For AC-coupling, bypass VT with a 0.1µF low ESR capacitor to  
VCC. See “Interface Applications” subsection and Figure 2a.  
4
5
SEL0  
SEL1  
These single-ended TTL/CMOS-compatible inputs select the inputs to the  
crosspoint switch. Note that each of these inputs is internally connected to a 25kΩ  
pull-up resistor and will default to a logic HIGH state if left open.  
10, 31  
VCC  
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to  
the VCC pin as possible. Supplies input and core circuitry.  
11,16,18,  
23,25,30  
VCCO  
Output Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCCO  
pins as possible. Supplies the output buffer.  
9,17,24,32  
GND,  
Exposed pad  
Ground: Exposed pad must be connected to a ground plane that is the same  
potential as the ground pin.  
29,28  
27,26  
22,21  
20,19  
15,14  
13,12  
Q0, /Q0  
Q1, /Q1  
Q2, /Q2  
Q3, /Q3  
Q4, /Q4  
Q5, /Q5  
CML Differential Output Pairs: Differential buffered copy of the selected input signal.  
The output swing is typically 390mV. See “Interface Applications” subsection for  
termination information. Output pairs Q0 to Q3 belong to Bank 1. Q4 and Q5 belong  
to Bank 2.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
3
Micrel, Inc.  
SY56034AR  
Absolute Maximum Ratings(1)  
Operating Ratings(2)  
Supply Voltage (VCC)............................... –0.5V to +3.0V  
Supply Voltage (VCCO) ............................. –0.5V to +2.7V  
VCC - VCCO ...............................................................<1.8V  
VCCO - VCC ...............................................................<0.5V  
Input Voltage (VIN)............................–0.5V to VCC + 0.5V  
CML Output Voltage (VOUT)............... 0.6V to VCCO+0.5V  
Current (VT)  
Supply Voltage (VCC)..........................2.375V to 2.625V  
(VCCO) ..........................1.14V to 2.625V  
Ambient Temperature (TA) ................... –40°C to +85°C  
Package Thermal Resistance(3)  
QFN  
Still-air (θJA)............................................ 50°C/W  
Junction-to-board (ψJB) ......................... 20°C/W  
Source or sink current on VT pin.................±100mA  
Input Current  
Source or sink current on (IN, /IN).................±50mA  
Maximum operating Junction Temperature ..........125°C  
Lead Temperature (soldering, 20sec.)..................260°C  
Storage Temperature (Ts) ....................–65°C to +150°C  
DC Electrical Characteristics(4)  
TA = –40°C to +85°C, unless otherwise stated.  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
VCC  
Power Supply Voltage Range  
VCC  
2.375  
1.14  
1.7  
2.5  
1.2  
1.8  
2.5  
2.625  
1.26  
1.9  
V
V
V
V
VCCO  
VCCO  
VCCO  
2.375  
2.625  
ICC  
Power Supply Current  
Power Supply Current  
Max. VCC  
100  
96  
140  
126  
mA  
mA  
ICCO  
RIN  
No Load. Max VCCO  
Input Resistance  
(IN-to-VT, /IN-to-VT )  
45  
90  
50  
55  
RDIFF_IN  
VIH  
Differential Input Resistance  
(IN-to-/IN)  
100  
110  
Input HIGH Voltage  
(IN, /IN)  
IN, /IN  
1.2  
0.2  
VCC  
V
V
Input LOW Voltage  
(IN, /IN)  
VIH–0.1  
VIL  
VIH  
VIL with VIH = 1.2V  
IN, /IN  
Input HIGH Voltage  
(IN, /IN)  
1.14  
0.66  
VCC  
V
V
Input LOW Voltage  
(IN, /IN)  
VIH–0.1  
VIL  
VIN  
VIL with VIH = 1.14V (1.2V-5%)  
see Figure 3a  
Input Voltage Swing  
(IN, /IN)  
0.1  
0.2  
1.0  
V
VDIFF_IN  
Differential Input Voltage Swing  
(|IN - /IN|)  
see Figure 3b  
2.0  
V
V
VT_IN  
Voltage from Input to VT  
1.28  
Notes:  
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not  
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions  
for extended periods may affect device reliability.  
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.  
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. ψJB and θJA  
values are determined for a 4-layer board in still-air number, unless otherwise stated. The circuit is designed to meet the DC specifications shown  
in the above table after thermal equilibrium has been established.  
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
4
Micrel, Inc.  
SY56034AR  
CML Outputs DC Electrical Characteristics(5)  
VCCO = 1.14V to 1.26V, RL = 50Ω to VCCO,  
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100across the outputs.  
VCC = 2.375V to 2.625V. TA = –40°C to +85°C, unless otherwise stated.  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
VCCO  
475  
950  
55  
Units  
V
VOH  
Output HIGH Voltage  
Output Voltage Swing  
RL = 50Ω to VCCO  
See Figure 3a  
VCCO-0.020 VCCO-0.010  
VOUT  
300  
600  
45  
390  
780  
50  
mV  
mV  
VDIFF_OUT  
ROUT  
Differential Output Voltage Swing See Figure 3b  
Output Source Impedance  
LVTTL/CMOS DC Electrical Characteristics(5)  
VCC = 2.5V ±5%. TA = –40°C to +85°C, unless otherwise stated.  
Symbol  
VIH  
Parameter  
Condition  
Min  
Typ  
Max  
VCC  
0.8  
30  
Units  
V
Input HIGH Voltage  
Input LOW Voltage  
Input HIGH Current  
Input LOW Current  
2.0  
VIL  
V
IIH  
-125  
-300  
µA  
µA  
IIL  
Note:  
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
5
Micrel, Inc.  
SY56034AR  
AC Electrical Characteristics  
VCCO = 1.14V to 1.26V, RL = 50Ω to VCCO,  
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100Ω across the outputs.  
VCC = 2.375V to 2.625V. TA = –40°C to +85°C, unless otherwise stated.  
Symbol  
Parameter  
Condition  
Min  
6.4  
5
Typ  
Max  
Units  
Gbps  
GHz  
ps  
fMAX  
Maximum Frequency  
NRZ Data  
VOUT > 200mV  
Clock  
tPD  
Propagation Delay  
IN-to-Q Figure 1  
150  
100  
220  
200  
5
300  
300  
15  
25  
20  
75  
1
SEL-to-Q  
Figure 1  
ps  
tSkew  
Input-to-Input Skew  
Output-to-Output skew  
Output-to-Output skew  
Part-to-Part Skew  
Note 6  
ps  
Note 7, All Outputs or Q0-Q3  
7
ps  
Note 7, Q4-Q5  
Note 8  
4
ps  
ps  
tJitter  
Data  
Random Jitter  
Deterministic Jitter  
Note 9  
psRMS  
psPP  
psRMS  
psPP  
psPP  
Note 10  
10  
1
Clock  
Cycle-to-Cycle Jitter Note 11  
Total Jitter Note 12  
10  
0.7  
Crosstalk Induced Jitter Note 13  
(Adjacent Channel)  
tR, tF  
Output Rise/Fall Times  
(20% to 80%)  
At full output swing.  
20  
60  
80  
ps  
≤4GHz Differential I/O  
47  
45  
53  
55  
%
%
Duty Cycle  
<5GHz Differential I/O  
Notes:  
6. Input-to-Input skew is the difference in time between both inputs, measured at the same output, for the same temperature, voltage and  
transition.  
7. Output-to-Output skew is the difference in time between both outputs, receiving data from the same input, for the same temperature, voltage and  
transition.  
8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the  
respective inputs.  
9. Random jitter is measured with a K28.7 pattern, measured at ≤ f  
.
MAX  
10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern.  
11. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER  
_CC = Tn –Tn+1,  
where T is the time between rising edges of the output signal.  
12. Total jitter definition: with an ideal clock input frequency of fMAX (device), no more than one output edge in 1012 output edges will deviate by  
more than the specified peak-to-peak jitter value.  
13. Crosstalk-induced jitter is defined as the added jitter that results from signals applied to the adjacent channel. It is measured at the output while  
applying a similar, differential clock frequency to both inputs that is asynchronous with respect to each other.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
6
Micrel, Inc.  
SY56034AR  
Interface Applications  
CML Output Termination with VCCO 1.8V, 2.5V  
For Input Interface Applications, see Figures 4a  
through 4f. For CML Output Termination, see Figures  
5a through Figure 5d.  
For VCCO of 1.8V or 2.5V, Figure 5a and Figure 5b,  
terminate with either 50 -to-1.8V or 100  
differentially across the outputs. AC- or DC-coupling  
is fine. See Figure 5c for AC-coupling.  
CML Output Termination with VCCO 1.2V  
For VCCO of 1.2V, Figure 5a, terminate the output  
with 50-to-1.2V, DC coupled, not 100Ω differentially  
across the outputs.  
Input AC-Coupling  
The SY56034AR input can accept AC-coupling from  
any driver. Bypass VT with a 0.1µF low ESR capacitor  
to VCC as shown in Figures 4c and 4d. VT has an  
internal high impedance resistor divider as shown in  
Figure 2a, to provide a bias voltage for AC-coupling.  
If AC-coupling is used, Figure 5d, terminate into 50-  
to-1.2V before the coupling capacitor and then  
connect to a high value resistor to a reference  
voltage.  
Do not AC couple with internally terminated receiver.  
For example, 50 ANY -IN input. AC-coupling will  
offset the output voltage by 200mV and this offset  
voltage will be too low for proper driver operation. Any  
unused output pair needs to be terminated when  
VCCO is 1.2V, do not leave floating.  
Timing Diagrams  
Figure 1. Propagation Delay  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
7
Micrel, Inc.  
SY56034AR  
Typical Characteristics  
VCC = 2.5V, VCCO =1.2V, GND = 0V, VIN = 100mV, RL = 50Ω to 1.2V, TA = 25°C, unless otherwise stated.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
8
Micrel, Inc.  
SY56034AR  
Functional Characteristics  
VCC = 2.5V, VCCO =1.2V, GND = 0V, VIN = 400mV, RL = 50Ω to 1.2V, TA = 25°C, unless otherwise stated.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
9
Micrel, Inc.  
SY56034AR  
Input and Output Stage  
Figure 2b. Simplified CML Output Buffer  
Figure 2a. Simplified Differential Input Buffer  
Single-Ended and Differential Swings  
Figure 3a. Single-Ended Swing  
Figure 3b. Differential Swing  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
10  
Micrel, Inc.  
SY56034AR  
Input Interface Applications  
Figure 4a. CML Interface  
(DC-Coupled, 1.8V, 2.5V)  
Option: VT may be connected to VCC  
Figure 4b. CML Interface  
(DC-Coupled, 1.2V)  
Figure 4c. CML Interface  
(AC-Coupled)  
Figure 4d. LVPECL Interface  
(AC-Coupled)  
Figure 4e. LVPECL Interface  
(DC-Coupled)  
Figure 4f. LVDS Interface  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
11  
Micrel, Inc.  
SY56034AR  
CML Output Termination  
Figure 5a. 1.2V 1.8V or 2.5V  
Figure 5b. 1.8V or 2.5V  
CML DC-Coupled Termination  
CML DC-Coupled Termination  
Figure 5d. CML AC-Coupled Termination  
(VCCO 1.2V only)  
Figure 5c. CML AC-Coupled Termination  
(VCCO 1.8V or 2.5V only)  
Related Product and Support Documents  
Part Number  
Function  
Datasheet Link  
HBW Solutions  
New Products and Termination Application Notes  
http://www.micrel.com/page.do?page=/product-  
info/as/HBWsolutions.shtml  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
12  
Micrel, Inc.  
SY56034AR  
Package Information  
32-Pin QFN  
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com  
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for  
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a  
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for  
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant  
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk  
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.  
© 2008 Micrel, Incorporated.  
M9999-093008-A  
hbwhelp@micrel.com or (408) 955-1690  
September 2008  
13  

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