SY88773VEYTR [MICROCHIP]
ATM/SONET/SDH SUPPORT CIRCUIT, PDSO10, LEAD FREE, MSOP-10;
| 型号： | SY88773VEYTR |
| 厂家： | 
MICROCHIP |
| 描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PDSO10, LEAD FREE, MSOP-10 ATM 异步传输模式 电信 光电二极管 电信集成电路 |
| 文件： | 总11页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3.3V/5V 3.2Gbps CML
LOW-POWER LIMITING POST
AMPLIFIER WITH TTL LOS
SY88773V
DESCRIPTION
FEATURES
■ Multi-rate up to 3.2Gbps operation
■ Wide gain-bandwidth product
• 38dB differential gain
The SY88773V low-power, limiting post amplifier is
designed for use in fiber optic receivers. The device connects
to typical transimpedance amplifiers (TIAs). The linear signal
output from TIAs can contain significant amounts of noise
and may vary in amplitude over time. The SY88773V
• 2GHz 3dB bandwidth
quantizes these signals and outputs typically 800mV
voltage-limited waveforms.
The SY88773V operates from a single +3.3V ±10% or
+5V ±10% power supply, over an industrial temperature
range of –40°C to +85°C. With its wide bandwidth and high
gain, signals with data rates up to 3.2Gbps and as small as
PP
■ Low noise 50Ω CML data outputs
• 800mV output swing
PP
• 60ps edge rates
• 5ps
typ. random jitter
(RMS)
• 15ps
typ. deterministic jitter
10mV can be amplified to drive devices with CML inputs
pp
(PP)
or AC-coupled PECL inputs.
■ Chatter-free, Loss-of-Signal (LOS) output
• 4.6dB electrical hysteresis
The SY88773V incorporates a loss-of-signal (LOS), open-
collector TTL output with internal 4.75kΩ pull-up resistor. A
programmable, loss-of-signal level set pin (LOSLVL) sets
the sensitivity of the input amplitude detection. LOS asserts
high if the input amplitude falls below the threshold set by
LOSLVL and de-asserts low otherwise. LOS can be fed
back to the enable (/EN) input to maintain output stability
under a loss-of-signal condition. /EN de-asserts the true
output signal without removing the input signal. Typically
4.6dB LOS hysteresis is provided to prevent chattering.
Please see Micrel’s website at www.micrel.com for a
complete selection of optical module ICs. The following table
summarizes the differences between devices in Micrel’s
latest family of Limiting Amplifiers.
• OC-TTL output with internal 4.75kΩ pull-up
resistor
■ Programmable LOS sensitivity using single external
resistor
■ Integrated input bias reference
■ TTL /EN input allows feedback from LOS
■ Wide operating range
• Single 3.3V ±10% or 5V ±10% power supply
• –40°C to +85°C industrial temperature range
■ Available in tiny 10-pin EPAD-MSOP and
All support documentation can be found on Micrel’s web
site at www.micrel.com.
16-pin MLF™ packages
Integrated 50Ω
Part Number Input Termination or SD or HIGH Enable
LOS
Active LOW
APPLICATIONS
SY88773V
SY88823V
SY88843V
SY88973V
No
LOS
SD
LOW
HIGH
HIGH
LOW
■ 1.25Gbps and 2.5Gbps Gigabit Ethernet
■ 1.062Gbps and 2.125Gbps Fibre Channel
No
Yes
Yes
SD
■ 155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/
SDH
LOS
■ Gigabit interface converter (GBIC)
Table 1. Limiting Amplifiers Selection Guide
■ Small form factor (SFF) and small form factor
TYPICAL PERFORMANCE
pluggable (SFP) transceivers
■ Parallel 10G Ethernet
3.3V, 25°C, 10mVpp Input
@3.2Gbps 231–1 PRBS, RLOAD = 50Ω to VCC
■ High-gain line driver and line receiver
TIME (50ps/div.)
Micro LeadFrame and MLF are trademarks of Amkor Technology
Rev.: C
Amendment: /0
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
1
Issue Date: November2005
SY88773V
Micrel, Inc.
FUNCTIONAL BLOCK DIAGRAM
VCC
DOUT
DIN
Limiting
Amplifer
CML
Buffer
/DOUT
/EN
/DIN
VCC
25k
Ω
TTL
Buffer
REF
Generator
REF
Level
Detect
VCC
2.8k
Ω
4.75kΩ
OC-TTL
Buffer
LOS
LOSLVL
GND
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
2
SY88773V
Micrel, Inc.
PACKAGE/ORDERING INFORMATION
Ordering Information(1)
Package Operating
Package
Marking
Lead
Finish
Part Number
Type
Range
16 15 14 13
SY88773VKI
SY88773VKITR(2)
K10-2
Industrial
Industrial
Industrial
Industrial
Industrial
773V
773V
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Pb-Free
1
2
12
11
DIN
DOUT
GND
GND
K10-2
GND
/DIN
3
4
10
9
GND
SY88773VMI
MLF-16
MLF-16
K10-2
773V
/DOUT
SY88773VMITR(2)
SY88773VEY(3)
773V
5
6
7
8
773V with
Pb-Free bar-line indicator Matte-Sn
773V with Pb-Free
Pb-Free bar-line indicator Matte-Sn
SY88773VEYTR(2, 3)
SY88773VMG(3)
K10-2
Industrial
Industrial
Industrial
16-Pin MLF (MLF-16)
MLF-16
773V with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
/EN
1
2
3
4
5
10 VCC
SY88773VMGTR(2, 3) MLF-16
773V with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
DIN
/DIN
9
8
7
6
DOUT
/DOUT
LOS
Notes:
1. Contact factory for die availability. Dice are guaranteed at T = 25°C, DC Electricals only.
REF
A
2. Tape and Reel.
LOSLVL
GND
3. Pb-Free package is recommended for new designs.
10-Pin EPAD-MSOP (K10-2)
PIN DESCRIPTION
Pin Number
(MSOP)
Pin Number
(MLF™)
Pin Name
Type
Pin Function
1
2, 3
4
15
1, 4
6
/EN
TTL Input:
Default is high.
Enable: De-asserts true data output when high.
Incorporates 25kΩ pull-up to VCC.
DIN, /DIN
REF
Differential
Data Input
Differential Data Input. Inputs must be biased to meet
common-mode range.
Reference Voltage: Bypass with 0.01µF low ESR
capacitor from REF to VCC to stabilize LOSLVL and REF.
5
14
LOSLVL
Input:
Default is
Loss-of-Signal Level Set: A resistor from this pin to VCC
sets the threshold for the data input amplitude at which the
maximum sensitivity. LOS output will be asserted.
6
2, 3, 10, 11
GND
LOS
Ground
Device Ground. Exposed pad must be soldered
(or equivalent) to the same potential as the ground pins.
Exposed Pad Exposed Pad
7
7
Open Collector
TTL Output with
internal 4.75kΩ
pull-up resistor
Loss-of-Signal: Asserts high when the data input
amplitude falls below the threshold set by LOSLVL.
8, 9
10
9, 12
DOUT, /DOUT
VCC
Differential
CML Output
Differential Data Output.
5, 8, 13, 16
Power Supply
Positive Power Supply. Bypass with 0.1µF 0.01µF low
ESR capacitors. 0.01µF capacitors should be as close as
possible to VCC pins.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
3
SY88773V
Micrel, Inc.
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (V ) ....................................... 0V to +7.0V
Supply Voltage (V ) .............................. +3.0V to +3.6V or
CC
CC
............................................................ +4.5V to +5.5V
/EN, LOSLVL Voltage ............................................0 to V
CC
Ambient Temperature (T ) ......................... –40°C to +85°C
REF Current ...............................................................±1mA
LOS Current ...............................................................±5mA
DOUT, /DOUT Current .............................................±25mA
DIN, /DIN Current .....................................................±10mA
A
Junction Temperature (T ) ....................... –40°C to +120°C
J
(3)
Package Thermal Resistance
MLF™
θ
(Still-Air).....................................................61°C/W
................................................................................... 38°C/W
JA
Storage Temperature (T ) ....................... –65°C to +150°C
S
ψ
JB
Lead Temperature (soldering, 20 sec.) ................... +260°C
EPAD-MSOP
(Still-Air).....................................................38°C/W
θ
ψ
JA
................................................................................... 22°C/W
JB
DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C.
Symbol
Parameter
Condition
Min
Typ
Max
Units
ICC
Power Supply Current
3.3V, Note 4
5V, Note 4
28
30
42
45
mA
mA
Power Supply Current
3.3V, Note 5
5V, Note 5
45
47
62
65
mA
mA
VREF
VLOSLVL
VOH
REF Voltage
VCC–1.3
V
V
V
LOSLVL Voltage Range
DOUT, /DOUT HIGH Voltage
DOUT, /DOUT LOW Voltage
VREF
VCC
VCC
Note 6
VCC–0.020 VCC–0.005
VOL
3.3V, Note 6
5V, Note 6
VCC–0.475 VCC–0.400 VCC–0.350
VCC–0.510 VCC–0.400 VCC–0.350
V
V
VOFFSET
ZO
Differential Output Offset
Note 6
±80
mV
Ω
Single-Ended Output Impedance
Input Common Mode Range
40
50
60
VIHCMR
Note 7
GND+2.15
VCC
V
TTL DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C.
Symbol
VOH
VOL
VIH
Parameter
Condition
Min
Typ
Max
VCC
0.5
Units
LOS Output HIGH Level
LOS Output LOW Level
/EN Input HIGH Voltage
/EN Input LOW Voltage
/EN Input HIGH Current
Sourcing 100µA
Sinking 2mA
2.4
V
V
V
V
2.0
VIL
0.8
IIH
VIN = 2.7V
VIN = VCC
20
100
µA
µA
IIL
/EN Input LOW Current
VIN = 0.5V
–0.3
mA
Notes:
1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Ratlng conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Thermal performance assumes the use of 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device's most negative potential on the
PCB.
4. Excludes current of CML output stage. See “Detailed Description.”
5. Total device current with no output load.
6. Output levels are based on a 50Ω to V load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting
CC
mode.
7. The V
range is referenced to the most positive side of the differential input signal.
IHCMR
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
4
SY88773V
Micrel, Inc.
AC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C, RLOAD = 50Ω to VCC; typical values at VCC = 3.3V, TA = 25°C.
Symbol
PSRR
tr,tf
Parameter
Condition
Min
Typ
35
Max
Units
dB
Power Supply Rejection Ratio
Output Rise/Fall Time
(20% to 80%)
Note 8
Note 9
60
120
ps
tJITTER
Deterministic
Random
15
5
psPP
psRMS
VID
Differential Input Voltage Swing
Differential Output Voltage Swing
10
1800
mVPP
VOD
3.3V, Note 8
5V, Note 8
700
700
800
800
950
1020
mVPP
mVPP
HYS
tOFF
tON
LOS Hysteresis
Note 10
2
4.6
0.1
0.2
8
dB
µs
LOS Release Time
0.5
0.5
35
LOS Assert Time
µs
VSR
LOS Sensitivity Range
–3dB Bandwidth
Note 11
10
mVPP
GHz
dB
B–3dB
AV(Diff)
S21
2.0
38
32
Differential Voltage Gain
Single-Ended Small-Signal Gain
32
26
dB
Notes:
8. Amplifier in limiting mode. Input is a 200MHz square wave, t < 300ps.
r
9. Deterministic jitter measured using 2.488Gbps K28.5 pattern, V = 10mV . Random jitter measured using 2.488Gbps K28.7 pattern, V = 10mV .
PP
ID
PP
ID
10. Electrical signal.
11. This is the detectable range of input amplitudes that can assert LOS. The input amplitude to de-assert LOS is 2–8dB higher than the assert
amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular V or R for a particular LOS assert,
LOSLVL
LOSLVL
and its associated de-assert, amplitude. If increased LOS sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity
and Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/product-info/app_hints+notes.shtml.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
5
SY88773V
Micrel, Inc.
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, TA = 25°C, RLOAD = 50Ω to VCC, unless otherwise stated.
10mVpp Input @3.2Gbps 231–1 PRBS
1.8Vpp Input @3.2Gbps 231–1 PRBS
TIME (50ps/div.)
TIME (50ps/div.)
V
to Assert/De-assert LOS
V
to Assert/De-assert LOS
ID
ID
Single-Ended Small-Signal
vs. V
vs. R
LOSLVL
LOSLVL
Gain vs. Frequency
100
10
1
100
10
1
40
35
30
25
20
15
10
5
0
0
0.2 0.4 0.6 0.8 1.0 1.2
– V (V)
0.1
1
10
100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
V
R
(kΩ)
FREQUENCY (GHz)
CC
LOSLVL
LOSLVL
Differential Output Voltage
Swing vs. Temperature
Differential Output Voltage Swing
vs. Differential Input Voltage Swing
Power Supply Current
vs. Temperature
(Amplifier in Limiting Mode)
60
55
50
45
40
35
30
25
900
880
860
840
820
800
780
760
740
720
700
900
800
700
600
500
400
300
200
100
0
-40
-15
10
35
60
85
-40
-15
10
35
60
85
0
5 10 15 20 25 30 35 40 45 50
(mV
TEMPERATURE (°C)
TEMPERATURE (°C)
V
)
pp
ID
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88773V
Micrel, Inc.
DETAILED DESCRIPTION
asserts high if the input amplitude falls below the threshold
set by LOSLVL and de-asserts low otherwise. LOS can be
fed back to the enable (/EN) input to maintain output stability
under a loss-of-signal condition. /EN de-asserts low the
true output signal without removing the input signals.
Typically, 4.6dB LOS hysteresis is provided to prevent
chattering.
The SY88773V low-power, limiting post amplifier operates
from a single +3.3V or +5V power supply, over temperatures
from –40°C to +85°C. Signals with data rates up to 3.2Gbps
and as small as 10mV can be amplified. Figure 1 shows
pp
the allowed input voltage swing. The SY88773V generates
an LOS output, providing feedback to /EN for output stability.
LOSLVL sets the sensitivity of the input amplitude detection.
Loss-of-Signal Level Set
Input Amplifier/Buffer
A programmable, loss-of-signal level set pin sets the
threshold of the input amplitude detection. Connecting an
external resistor between VCC and LOSLVL sets the voltage
The SY88773V input is designed for V
as its nominal
REF
DC bias point. If AC-coupling to the SY88773V, REF can
be used as the DC bias point by externally connecting the
inputs through appropriate termination resistors to REF. If
DC-coupling to the SY88773V, ensure the upstream device’s
output swing meets the SY88773V’s common mode range.
Figure 2 shows a simplified schematic of the input structure.
The high-sensitivity of the input amplifier detects and
at LOSLVL. This voltage ranges from V
to V
. The
CC
REF
external resistor creates a voltage divider between VCC
and REF as shown in Figure 6. If desired, an appropriate
external voltage may be applied rather than using a resistor.
The relationship between V
and R
is given by:
LOSLVL
LOSLVL
amplifies signals as small as 10mV . The input amplifier
pp
RLOSLVL
RLOSLVL +2.8
VLOSLVL = VCC –1.3
allows input signals as large as 1800mV . Input signals
pp
are linearly amplified with a typically 38dB differential voltage
gain. Since it is a limiting amplifier, the SY88773V outputs
where voltages are in volts and resistances are in kΩ.
The smaller the external resistor, which implies a smaller
voltage difference from LOSLVL to VCC, the lower the LOS
sensitivity. Hence, larger input amplitude is required to de-
assert LOS. The “Typical Operating Characteristics” section
contains graphs showing the relationship between the input
typically 800mV voltage-limited waveforms for input signals
pp
that are greater than 10mV . Applications requiring the
pp
SY88773V to operate with high-gain should have the
upstream TIA placed as close as possible to the SY88773V’s
input pins to ensure the device’s best performance.
amplitude detection sensitivity and V
or R
.
LOSLVL
LOSLVL
Output Buffer
Hysteresis
The SY88773V’s CML output buffer is designed to drive
50Ω lines. The output buffer requires appropriate termination
for proper operation. An external 50Ω resistor to VCC or
equivalent for each output pin provides appropriate output
buffer termination. Figure 3 shows a simplified schematic of
the output structure and includes an appropriate termination
method. Of course, driving a downstream device with a
CML input that is internally terminated with 50Ω to VCC
eliminates the need for external termination. As noted in
The SY88773V provides typically 4.6dB LOS electrical
hysteresis. By definition, a power ratio measured in dB is
2
10log(power ratio). Power is calculated as V /R for an
IN
electrical signal. Hence, the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and,
hence, the ratios change linearly. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB given
in the datasheet. The SY88773V provides typically 2.3dB
LOS optical hysteresis. As the SY88773V is an electrical
device, this datasheet refers to hysteresis in electrical terms.
With 4.6dB LOS hysteresis, a voltage factor of 1.7 is required
to de-assert LOS.
the previous section, the amplifier outputs, typically 800mV ,
pp
waveforms across 25Ω total loads. The output buffer, thus,
switches typically 16mA tail-current. Figure 4 shows the
power supply current measurement which excludes the
16mA tail-current.
Hysteresis and Sensitivity Improvement
Loss-of-Signal
If increased LOS sensitivity and hysteresis are required,
an application note entitled “Notes on Sensitivity and
Hysteresis in Micrel Post Amplifiers” is available at http://
www.micrel.com/product-info/app_hints+notes.shtml.
The SY88773V incorporates a chatter-free, LOS open-
collector TTL output with internal 4.75kΩ pull-up resistor as
shown in Figure 5. LOS is used to determine that the input
amplitude is too small to be considered a valid input. LOS
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88773V
Micrel, Inc.
DATA+
5mV (Min.)
VIS (mV)
900mV (Max.)
DATA–
(DATA+) – (DATA–)
10mVpp (Min.)
VID (mVpp
)
1800mVpp (Max.)
Figure 1. V and V Definition
IS
ID
VCC
VCC
50Ω
0.1µF
50Ω
VCC
50Ω
50Ω
Z0 = 50Ω
Z0 = 50Ω
DOUT
/DOUT
AC-Coupling
Capacitors
DIN
/DIN
16mA
ESD
STRUCTURE
ESD
STRUCTURE
GND
GND
Figure 3. Output Structure
Figure 2. Input Structure
VCC
VCC
ICC
16mA
4.75kΩ
LOS
50Ω
50Ω
Figure 5. LOS Output Structure
ESD
STRUCTURE
VCC
RLOSLVL
16mA
LOSLVL
2.8kΩ
REF
GND
Figure 4. Power Supply Current Measurement
Figure 6. LOSLVL Setting Circuit
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
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SY88773V
Micrel, Inc.
TYPICAL APPLICATIONS CIRCUIT
VCC
LOS
DIN
/EN
0.1µF
0.1µF
0.1µF
D
OUT
From
To
CDR
Transimpedance
/DIN
/DOUT
SY88773V
Amp.
0.1µF
50Ω
LOSLVL REF
50Ω
GND
VCC
0.1µF
100kΩ
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number
Function
Data Sheet Link
SY88773V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL LOS
http://www.micrel.com/_PDF/HBW/sy88773v.pdf
http://www.micrel.com/_PDF/HBW/sy88823v.pdf
http://www.micrel.com/_PDF/HBW/sy88843v.pdf
http://www.micrel.com/_PDF/HBW/sy88973v.pdf
SY88823V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL SD
SY88843V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL SD
SY88973V
3.3V/5V 3.2Gbps CML Low-Power,
Limiting Post Amplifier w/ TTL LOS
Application Notes
Notes on Sensitivity and Hysteresis
in Micrel Post Amplifiers
http://www.micrel.com/product-info/app_hints+notes.shtml
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
9
SY88773V
Micrel, Inc.
10 LEAD EPAD-MSOP (K10-2)
+0.08
-0.08
+0.003
-0.003
+0.05
-0.05
+0.002
-0.002
+0.15
-0.15
+0.004
-0.004
+0.10
-0.10
+0.008
-0.008
+0.07
-0.08
+0.004
+0.003
+0.003
-0.004
-0.003
-0.003
+0.15
Rev.01
-0.15
+0.006
-0.006
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
10
SY88773V
Micrel, Inc.
16-PIN MicroLEADFRAME™ (MLF-16)
Package
EP- Exposed Pad
Die
CompSide Island
Heat Dissipation
Heat Dissipation
VEE
Heavy Copper Plane
Heavy Copper Plane
VEE
PCB Thermal Consideration for 16-Pin MLF™ Package
(Always solder, or equivalent, the exposed pad to the PCB)
Package Notes:
1. Package meets Level 2 qualification.
2. All parts are dry-packaged before shipment.
3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
11
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