SY89809LHH-TR [MICROCHIP]
LOW SKEW CLOCK DRIVER;
| 型号： | SY89809LHH-TR |
| 厂家： | 
MICROCHIP |
| 描述： | LOW SKEW CLOCK DRIVER 驱动 逻辑集成电路 |
| 文件： | 总7页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
®
3.3V 1:9 HIGH-PERFORMANCE,
Precision Edge
LOW-VOLTAGE BUS CLOCK DRIVER
SY89809L
FEATURES
■ 3.3V core supply, 1.8V output supply for reduced
®
Precision Edge
power
■ LVPECL and HSTL inputs
■ 9 differential HSTL (low-voltage swing) output pairs
DESCRIPTION
■ HSTL outputs drive 50Ω to ground with no
The SY89809L is a High-Performance Bus Clock Driver
with 9 differential HSTL (High-Speed Transceiver Logic)
output pairs. The part is designed for use in low-voltage
(3.3V/1.8V) applications which require a large number of
outputs to drive precisely aligned, ultralow skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low-Voltage Positive-Emitter-Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
offset voltage
■ 500MHz maximum clock frequency
■ Low part-to-part skew (200ps max.)
■ Low pin-to-pin skew (50ps max.)
■ Available in 32-pin TQFP package
LOGIC SYMBOL
CLK_SEL
The SY89809L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89809L is available in a
single space saving package, enabling a lower overall cost
solution.
HSTL_CLK
0
/HSTL_CLK
9
Q0 – Q8
9
/Q0 – /Q8
LVPECL_CLK
1
LEN
D
/LVPECL_CLK
Q
OE
APPLICATIONS
■ High-performance PCs
■ Workstations
■ Parallel processor-based systems
■ Other high-performance computing
■ Communications
TRUTH TABLE
SIGNAL GROUPS
OE(1)
CLK_SEL
Q0 – Q8
LOW
/Q0 – /Q8
HIGH
Level
HSTL
Direction
Input
Signal
0
0
1
1
0
1
0
1
HSTL_CLK, /HSTL_CLK
Q0 – Q8, /Q0 – /Q8
LOW
HIGH
HSTL
Output
Input
HSTL_CLK
LVPECL_CLK
/HSTL_CLK
/LVPECL_CLK
LVPECL
LVPECL_CLK, /LVPECL_CLK
CLK_SEL, OE
LVCMOS/LVTTL
Input
Note:
1. The OE (output enable) signal is synchronized with the low level of the
HSTL_CLK and LVPECL_CLK signal.
Precision Edge is a registered trademark of Micrel, Inc.
Rev.: E
Amendment: /0
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
1
Issue Date: September 2005
Precision Edge®
SY89809L
Micrel, Inc.
PACKAGE/ORDERING INFORMATION
Ordering Information(1)
Package Operating
Package
Marking
Lead
Finish
32 31 30 29 28 27 26 25
Part Number
Type
Range
24
VCCO
Q3
VCCI
HSTL_CLK
/HSTL_CLK
CLK_SEL
1
SY89809LTC
SY89809LTCTR(2) T32-1
T32-1
Industrial
Industrial
Industrial
SY89809LTC
SY89809LTC
Sn-Pb
Sn-Pb
2
3
23
22
21
/Q3
Top View
TQFP
T32-1
Q4
SY89809LHH T32-1
SY89809LTC with
Pb-Free bar line indicator Pb-Free
NiPdAu
4
5
6
7
8
20
19
18
17
/Q4
LVPECL_CLK
/LVPECL_CLK
GND
SY89809LHHTR(2) T32-1
Industrial
831U with Pb-Free
bar line indicator
NiPdAu
Pb-Free
Q5
/Q5
OE
VCCO
Notes:
9
10 11 12 13 14 15 16
1. Contact factory for die availability. Dice are guaranteed at T = 25°C, DC Electricals only.
A
2. Tape and Reel.
32-Pin TQFP (T32-1)
PIN DESCRIPTION
Pin Number
Pin Name
Type
Pin Function
2, 3
HSTL_CLK,
/HSTL_CLK
HSTL
Input
Differential clock input selected by CLK_SEL. Can be left floating if not
selected. Floating input, if selected produces an indeterminate output. HSTL
input signal requires external termination 50Ω to GND.
5, 6
LVPECL_CLK,
/LVPECL_CLK
LVPECL
Input
Differential clock input selected by CLK_SEL. Can be left floating. Floating
input, if selected produces a LOW at the output (internal 75Ω pull-downs).
Requires external termination. 75kΩ pull-up.
4
8
CLK_SEL
OE
LVTTL
Input
Selects HSTL_CLK input when LOW and LVPECL_CLK output when HIGH.
11kΩ pull-up.
LVTTL
Input
Enable input synchronized internally to prevent glitching of the Q0-Q8 and
/Q0-/Q8 outputs. Must be a minimum of three clock periods wide if
synchronous with the CLK inputs and must meet the tS and tH requirements
(refer to AC Electrical Characteristics). If asynchronous, must be a minimum
of four clock periods wide. 11kΩ pull-up.
31, 29, 27, 23,
21, 19, 15, 13,
11
Q0–Q8
HSTL
Output
Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and
LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated
with 50Ω to GND. Q0–Q8 outputs are static LOW when OE = LOW. Unused
output pairs may be left floating.
30, 28, 26, 22,
20, 18, 14, 12,
10
/Q0–/Q8
HSTL
Output
Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and
LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated
with 50Ω to GND. /Q0–/Q8 outputs are static HIGH when OE = LOW.
Unused output pairs may be left floating.
1
VCCI
VCC Core
Power
Core VCC connected to 3.3V supply. Bypass with 0.1µF in parallel with
0.01µF low ESR capacitors as close to VCCI pin as possible.
9, 16, 17, 24,
25, 32
VCCO
VCC Output
Power
Output Buffer VCC connected to 1.8V supply. Bypass with 0.1µF in parallel
with 0.01µF low ESR capacitors as close to VCCO pins as possible. All VCCO
pins should be connected together on the PCB.
7
GND
Ground
Ground.
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
2
Precision Edge®
SY89809L
Micrel, Inc.
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (V ) ..................................... –0.5V to V
Supply Voltage
CCI
IN
(V )............................................... +3.15V to +3.45V
V
Pin Potential to Ground Pin
CCI
CC
(V
(V
) ................................................. +1.6V to +2.0V
V
) ............................................ –0.5V to +4.0V
CCO
CCI, CCO
Ambient Temperature (T ) ......................... –40°C to +85°C
DC Output Current, Output HIGH (I
) ..................–50mA
A
OUT
Package Thermal Resistance
Lead Temperature (soldering, 20 sec.) ..................... 260°C
TQFP (θ
)
JA
Storage Temperature (T ) ....................... –65°C to +150°C
S
–Still-Air ...........................................................50°C/W
–500lfpm..........................................................42°C/W
TQFP (θ ) ..........................................................20°C/W
JC
DC ELECTRICAL CHARACTERISTICS
Power Supply
TA = 0°C
TA = +25°C
Typ.
TA = +85°C
Typ.
Symbol
VCCI
Parameter
VCC Core
Min.
3.0
1.6
—
Typ.
3.3
Max.
3.6
Min.
3.0
1.6
—
Max.
3.6
Min.
3.0
1.6
—
Max.
3.6
Unit
V
3.3
3.3
VCCO
ICCI
VCC Output
ICC Core
1.8
2.0
1.8
2.0
1.8
2.0
V
115
140
115
140
115
140
mA
HSTL
TA = 0°C
TA = +25°C
TA = +85°C
Symbol
VOH
VOL
VIH
Parameter
Min.
1.0
Typ.
—
Max.
1.2
Min.
1.0
Typ.
—
Max.
1.2
Min.
1.0
Typ.
—
Max.
1.2
Unit
V
Output HIGH Voltage(3)
Output LOW Voltage(3)
Input HIGH Voltage
Input LOW Voltage
0.2
—
0.4
0.2
—
0.4
0.2
—
0.4
V
VX +0.1
–0.3
0.68
+20
—
1.6
VX +0.1
—
—
—
—
—
1.6
VX +0.1
—
—
—
—
—
1.6
V
VIL
—
VX –0.1 –0.3
VX –0.1 –0.3
VX –0.1
0.9
V
VX
Input Crossover Voltage
Input HIGH Current
Input LOW Current
—
0.9
0.68
+20
—
0.9
0.68
+20
—
V
IIH
—
–350
–500
–350
–500
–350
–500
µA
µA
IIL
—
—
Notes:
1. Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Outputs loaded with 50Ω to ground.
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
3
Precision Edge®
Micrel, Inc.
SY89809L
DC ELECTRICAL CHARACTERISTICS (continued)
LVPECL
TA = 0°C
Min. Max.
TA = +25°C
Min. Max.
TA = +85°C
Min. Max.
Symbol
VIH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Unit
V
VCCI – 1.165 VCCI – 0.880 VCCI – 1.165 VCCI – 0.880 VCCI – 1.165 VCCI – 0.880
VCCI – 1.810 VCCI – 1.475 VCCI – 1.810 VCCI – 1.475 VCCI – 1.810 VCCI – 1.475
VIL
V
IIH
—
+150
—
+150
—
+150
µA
µA
IIL
0.5
—
0.5
—
0.5
—
LVCMOS/LVTTL
TA = 0°C
TA = +25°C
TA = +85°C
Symbol
Parameter
Min.
Typ.
—
Max.
—
Min.
2.0
—
Typ.
—
Max.
—
Min.
2.0
—
Typ.
—
Max.
—
Unit
V
VIH
VIL
IIH
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
2.0
—
—
0.8
—
0.8
—
0.8
V
+20
—
—
–250
–600
+20
—
—
–250
–600
+20
—
—
–250
–600
µA
µA
IIL
—
—
—
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
4
Precision Edge®
SY89809L
Micrel, Inc.
AC ELECTRICAL CHARACTERISTICS(4)
TA = 0°C
TA = +25°C
Typ.
TA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Max.
Min.
Typ.
Max.
Unit
tPHL
tPLH
Propagation Delay(5)
—
1.0
—
—
1.0
—
—
1.0
—
ns
fMAX
tSKEW
tSKPP
VPP
Maximum Operating Freq.(6)
Within-Device Skew(7)
Part-to-Part Skew(8)
Minimum Input Swing(9)
LVPECL_CLK
500
—
—
—
—
—
—
50
500
—
—
—
—
—
—
50
500
—
—
—
—
—
—
50
MHz
ps
—
200
—
—
200
—
—
200
—
ps
600
600
600
mV
VCMR
Common Mode Range(10)
LVPECL_CLK
–1.5
—
–0.4
–1.5
—
–0.4
–1.5
—
–0.4
V
tS
tH
OE Set-Up Time(11)
1.0
0.5
—
—
—
—
—
1.0
0.5
—
—
—
—
—
1.0
0.5
—
—
—
—
—
ns
ns
ps
OE Hold Time
tr
tf
Output Rise/Fall Time
(20% – 80%)
300
650
300
650
300
650
Notes:
4. Outputs loaded with 50Ω to ground. Airflow ≥ 300lfpm.
5. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
6. Output swing greater than 450mV.
7. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature.
8. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature.
9. The V (min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
PP
10.V
is defined as the range within which the V level may vary, with the device still meeting the propagation delay specification. The numbers in
IH
CMR
the table are referenced to V . The V level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to V (min.).
CCI
IL
PP
The lower end of the CMR range varies 1:1 with V . The V
(min) will be fixed at 3.3V – |V
(min)|.
CCI
CMR
CMR
11.OE set-up time is defined with respect to the rising edge of the clock. OE HIGH-to-LOW transition ensures outputs remain disabled during the next
clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock.
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
5
Precision Edge®
Micrel, Inc.
SY89809L
OUTPUT WAVEFORMS
VCCI = 3.0V
VCCO = 1.6V
TA = 25¡C
TIME (2ns/div)
Figure 1. 100MHz Output Waveform
VCCI = 3.0V
VCCO = 1.6V
TA = 25¡C
TIME (2ns/div)
Figure 2. 300MHz Output Waveform
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
6
Precision Edge®
SY89809L
Micrel, Inc.
32 LEAD TQFP (T32-1)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
M9999-092005
hbwhelp@micrel.com or (408) 955-1690
7
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