SY89829UHGTR [MICROCHIP]

Low Skew Clock Driver, 89829 Series, 20 True Output(s), 0 Inverted Output(s), PQFP64, LEAD FREE, TQFP-64;
SY89829UHGTR
型号: SY89829UHGTR
厂家: MICROCHIP    MICROCHIP
描述:

Low Skew Clock Driver, 89829 Series, 20 True Output(s), 0 Inverted Output(s), PQFP64, LEAD FREE, TQFP-64

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文件: 总10页 (文件大小:113K)
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®  
2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10  
OR LVPECL CLOCK DRIVER w/ INTERNAL  
TERMINATION AND REDUNDANT SWITCHOVER  
®
Precision Edge  
SY89829U  
FEATURES  
Dual 1:10 fanout buffer/translator  
Accepts LVPECL or LVDS inputs  
®
Precision Edge  
Multiplexed inputs ideal for redundant clock  
DESCRIPTION  
switchover  
Guaranteed AC parameters:  
The SY89829U is a High Performance dual 1:10 or  
single 1:20 LVPECL Clock Driver. The part is designed for  
use in low voltage (2.5V/3.3V) applications which require a  
large number of outputs to drive precisely aligned, ultra low  
skew signals to their destination. The input is multiplexed  
from either LVDS or LVPECL by the CLK_SEL pin. The  
LVDS inputs include a 100internal termination across  
the input pair, thus eliminating any need for external  
termination. The 2:1 input mux makes this device an ideal  
choice for redundant clock applications that need to switch  
between two reference clocks. The output enable (OE) is  
synchronous so that the outputs will only be enabled/  
disabled when they are already in the LOW state. This  
eliminates any chance of generating a runt clock pulse  
when the device is enabled/disabled as can happen with an  
asynchronous control.  
• > 1GHz fMAX (toggle)  
• < 50ps ch-ch skew  
LVDS input includes 100internal termination  
Low supply voltage: 2.5V, 3.3V  
–40°C to +85°C temperature range  
Output enable (OE) pin  
Available in 64 EPAD-TQFP  
APPLICATIONS  
High-performance PCs  
Workstations  
The SY89829U features low pin-to-pin skew (50ps max.)  
and low part-to-part skew (200ps max.)—performance  
previously unachievable in a standard product having such  
a high number of outputs. The SY89829U is available in a  
single space saving package which provides a lower overall  
cost solution. In addition, a single chip solution improves  
timing budgets by eliminating the multiple device solution  
with their corresponding large part-to-part skew.  
Parallel processor-based systems  
Other high-performance computing  
Communications  
Redundant LVPECL or LVDS bus clock switchover  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: November 2005  
Precision Edge®  
SY89829U  
Micrel, Inc.  
PACKAGE/ORDERING INFORMATION  
Ordering Information(1)  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
Package Operating  
Package  
Marking  
Lead  
Finish  
1
2
3
4
5
6
7
8
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
VCCO  
Q7  
/Q7  
Q8  
/Q8  
SEL2  
LVDS_CLKB  
/LVDS_CLKB  
VCCI  
LVDS_CLKA  
/LVDS_CLKA  
CLK_SEL1  
LVPECL_CLKA  
/LVPECL_CLKA  
GND  
Part Number  
Type  
H64-1  
H64-1  
H64-1  
Range  
SY89829UHI  
Industrial  
Industrial  
Industrial  
SY89829UHI  
SY89829UHI  
Sn-Pb  
Sn-Pb  
SY89829UHITR(2)  
SY89829UHG(3)  
Q9  
/Q9  
64-Pin  
EPAD-TQFP  
(Top View)  
VCCO  
VCCO  
Q10  
/Q10  
Q11  
/Q11  
Q12  
/Q12  
VCCO  
SY89829UHG with  
Pb-Free  
9
10  
11  
12  
13  
14  
15  
16  
Pb-Free bar-line indicator NiPdAu  
SY89829UHG with Pb-Free  
Pb-Free bar-line indicator NiPdAu  
OE1  
SY89829UHGTR(2, 3)  
H64-1  
Industrial  
LVPECL_CLKB  
/LVPECL_CLKB  
CLK_SEL2  
OE2  
SEL1  
Notes:  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only.  
2. Tape and Reel.  
3. Pb-Free package recommended for new designs.  
64-Pin TQFP (H64-1)  
PIN NAMES  
Pin  
Function  
LVDS_CLKA,  
/LVDS_CLKA,  
LVDS_CLKB,  
/LVDS_CLKB  
Differential LVDS Inputs with Internal 100Termination.  
LVPECL_CLKA,  
/LVPECL_CLKA  
LVPECL_CLKB,  
/LVPECL_CLKB  
Differential LVPECL Inputs. For DC-coupled input signals, terminate the input signal with 50to VCC –2V.  
For AC-coupled to VCC –2V. For AC-coupled terminate the input signal with 50to VCC –3V.  
CLK_SEL1,  
CLK_SEL2  
Input CLK Select (LVTTL).  
SEL1, SEL2  
Input Select (LVTTL).  
OE1, OE2  
Output Enable (LVTTL).  
Q0 – Q19, /Q0 – /Q19  
Differential LVPECL Outputs. Normally terminated with 50to VCC –2V. Unused output pairs can be left  
floating.  
GND  
VCCI  
Ground.  
Power Supply for Output Drivers.  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
2
Precision Edge®  
SY89829U  
Micrel, Inc.  
LOGIC SYMBOL  
CLK_SEL1  
SEL1  
OE1  
LVDS_CLKA  
0
1
/LVDS_CLKA  
10  
10  
0
1
Q0 – Q9  
LVPECL_CLKA  
/LVPECL_CLKA  
/Q0 – /Q9  
LEN  
D
LVDS_CLKB  
/LVDS_CLKB  
Q
0
1
LVPECL_CLKB  
/LVPECL_CLKB  
0
1
10  
10  
Q10 – Q19  
/Q10 – /Q19  
CLK_SEL2  
LEN  
D
SEL2  
Q
OE2  
TRUTH TABLE  
OE  
CLK_SEL1  
CLK_SEL2  
SEL1 SEL2  
Q0 – Q9  
/Q0 – /Q9  
Q10 – Q19  
/Q10 – /Q19  
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
LVDS_CLKA  
LVDS_CLKA  
LVDS_CLKB  
LVDS_CLKB  
/LVDS_CLKA  
/LVDS_CLKA  
/LVDS_CLKB  
/LVDS_CLKB  
LVDS_CLKA  
LVDS_CLKB  
LVDS_CLKA  
LVDS_CLKB  
/LVDS_CLKA  
/LVDS_CLKB  
/LVDS_CLKA  
/LVDS_CLKB  
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
LVDS_CLKA  
LVDS_CLKA  
/LVDS_CLKA  
/LVDS_CLKA  
LVDS_CLKA  
LVPECL_CLKB  
LVDS_CLKA  
/LVDS_CLKA  
/LVPECL_CLKB  
/LVDS_CLKA  
LVPECL_CLKB  
LVPECL_CLKB  
/LVPECL_CLKB  
/LVPECL_CLKB  
LVPECL_CLKB  
/LVPECL_CLKB  
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
LVPECL_CLKA  
LVPECL_CLKA  
LVDS_CLKB  
/LVPECL_CLKA  
/LVPECL_CLKA  
/LVDS_CLKB  
LVPECL_CLKA  
LVDS_CLKB  
/LVPECL_CLKA  
/LVDS_CLKB  
LVPECL_CLKA  
LVDS_CLKB  
/LVPECL_CLKA  
/LVDS_CLKB  
LVDS_CLKB  
/LVDS_CLKB  
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
LVPECL_CLKA  
LVPECL_CLKA  
LVPECL_CLKB  
LVPECL_CLKB  
/LVPECL_CLKA  
/LVPECL_CLKA  
/LVPECL_CLKB  
/LVPECL_CLKB  
LVPECL_CLKA  
LVPECL_CLKB  
LVPECL_CLKA  
LVPECL_CLKB  
/LVPECL_CLKA  
/LVPECL_CLKB  
/LVPECL_CLKA  
/LVPECL_CLKB  
0
X
X
X
X
LOW  
HIGH  
LOW  
HIGH  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
3
Precision Edge®  
SY89829U  
Micrel, Inc.  
ABSOLUTE MAXIMUM RATINGS(1)  
Symbol  
VCCI / VCCO  
VIN  
Rating  
Value  
–0.5 to +4.0  
–0.5 to VCCI  
–50  
Unit  
V
VCC Pin Potential to Ground Pin  
Input Voltage  
V
IOUT  
DC Output Current (Output HIGH)  
Lead Temperature (soldering, 20sec.)  
Storage Temperature  
mA  
°C  
°C  
TLEAD  
Tstore  
+260  
–65 to +150  
θJA  
Package Thermal Resistance (Junction-to-Ambient)  
With exposed pad soldered to GND  
– Still-Air (multi-layer PCB)  
23  
18  
15  
°C/W  
°C/W  
°C/W  
– 200lfpm (multi-layer PCB)  
– 500lfpm (multi-layer PCB)  
Exposed pad not soldered to GND  
– Still-Air (multi-layer PCB)  
– 200lfpm (multi-layer PCB)  
– 500lfpm (multi-layer PCB)  
44  
36  
30  
°C/W  
°C/W  
°C/W  
θJC  
Package Thermal Resistance  
(Junction-to-Case)  
4.3  
°C/W  
NOTE:  
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied  
at conditions other than those detailed in the operational sections of this data book. Exposure to absolute maximum rating conditions for extended  
periods may affect device reliability.  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
4
Precision Edge®  
SY89829U  
Micrel, Inc.  
DC ELECTRICAL CHARACTERISTICS  
Power Supply  
TA = –40°C  
TA = +25°C  
TA = +85°C  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
Unit  
VCCI,  
VCCO  
Power Supply(1)  
2.37  
3.6  
2.37  
3.6  
2.37  
3.6  
V
ICC  
ICC Total Supply Current(2)  
100  
150  
100  
150  
100  
150  
mA  
NOTES:  
1. V  
and V  
must be connected together on the PCB such that they remain at the same potential. V  
and V are not internally connected on the  
CCO  
CCI  
CCO  
CCI  
die.  
2. No load. Outputs floating.  
LVDS Input (VCC = 2.37V to 3.6V, GND = 0V)  
TA = –40°C  
TA = +25°C  
TA = +85°C  
Symbol  
VIN  
Parameter  
Input Voltage Range  
Differential Input Swing  
Input Low Current(1)  
Min.  
0
Typ.  
Max.  
2.4  
Min.  
0
Typ.  
Max.  
2.4  
Min.  
Typ.  
Max.  
2.4  
Unit  
V
0
VID  
100  
–1.0  
80  
100  
–1.0  
80  
100  
–1.0  
80  
mV  
mA  
IIL  
RIN  
LVDS Differential Input Resistance  
(LVDS_CLK to /LVDS_CLK)  
100  
120  
100  
120  
100  
120  
NOTE:  
1. For I , both LVDS inputs are grounded.  
IL  
LVPECL Input / Output (VCC = 2.37V to 3.6V, GND = 0V)  
TA = –40°C  
TA = +25°C  
Min. Max.  
TA = +85°C  
Symbol  
VIH  
Parameter  
Input HIGH Voltage  
Input LOW Voltage  
Min.  
Max.  
Min.  
Max.  
Unit  
V
VCC – 1.165 VCC – 0.88 VCC – 1.165 VCC – 0.88 VCC – 1.165 VCC – 0.88  
VCC – 1.945 VCC – 1.625 VCC – 1.945 VCC – 1.625 VCC – 1.945 VCC – 1.625  
VIL  
V
VPP  
Minimum Input Swing(1)  
LVPECL_CLK  
600  
600  
600  
mV  
VCMR  
Common Mode Range(2)  
LVPECL_CLK  
–1.5  
–0.4  
–1.5  
–0.4  
–1.5  
–0.4  
V
VOH  
VOL  
Output HIGH Voltage  
Output LOW Voltage  
Input HIGH Current  
Input LOW Current  
VCCO – 1.085 VCCO – 0.880 VCCO – 1.025 VCCO – 0.880 VCCO – 1.025 VCCO – 0.880  
VCCO – 1.830 VCCO – 1.555 VCCO – 1.810 VCCO – 1.620 VCCO – 1.810 VCCO – 1.620  
V
V
IIH  
150  
150  
150  
µA  
µA  
IIL  
0.5  
0.5  
0.5  
NOTES:  
1. The V (min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.  
PP  
2. V  
is defined as the range within which the V level may vary, with the device still meeting the propagation delay specification. The numbers in  
IH  
CMR  
the table are referenced to V . The V level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to V (min.).  
CCI  
IL  
PP  
The lower end of the CMR range varies 1:1 with V . The V  
(min) will be fixed at 3.3V – |V  
(min)|.  
CCI  
CMR  
CMR  
LVCMOS/LVTTL Control Input (OE1, OE2, CLK_SEL1, CLK_SEL2)  
TA = –40°C  
TA = +25°C  
TA = +85°C  
Symbol  
VIH  
Parameter  
Input HIGH Voltage  
Input LOW Voltage  
Input HIGH Current  
Input LOW Current  
Min.  
2.0  
Typ.  
Max.  
Min.  
2.0  
Typ.  
Max.  
Min.  
2.0  
Typ.  
Max. Unit  
V
V
VIL  
0.8  
0.8  
0.8  
IIH  
+20  
–250  
–600  
+20  
–250  
–600  
+20  
–250  
–600  
µA  
µA  
IIL  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
5
Precision Edge®  
SY89829U  
Micrel, Inc.  
AC ELECTRICAL CHARACTERISTICS(1)  
VCC = 2.37V to 3.6V, GND = 0V  
TA = –40°C  
TA = +25°C  
TA = +85°C  
Symbol  
fMAX  
Parameter  
Max Toggle Frequency(2)  
Propagation Delay  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
Min.  
Typ.  
Max.  
Unit  
GHz  
ns  
1
1
1
tPD  
(Differential)(3)  
LVPECL IN 0.900  
1.5  
1.7  
0.900  
1.1  
1.2  
1.5  
1.7  
0.900  
1.1  
1.5  
1.7  
LVDS IN  
1.1  
tSKEW  
Within-Device Skew(4)  
Part-to-Part Skew(5)  
OE Set-Up Time(6)  
OE Hold Time(6)  
100  
35  
200  
20  
100  
35  
200  
100  
35  
200  
ps  
ps  
ns  
ns  
ps  
tS(OE)  
tH(OE)  
1.0  
0.5  
300  
1.0  
0.5  
300  
1.0  
0.5  
300  
tr  
tf  
Output Rise/Fall Time  
(20% – 80%)  
600  
450  
600  
600  
t(switchover) Input Switchover  
CLK_SEL-to-valid output  
1.2  
1.2  
1.2  
ns  
NOTES:  
1. Outputs loaded with 50to V – 2V. Airflow 300lfpm.  
CC  
2. f  
is defined as the maximum toggle frequency measured. Measured with a 800mV input signal, output swing 200mV, and all loading with 50Ω  
MAX  
to V –2V.  
CC  
3. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential  
output signals.  
4. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same  
voltage and temperature.  
5. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same  
voltage and temperature. Part-to-part skew is the total skew difference; pin-to-pin skew + part-to-part skew.  
6. Set-up and hold time applies to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,  
set-up and hold time does not apply. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures  
outputs remain disabled during the next clock cycle. OE LOW to HIGH transition enables normal operation of the next input clock.  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
6
Precision Edge®  
SY89829U  
Micrel, Inc.  
LVDS/LVPECL INPUTS  
LVPECL Input Stage  
LVDS Input Stage  
Figure 1. Simplified LVPECL & LVDS Input Stage  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
7
Precision Edge®  
SY89829U  
Micrel, Inc.  
TYPICAL CHARACTERISTICS  
Frequency Response  
vs. Output Amplitude @ 2.5V  
Frequency Response  
vs. Output Amplitude @3.3V  
800  
800  
700  
600  
500  
400  
300  
200  
100  
0
700  
600  
500  
400  
300  
200  
100  
0
0
200 400 600 800 1000 1200  
FREQUENCY (MHz)  
0
200 400 600 800 1000 1200  
FREQUENCY (MHz)  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
8
Precision Edge®  
SY89829U  
Micrel, Inc.  
LVPECL TERMINATION RECOMMENDATIONS  
down resistor at the output of each driver. The emmiter follower  
outputs requires a DC current path to GND. Unused outputs can be  
left floating with minimal impact on skew and jitter.  
Output Considerations  
Be sure to properly terminate all outputs as shown below, or  
equivalent.ForACcoupledapplications,besuretoincludeapull  
+3.3V  
R1  
130  
R1  
130Ω  
+3.3V  
+3.3V  
Z
O = 50Ω  
Z
O = 50Ω  
R2  
82Ω  
R2  
82Ω  
V = VCC —2V  
t
Figure 1. Parallel Termination–Thevenin Equivalent  
Notes:  
1. For +2.5V systems:  
R1 = 250Ω  
R2 = 62.5Ω  
+3.3V  
+3.3V  
Z = 50  
Z = 50Ω  
“source”  
“destination”  
50Ω  
50Ω  
46to 49Ω  
R
b
Figure 2. Three-Resistor “Y–Termination”  
Notes:  
1. Power-saving alternative to Thevenin termination.  
2. Place termination resistors as close to destination inputs as possible.  
3. R resistor sets the DC bias voltage equal to V . For +3.3V systems R = 46to 50.  
b
t
b
4. Precision, low-cost 3-Resistor networks are available from resistor manufacturers such as Thin Film Technology (www.thinfilm.com).  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
9
Precision Edge®  
SY89829U  
Micrel, Inc.  
64 LEAD EPAD-TQFP (DIE UP) (H64-1)  
0.472 BSC SQ.  
4
12.00  
10.00  
+0.05  
–0.05  
1.00  
0.039  
DETAIL "A"  
+0.002  
–0.002  
6
7
0.394  
BSC SQ.  
0° MIN.  
0.20 0.008  
+0.05  
0.09 0.004  
4.50  
0.177  
–0.05  
+0.012  
–0.012  
0.15 0.006  
0.05 0.002  
64  
48  
6
48  
0°- 7°  
+0.03  
4.50 –0.03  
+0.012  
+0.15  
0.60  
0.024  
–0.15  
+0.006  
0.177  
–0.012  
–0.006  
1.00 0.039 REF.  
33  
16  
17  
32  
5
SEE DETAIL "A"  
0.50 0.020  
BSC  
0.047 MAX  
0.01 0.004  
1.20  
7
+0.05  
0.22  
0.009  
–0.05  
Rev. 03  
+0.002  
–0.002  
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com  
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.  
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can  
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into  
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s  
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify  
Micrel for any damages resulting from such use or sale.  
© 2005 Micrel, Incorporated.  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
10  

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MICROCHIP

SY89829UHYTR

2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10 OR LVPECL CLOCK DRIVER w/ INTERNAL TERMINATION AND REDUNDANT SWITCHOVER
MICREL

SY89830U

2.5V/3.3/5V 2.5GHz 1:4 PECL/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
MICREL

SY89830UK4G

2.5V/3.3/5V 2.5GHz 1:4 PECL/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
MICREL

SY89830UK4G

89830 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
MICROCHIP

SY89830UK4G-TR

LOW SKEW CLOCK DRIVER
MICROCHIP

SY89830UK4GTR

2.5V/3.3/5V 2.5GHz 1:4 PECL/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX
MICREL