TC3401VPE [MICROCHIP]
16-Bit Low Cost, Low Power Sigma-Delta A/D Converter; 16位低成本，低功耗Σ-Δ型A / D转换器
| 型号： | TC3401VPE |
| 厂家： | 
MICROCHIP |
| 描述： | 16-Bit Low Cost, Low Power Sigma-Delta A/D Converter |
| 文件： | 总16页 (文件大小：459K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TC3401
16-Bit Low Cost, Low Power Sigma-Delta A/D Converter
Features
Package Type
• 16-bit Resolution at Eight Conversions Per
Second, Adjustable Down to 10-bit Resolution at
512 Conversions Per Second
16-Pin PDIP
16-Pin QSOP
• 1.8V – 5.5V Operation, Low Power Operating
300µA; Sleep: 50µA
• microPort™ Serial Bus Requires only two
Interface Lines
16
15
14
13
12
11
10
9
IN1
1
2
3
4
5
6
7
8
V
+
DD
IN1-
IN2+
IN2-
SCLK
ADDR
• Uses Internal or External Reference
TC3401
RESET
ENABLE
PFO
• Automatically Enters Sleep Mode when not in use
• True Differential Inputs with Built-In Multiplexer
Provide Ratiometric Conversions
PFI
V
TH
• Early Warning Power Fail Detector, also suitable as
Wake-Up Timer Operational in Shutdown Mode
REF
SDAT
IN
• V Monitor and Reset Generator Operational in
DD
REF
OUT
GND
Shutdown Mode
Applications
General Description
• Consumer Electronics, Thermostats, CO
Monitors, Humidity Meters, Security Sensors
The TC3401 is a low cost, low power analog-to-digital
converter based on Microchip’s Sigma-Delta technol-
ogy. It will perform 16-bit conversions (15-bit plus sign)
at up to eight per second. The TC3401 is optimized for
use as a microcontroller peripheral in low cost, battery
operated systems. A voltage reference is included, or
• Embedded Systems, Data Loggers,
Portable Equipment
• Medical Instruments
Device Selection Table
an external reference can be used. A V monitor with
DD
a reset generator provides Power-on Reset and Brown-
out protection while an extra threshold detector is suit-
able for use as an early warning Power Fail detector, or
as a Wake-up Timer.
Part
Number
Temperature
Range
Package
TC3401VPE 16-Pin PDIP (Narrow) 0°C to +85°C
TC3401VQR 16-PinQSOPNarrow) 0°C to +85°C
The TC3401’s 2-wire microPort™ digital interface is
used for starting conversions and for reading out the
data. Driving the SCLK line low starts a conversion.
After the conversion starts, each additional falling edge
(up to six) detected on SCLK for t seconds reduces
4
the A/D resolution by one bit and cuts conversion time
in half. After a conversion is completed, clocking the
SCLK line puts the MSB through LSB of the resulting
data word onto the SDAT line, much like a shift register.
The part automatically sleeps when not performing a
data conversion.
The TC3401 is available in a 16-Pin PDIP and a 16-Pin
QSOP package.
2002 Microchip Technology Inc.
DS21410B-page 1
TC3401
Typical Application
V
BATT
V
DD
V
CC
+
–
IN1+
IN1-
ENABLE
Input 1
I/01
I/02
I/03
SDAT
SCLK
ADDR
+
–
IN2+
IN2-
Input 2
V
BATT
µ
R1
130k
Controller
V
TC3401
BATT
R6
100k
V
TH
RST
RESET
R2
110k
V
BATT
R7
100k
REF
REF
IN
I/04
I/05
PFO
PFI
OUT
R3
C1
390
V
BATT
0.1µF
10ꢀ
C2
R4
10µF
1MΩ
Functional Block Diagram
V
DD
REF
REF
OUT
1.193V
TC3401
x2
IN
IN1+
IN1-
+
Data
Shift
Reg.
Σ – ∆
Modulator
–
1 of 2
AMux
SDAT
IN2+
IN2-
+
–
SET
ADDR
D
Q
Clock
Generator
SCLK
Start
Conv.
CLR
and Control
Circuitry
ENABLE
RESET
PFO
–
V
Reset Delay
Timer
TH
+
1.23V
–
PFI
+
1.23V
GND
DS21410B-page 2
2002 Microchip Technology Inc.
TC3401
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage .....................................................6.0V
Voltage on Pins:
PFO, RESET .......................... (GND – 0.3V) to 5.5V
Input Voltage (All Other Pins):
.................................. (GND – 0.3V) to (V + 0.3V)
DD
Operating Temperature Range ................. 0°C to 85°C
Storage Temperature ........................ -65°C to +150°C
TC3401 DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA = 25°C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for
temperatures of 0°C to 85°C. VREF = 1.25V, Internal Clock Frequency = 520kHz.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Power Supply
VDD
Supply Voltage
1.8
—
—
5.5
—
V
IDD
Supply Current, During Data Conversion
Supply Current, Sleep Mode
300
50
µA
µA
µA
IDDSLEEP
—
80
TA = +25°C
—
50
130
Accuracy (Differential Inputs)
RES
INL
Resolution
—
—
—
—
—
—
—
16
.0038
—
—
—
Bits
Integral Non-Linearity
Offset Error
%FSR VDD = 2.7V
%FSR IN+, IN- = 0V
µVrms
dB
%FS
dB
VOS
±0.9
—
VNOISE
CMR
FSE
Referred to input
60
Common Mode Rejection
Full Scale Error
75
—
At DC
0.4%
75
—
PSRR
Power Supply Rejection Ratio
—
VDD = 2.5V to 3.5V
IN+, IN-
VIN
±
Differential Input Voltage
Absolute Voltage Range on IN+, IN-
Input Bias Current
—
GND
—
—
—
1
VDD
VDD
100
—
V
V
Note 1
nA
pF
MΩ
CIN
RIN
Input Sampling Capacitance
Differential Input Resistance
—
2
—
2.0
—
Note 2
REFIN, REFOUT
VREF
REFIN Voltage Range
0
—
—
1
1.25
—
V
µA
V
IREF
REFIN Input Current
VREFOUT
REFSINK
REFSRC
REFOUT Voltage
—
1.193
10
—
REFOUT Current Sink Capability
REFOUT Current Source Capability
—
—
µA
µA
300
—
—
Note 1: Differential input voltage defined as (VIN+ – VIN-).
2: Resistance from INn+ to INn- or INn to GND.
3: @ VDD = 1.8V, ISOURCE ≤ 200µA.
2002 Microchip Technology Inc.
DS21410B-page 3
TC3401
TC3401 DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: TA = 25°C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for
temperatures of 0°C to 85°C. VREF = 1.25V, Internal Clock Frequency = 520kHz.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
SCLK, ADDR, ENABLE
VIL
Input Low Voltage
Input High Voltage
Leakage Current
—
0.7 x VDD
—
—
—
1
0.3 x VDD
V
V
VIH
—
—
ILEAK
µA
SDAT, RESET, PFO
VOL
Output Low Voltage
—
0.9 x VDD
—
—
—
0.4
—
V
V
IOL = 1.5mA
ISOURCE = 400µA (Note 3)
VOH
Output High Voltage (SDAT)
VDDMIN
Minimum VDD for PFO, RESET Valid
1.1
1.3
µA
VTH, PFI
VCCPFI
PFI Input Voltage Range
VTH, PFI Input Current
Threshold (VTH, PFI)
Threshold Hysteresis
Threshold Tempco
0
-0.1
—
—
.01
1.23
30
VDD
0.1
—
V
µA
VTHR
V
—
—
mV
—
30
—
ppm/°C
Note 1: Differential input voltage defined as (VIN+ – VIN-).
2: Resistance from INn+ to INn- or INn to GND.
3: @ VDD = 1.8V, ISOURCE ≤ 200µA.
TC3401 AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA = 25°C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for
temperatures of 0°C to 85°C. VREF = 1.25V, Internal Clock Frequency = 520kHz.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
t1
t2
t3
Resolution Reduction Clock Width
Resolution Reduction Clock Width
Conversion Time (15-bit Plus Sign)
Conversion Time (14-bit Plus Sign)
Conversion Time (13-bit Plus Sign)
Conversion Time (12-bit Plus Sign)
Conversion Time (11-bit Plus Sign)
Conversion Time (10-bit Plus Sign)
Conversion Time (9-bit Plus Sign)
Resolution Reduction Window
SCLK to Data Valid
1
1
—
—
—
—
µsec Width of SCLK (Negative)
µsec Width of SCLK (Positive)
msec 16-bit Conversion, TA = 25°C (Note 1)
msec 15-bit Conversion
—
125
—
—
t3/2.0
t3/4.0
t3/7.8
t3/15.1
t3/28.6
t3/51.4
t3/85.7
—
—
—
—
msec 14-bit Conversion
—
—
msec 13-bit Conversion
—
—
msec 12-bit Conversion
—
—
msec 11-bit Conversion
—
—
msec 10-bit Conversion
t4
t5
t6
t7
t8
t9
—
—
msec Width of SCLK
1000
0
—
nsec SCLK Falling Edge to SDAT Valid
nsec Address Valid to SCLK
nsec SCLK to Address Valid Hold
nsec SCLK to SDAT Delay
Address Setup
—
—
Address Hold
1000
—
—
—
Acknowledge Delay
—
1000
—
RESET Active Time-out Period
—
t3*2
msec Delay from POR or Brown-out
Recovery to RESET = VOH
t10
t11
PFO Delay
—
5
25
—
—
µsec PFI to PFO Delay
RESET Delay
64
µsec Delay VTH Falling at 10V/msec to
RESET Low
Note 1: Nominal temperature drift is -2830ppm/C° for temperature less than 25°C and -1340ppm/°C for temperatures
greater than 25°C.
DS21410B-page 4
2002 Microchip Technology Inc.
TC3401
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin No.
(16-Pin PDIP)
(16-Pin QSOP)
Symbol
Description
1
2
3
4
5
6
IN1+
IN1-
IN2+
IN2-
PFI
Analog Input. This is the positive terminal of a true differential input consisting of IN1+ and IN1-.
IN1 = (IN1+ – IN-). See Section 1.0, Electrical Characteristics.
V
Analog Input. This is the negative terminal of a true differential input consisting of IN1+ and IN1-.
VIN1 = (IN+ – IN-) IN1- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics.
Analog Input. This is the positive terminal of a true differential input consisting of IN2+ and IN2-.
VIN2 = (IN2+ – IN-). See Section 1.0, Electrical Characteristics.
Analog Input. This is the negative terminal of a true differential input consisting of IN2+ and IN2-.
VIN2 = (IN+ – IN-) IN2- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics.
Analog Input. This is the positive input to an internal comparator used as a threshold detector
The negative input is tied to an internal reference.
VTH
Analog Input. This is the positive input to the internal comparator used to monitor the voltage supply.
The negative input is tied to an internal reference. When VTH falls below the internal reference, the
reset generator drives RESET low. See Section 1.0, Electrical Characteristics.
7
REFIN
GND
Analog Input. The converter’s reference voltage is the differential between this pin and ground times
two. It may be tied directly to REFOUT or scaled using a resistor divider. Any user supplied
reference voltage less than 1.25 may be used in place of REFOUT
.
8
9
Ground Terminal.
REFOUT Analog Output. The internal reference connects to this pin. It may be scaled externally and tied to
the REFIN input to provide the converter’s reference voltage. Care must be taken in connecting
external circuitry to this pin. This pin is in a high impedance state during Sleep mode.
10
SDAT
Digital Output (push-pull). This is the microPort™ serial data output. SDAT is driven low while the
TC3401 is converting data, effectively providing a “busy” signal. After the conversion is complete,
every high to low transition on the SCLK pin puts a bit from the resulting data word on the SDAT pin
(from MSB to LSB).
11
12
PFO
Digital Output (open drain). This is the output of the internal threshold detector. When PFI is less
than the internal reference, PFO is driven low.
ENABLE Digital Input. When this input control is pulled low, the part is internally restarted. That is, any data
conversion or data read sequence is cleared and the part goes into Sleep mode. When ENABLE
returns high, the part resumes normal operation.
13
14
RESET Digital Output (open drain). This is the output of the VDD monitor reset generator. RESET is driven low
when a Power-on Reset or Brown-out condition is detected. See Section 1.0, AC Electrical Characteristics.
ADDR
Digital Input. This input controls the analog input multiplexer to select one of two input channels.
This address is latched at the falling edge of the SCLK, which starts an A/Dconversion.
(0 = Input 1, 1 = Input 2).
15
16
SCLK
Digital Input. This is the microPort™ serial clock input. The TC3401 comes out of Sleep mode and a
conversion cycle begins when this pin is driven low. After the conversion starts, each additional
falling edge (up to six) detected on SCLK for t4 seconds reduces the A/D resolution by one bit. When
the conversion is complete, the data word can be shifted out on the SDAT pin by clocking the SCLK
pin.
VDD
Power Supply Input.
2002 Microchip Technology Inc.
DS21410B-page 5
TC3401
TABLE 3-1:
DATA CONVERSION WORD
VS. VOLTAGE INPUT
3.0
DETAILED DESCRIPTION
The TC3401 has a 16-bit sigma-delta A/D converter. It
has two differential inputs, an analog multiplexer, a V
(REF = 1.193V)
IN
DD
monitor with reset generator and an early warning
Power Fail detector. See the Typical Application circuit
and the Functional Block diagram. The key
components of the TC3401 are described below.
Data Word
INn+ – INn- (Volts)
0111 1111 1111 1111 2.38596 (Positive Full Scale)
0000 0000 0000 0001 72.8 E -6
0000 0000 0000 0000
0
Also refer to Figure 3-5, A/D Operational Flowchart and
the Timing Diagrams, Figure 3-1, Figure 3-2 and
Figure 3-3.
1111 1111 1111 1111 -72.8 E -6
1000 0000 0000 0001 -2.38596 (Negative Full Scale)
1000 0000 0000 0000 Reserved Code
3.1
A/D Converter Operation
The SCLK input has a filter which rejects any positive
or negative pulse of width less than 50nsec to reduce
noise. The rejection width of this pulse can vary
between 50nsec and 750nsec depending on process-
ing parameters and supply voltage.
When the TC3401 is not converting, it is in Sleep mode
with both the SCLK and SDAT lines high. An A/D
conversion is initiated by a high to low transition on the
SCLK line at which time the internal clock of the
TC3401 is started and the address value (ADDR) is
internally latched. The address value steers the analog
multiplexer to select the input channel to be converted.
Each additional high to low transition of SCLK (follow-
ing the initial SCLK falling edge) during the time interval
Figure 3-1 and Table 3-2 show information for deter-
mining the mode of operation for the TC3401 part by
recording the value of SDAT for SCLK in a high, then
low, then high state. For example, if SCLK goes
through a 1-0-1 transition and the corresponding
values of SDAT are 1-1-0, then the SCLK falling edge
started a new data conversion. A 0-1-0 for SDAT would
have indicated a resolution reduction had occurred.
This is useful if the microcontroller has a Watchdog
Reset or otherwise loses track of where the TC3401 is
in the conversion and data readout sequence. The
microcontroller can simply transition SCLK until it
“finds” a Start Conversion condition.
t
will decrement the conversion resolution by one bit
4,
and reduce the conversion time by one half. The time
interval t is referred to as the resolution reduction
4
window. The minimum conversion resolution is 10-bits
so any more than 6 SCLK transitions during t will be
4
ignored.
After each high to low transition of SCLK, in the t
4
interval, the SDAT output is driven high by the TC3401
to acknowledge that the resolution has been decre-
mented. When the SCLK returns high or the t interval
4
FIGURE 3-1:
SCLK, SDAT LOGIC
STATE DIAGRAM
ends, the SDAT line returns low (see Figure 3-2). When
the conversion is complete SDAT is driven high. The
TC3401 now enters Sleep mode and the conversion
value can be read as a serial data word on the SDAT
line.
SCLK
3.2
Reading the Data Word
After the conversion is complete and SDAT goes high,
the conversion value can be clocked serially onto the
SDAT line by high to low transitions of the SCLK. The
data word is in two’s compliment format with the sign bit
clocked onto the SDAT line, first followed by the MSB
and ending in the LSB. For a 16-bit conversion the data
word would consist of a sign bit followed by 15 magni-
tude bits, Table 3-1 shows the data word versus input
voltage for a 16-bit conversion. Note that the full scale
SDAT
A
B
C
TABLE 3-2:
SCLK, SDAT LOGIC STATE
A
B
C
Status
Start Conversion
1
0
x
x
1
1
1
0
0
0
1
0
input voltage range is ±(2 REF – 1LSB). When
IN
Resolution Reduction
Data Transfer
REF
is fed back directly to REF , an LSB is 73µV
OUT
IN
for a 16-bit conversion, as REF
is typically 1.193V.
OUT
Data Transfer or Busy*
Figure 3-4 shows typical SCLK and SDAT waveforms
for 16, 12 and 10-bit conversions. Note that any com-
plete convert and read cycle requires 17 negative edge
clock pulses. The first is the convert command. Then,
up to six of these can occur in the resolution reduction
*Note: The code X00 has a dual meaning: Data Transfer or
Busy converting. To avoid confusion, the user should
send only the required number of pulses for the
desired resolution, then wait for SDAT to rise to 1,
indicating conversion is complete before clocking
SCLK again to read out data bits.
window, t , to decrement resolution. The remaining
4
pulses clock out the conversion data word.
DS21410B-page 6
2002 Microchip Technology Inc.
TC3401
FIGURE 3-2:
CONVERSION AND DATA OUTPUT TIMING
t
2
t
1
SCLK
t
8
t
t
Sleep
Mode
4
5
t
8
SDAT
D
0
(LSB)
D
(MSB)
N
D
D
N-1
N-1
t
3
Data Conversion
Complete
t
t
7
6
ADDR
Start Conversion and Resolution Control Timing
Data Output Timing
FIGURE 3-3:
RESET AND POWER FAIL TIMING
V
DD
1.80
V
TH
1.23
1.20
Hysteresis
1.1
0
Time
t
t
11
t
t
9
9
11
RESET
V
Reset Generator Timing
DD
V
DD
PFI
1.23
1.20
Hysteresis
1.1
0
Time
t
t
t
t
10
10
10
10
PFO
Power Fail Comparator Timing
2002 Microchip Technology Inc.
DS21410B-page 7
TC3401
FIGURE 3-4:
SCLK AND SDAT WAVEFORMS FOR 16, 12 AND 10-BIT CONVERSIONS
16-bit Data Conversion,
Data Word A5A5h
SCLK
SDAT
t a
3
Data Conversion
Complete
16-bit Data Conversion, Long Start Pulse,
Data Word 5A5Ah
SCLK
> t a
3
SDAT
Data Conversion
Complete
12-bit Conversion,
Data Word = AB3h
SCLK
SDAT
< t
4
t e
3
Data Conversion
Complete
10-bit Conversion with "Extra"
Data Reduction Clocks, Data Word = 3A4h
SCLK
SDAT
< t
4
t g
3
Data Conversion
Complete
DS21410B-page 8
2002 Microchip Technology Inc.
TC3401
FIGURE 3-5:
A/D OPERATIONAL FLOWCHART
SDAT = Low
POR
CONVCLK = 2m?
No
Sleep
(Conversion Done?)
SDAT = High
Yes
SCLK
Hgh to Low?
No
Power Down Analog,
Conversion Complete,
SDAT = High
Yes
Power Up Analog,
Start CONVCLK (= 0),
Start Conversion,
Resolution = 2m
(m = 16), Latch Input
Channel Address (if applicable).
SCLK
No
High to Low?
Yes
SCLK
Low to High
No
transition?
SDAT = Dm;
m = m – 1
Yes
SDAT = Low
Yes
m ≥ 0?
No
CONVCLK
No
9
< 2 ?
Yes
SDAT = High
Internal Reset
SCLK
High to Low?
No
No
Sleep
Yes
A/D
Resolution
10
> 2
?
Yes
Reduce A/D
Resolution by 1-bit
(m = m – 1);
SDAT = High
2002 Microchip Technology Inc.
DS21410B-page 9
TC3401
3.3
VDD Monitor
3.4
Power Fail Detector
The TC3401 RESET output is in high impedance
The Power Fail detector is a comparator in which the
inverting input is connected to the internal voltage
reference. The non-inverting input is the PFI pin of the
TC3401 and the PFO pin is the active low, open drain
output. This comparator is suitable as an early warning
fail or low battery indicator. In a typical application,
where a voltage regulator is being used to supply
power to a system, the Power Fail comparator would
provided the voltage at V is greater than the internal
TH
voltage reference. This reference is approximately the
same value as the voltage appearing at REF
. When
OUT
V
is less than the internal reference, RESET is pulled
TH
low. When V
rises above the internal reference
TH
voltage again, RESET is held low for the reset active
time-out period, t , before being released. The RESET
9
output is ensured to be valid for V = 1.3V to 5.5V.
monitor the input voltage to the regulator while the V
DD
DD
monitor would measure the output voltage of the
regulator. Both PFO and RESET would drive interrupt
pins of a microcontroller.
When used to generate a Power-on or Brown-out
Reset, an external resistor network is required to divide
the appropriate V
threshold down to 1.23V at the
DD
V
input, (See the Typical Application circuit). For
The Power Fail detector may be used as a Wake-up or
Watchdog Timer. The Typical Application circuit shows
an RC network on PFI with the capacitor tied to a
tristated µC I/O pin. If R4 is 1 MΩ and C2 is 10µF, the
time constant is roughly ten seconds. The µC resets
the RC network by driving the I/O tied to PFI low and
then tristating it. The RC network will ramp to 1.23V in
TH
example, to generate a POR for a V at 3V -10%, the
values of R1 and R2 should be 137kΩ and 115kΩ
respectively.
DD
Since RESET is an open drain, it can be wired-OR’ed
with another open drain or external switch if desired.
roughly 9 seconds, assuming a V
of 3.0V. With
BATT
PFO tied to a µC input or interrupt, the µC will see a low
to high transition on PFO when the voltage on PFI
exceeds 1.23V. The PFO output is specified to be valid
for V = 1.3 to 5.5V.
DD
DS21410B-page 10
2002 Microchip Technology Inc.
TC3401
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
Package marking data not available at this time.
4.2
Taping Forms
Component Taping Orientation for 16-Pin QSOP (Narrow) Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Reel Size, Number of Components Per Reel and Reel Size
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
16-Pin QSOP (N)
12 mm
8 mm
2500
13 in
2002 Microchip Technology Inc.
DS21410B-page 11
TC3401
4.3
Package Dimensions
16-Pin PDIP (Narrow)
PIN 1
.270 (6.86)
.240 (6.10)
.045 (1.14)
.030 (0.76)
.770 (19.56)
.740 (18.80)
.310 (7.87)
.290 (7.37)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.014 (0.36)
.008 (0.20)
10° MAX.
.150 (3.81)
.115 (2.92)
.400 (10.16)
.310 (7.87)
.110 (2.79)
.090 (2.29)
.070 (1.78)
.045 (1.14)
.022 (0.56)
.015 (0.38)
Dimensions: inches (mm)
16-Pin QSOP (Narrow)
PIN 1
.157 (3.99)
.150 (3.81)
.244 (6.20)
.228 (5.80)
.010 (0.25)
.004 (0.10)
.196 (4.98)
.189 (4.80)
.069 (1.75)
.053 (1.35)
8°
MAX.
.010 (0.25)
.007 (0.19)
.025
.012 (0.31)
.050 (1.27)
.016 (0.41)
(0.635) .008 (0.21)
TYP.
Dimensions: inches (mm)
DS21410B-page 12
2002 Microchip Technology Inc.
TC3401
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
© 2002 Microchip Technology Inc.
DS21410B-page 13
TC3401
NOTES:
DS21410B-page 14
© 2002 Microchip Technology Inc.
TC3401
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21410B-page 15
WORLDWIDE SALES AND SERVICE
Japan
AMERICAS
ASIA/PACIFIC
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Corporate Office
Australia
2355 West Chandler Blvd.
Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Korea
Rocky Mountain
China - Beijing
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-7456
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
Atlanta
500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
China - Chengdu
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Microchip Technology Taiwan
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599
Tel: 630-285-0071 Fax: 630-285-0075
China - Fuzhou
Dallas
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
4570 Westgrove Drive, Suite 160
Addison, TX 75001
EUROPE
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
Tel: 972-818-7423 Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Kokomo
France
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
China - Shenzhen
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
New York
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Toronto
China - Hong Kong SAR
Italy
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
India
Tel: 39-039-65791-1 Fax: 39-039-6899883
Microchip Technology Inc.
India Liaison Office
United Kingdom
Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
05/01/02
DS21410B-page 16
2002 Microchip Technology Inc.
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