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TC655EUNTR [MICROCHIP]

BRUSHLESS DC MOTOR CONTROLLER, PDSO10, PLASTIC, MSOP-10;
TC655EUNTR
型号： TC655EUNTR
厂家： MICROCHIP    MICROCHIP
描述：

BRUSHLESS DC MOTOR CONTROLLER, PDSO10, PLASTIC, MSOP-10

电动机控制 光电二极管
文件： 总38页 (文件大小：634K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
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TC654/TC655  
Dual SMBus™ PWM Fan Speed Controllers With  
Fan Fault Detection  
Features:  
Description:  
• Temperature Proportional Fan Speed for Reduced  
Acoustic Noise and Longer Fan Life  
The TC654 and TC655 are PWM mode fan speed con-  
trollers with FanSense technology for use with brush-  
less DC fans. These devices implement temperature  
proportional fan speed control which lowers acoustic  
fan noise and increases fan life. The voltage at VIN  
(Pin 1) represents temperature and is typically pro-  
vided by an external thermistor or voltage output tem-  
perature sensor. The PWM output (VOUT) is adjusted  
between 30% and 100%, based on the voltage at VIN.  
The PWM duty cycle can also be programmed via  
SMBus to allow fan speed control without the need for  
an external thermistor. If VIN is not connected, the  
TC654/TC655 will start driving the fan at a default duty  
cycle of 39.33%. See Section 4.3 “Fan Start-up” for  
more details.  
• FanSense™ Protects against Fan Failure and  
Eliminates the Need for 3-wire Fans  
• Overtemperature Detection (TC655)  
• Efficient PWM Fan Drive  
• Provides RPM Data  
• 2-Wire SMBus™-Compatible Interface  
• Supports Any Fan Voltage  
• Software Controlled Shutdown Mode for "Green"  
Systems  
• Supports Low-Cost NTC/PTC Thermistors  
• Space Saving 10-Pin MSOP Package  
• Temperature Range: -40°C to +85ºC  
In normal fan operation, pulse trains are present at  
SENSE1 (Pin 8) and SENSE2 (Pin 7). The TC654/  
TC655 use these pulses to calculate the fan revolu-  
tions per minute (RPM). The fan RPM data is used to  
detect a worn out, stalled, open or unconnected fan.  
An RPM level below the user-programmable threshold  
causes the TC654/TC655 to assert a logic low alert  
signal (FAULT). The default threshold value is  
500 RPM. Also, if this condition occurs, F1F (bit 0<0>)  
or F2F (bit 1<0>) in the Status Register will also be set  
to a ‘1’.  
Applications:  
• Personal Computers and Servers  
• LCD Projectors  
• Datacom and Telecom Equipment  
• Fan Trays  
• File Servers  
• Workstations  
• General Purpose Fan Speed Control  
An over-temperature condition is indicated when the  
voltage at VIN exceeds 2.6V (typical). The TC654/  
TC655 devices indicate this by setting OTF(bit 5<X>) in  
the Status Register to a '1'. The TC655 device also  
pulls the FAULT line low during an over-temperature  
condition.  
Package Type  
10-Pin MSOP  
V
V
V
1
10  
9
IN  
DD  
The TC654/TC655 devices are available in a 10-Pin  
MSOP package and consume 150 µA during opera-  
tion. The devices can also enter a low-power Shutdown  
mode (5 µA, typ.) by setting the appropriate bit in the  
Configuration Register. The operating temperature  
range for these devices is -40°C to +85ºC.  
C
2
3
4
5
F
OUT  
TC654  
TC655  
8
SENSE1  
SENSE2  
FAULT  
SCLK  
SDA  
7
6
GND  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 1  
TC654/TC655  
Functional Block Diagram  
TC654/TC655  
–
+
Note  
VOTF  
VIN  
VDD  
–
+
OTF  
Control  
Logic  
+
–
VOUT  
Start-up  
Timer  
FAULT  
CF  
Missing  
Pulse  
Detect  
VMIN  
Clock  
Generator  
50 k  
SENSE1  
SENSE2  
SCLK  
SDA  
–
Serial Port  
Interface  
100 mV (typ.)  
50 k  
–
GND  
100 mV (typ.)  
Note: OTF condition applies for the TC655 device only.  
DS20001734C-page 2  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
1.0  
ELECTRICAL  
PIN FUNCTION TABLE  
CHARACTERISTICS  
Name  
VIN  
Function  
Absolute Maximum Ratings *  
Analog Input  
CF  
Analog Output  
V
...................................................................................6.5V  
DD  
SCLK  
SDA  
Serial Clock Input  
Serial Data In/Out (Open Drain)  
Ground  
Input Voltages ...................................... -0.3V to (V + 0.3V)  
DD  
Output Voltages .................................... -0.3V to (V + 0.3V)  
DD  
Storage temperature .....................................-65°C to +150°C  
Ambient temp. with power applied ................-40°C to +125°C  
GND  
FAULT  
SENSE2  
SENSE1  
VOUT  
VDD  
Digital (Open Drain) Output  
Analog Input  
Maximum Junction Temperature, T ............................. 150°C  
J
ESD protection on all pins4 kV  
Analog Input  
*Notice: Stresses above those listed under “Maximum rat-  
ings” may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at  
those or any other conditions above those indicated in the  
operational listings of this specification is not implied. Expo-  
sure to maximum rating conditions for extended periods may  
affect device reliability.  
Digital Output  
Power Supply Input  
ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: Unless otherwise noted, all limits are specified for VDD = 3.0V to 5.5V,  
-40°C <TA < +85°C.  
Parameters  
Supply Voltage  
Sym.  
Min.  
Typ.  
Max.  
Units  
Conditions  
VDD  
IDD  
3.0  
—
—
150  
5
5.5  
300  
10  
V
Operating Supply Current  
Shutdown Mode Supply Current  
VOUT PWM Output  
µA Pins 7, 8, 9 Open  
µA Pins 7, 8, 9 Open  
IDDSHDN  
—
VOUT Rise Time  
tR  
tF  
—
—
—
—
—
—
30  
50  
50  
—
—
34  
µsec IOH = 5 mA, Note 1  
µsec IOL = 1 mA, Note 1  
mA VOL = 10% of VDD  
mA VOH = 80% of VDD  
Hz CF = 1 µF  
VOUT Fall Time  
Sink Current at VOUT Output  
Source Current at VOUT Output  
PWM Frequency  
IOL  
IOH  
F
1.0  
5.0  
26  
VIN Input  
VIN Input Voltage for 100% PWM  
duty-cycle  
VC(MAX)  
2.45  
2.6  
2.75  
V
V
V
C(MAX) - VC(MIN)  
VIN Input Resistance  
IN Input Leakage Current  
VCRANGE  
1.25  
—
1.4  
10M  
—
1.55  
—
VDD = 5.0V  
V
IIN  
-1.0  
+1.0  
µA  
SENSE Input  
SENSE Input Threshold Voltage with  
Respect to GND  
VTHSENSE  
80  
100  
120  
mV  
FAULT Output  
FAULT Output LOW Voltage  
FAULT Output Response Time  
Fan RPM-to-Digital Output  
Fan RPM ERROR  
VOL  
—
—
—
0.3  
—
V
IOL = 2.5 mA  
RPM > 1600  
tFAULT  
2.4  
sec  
-15  
—
+15  
%
Note 1: Not production tested, ensured by design, tested during characterization.  
2: For 5.0V > VDD 5.5V, the limit for VIH = 2.2V.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 3  
 
 
TC654/TC655  
ELECTRICAL SPECIFICATIONS (CONTINUED)  
Electrical Characteristics: Unless otherwise noted, all limits are specified for VDD = 3.0V to 5.5V,  
-40°C <TA < +85°C.  
Parameters  
Sym.  
Min.  
Typ.  
Max.  
Units  
Conditions  
2-Wire Serial Bus Interface  
Logic Input High  
VIH  
VIL  
2.1  
—
—
—
—
10  
—
—
—
0.8  
0.4  
15  
V
V
V
Note 2  
IOL = 3 mA  
Logic Input Low  
Logic Output Low  
VOL  
—
Input Capacitance SDA, SCLK  
I/O Leakage Current  
SDA Output Low Current  
CIN  
—
pF Note 1  
µA  
mA VOL = 0.6V  
ILEAK  
IOLSDA  
-1.0  
6
+1.0  
—
Note 1: Not production tested, ensured by design, tested during characterization.  
2: For 5.0V > VDD 5.5V, the limit for VIH = 2.2V.  
TEMPERATURE SPECIFICATIONS  
Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 3.0 V to 5.5 V  
Parameters  
Temperature Ranges  
Symbol  
Min  
Typ  
Max  
Units  
Conditions  
Specified Temperature Range  
Operating Temperature Range  
Storage Temperature Range  
Thermal Package Resistances  
Thermal Resistance, 10 Pin MSOP  
TA  
TA  
TA  
-40  
-40  
-65  
—
—
—
+85  
+125  
+150  
°C  
°C  
°C  
JA  
—
113  
—
°C/W  
TIMING SPECIFICATIONS  
Electrical Characteristics: Unless otherwise noted, all limits are specified for VDD = 3.0V to 5.5V,  
-40°C <TA < +85°C  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
SMBus Interface (See Figure 1-1)  
Serial Port Frequency  
fSC  
tLOW  
tHIGH  
tR  
0
—
—
—
—
—
—
—
—
—
100  
—
kHz Note 1  
µsec Note 1  
µsec Note 1  
nsec Note 1  
nsec Note 1  
µsec Note 1  
µsec Note 1  
µsec Note 1  
nsec Note 1  
Low Clock Period  
4.7  
4.7  
—
High Clock Period  
—
SCLK and SDA Rise Time  
SCLK and SDA Fall Time  
1000  
300  
—
tF  
—
Start Condition Setup Time  
SCLK Clock Period Time  
Start Condition Hold Time  
tSU(START)  
tSC  
tH(START)  
tSU-DATA  
4.7  
10  
—
4.0  
250  
—
Data in SetupTime to SCLK  
High  
—
Data in Hold Time after SCLK  
Low  
tH-DATA  
300  
—
—
—
nsec Note 1  
µsec Note 1  
Stop Condition Setup Time  
tSU(STOP)  
tIDLE  
4.0  
4.7  
—
—
Bus Free Time Prior to New  
Transition  
µsec Note 1 and Note 2  
Note 1: Not production tested, ensured by design, tested during characterization.  
2: Time the bus must be free before a new transmission can start.  
DS20001734C-page 4  
2002-2014 Microchip Technology Inc.  
 
 
TC654/TC655  
SMBus Write Timing Diagram  
B
A
C
D
E
F
G
H
J
M
I
K
L
tLOW tHIGH  
SCLK  
SDA  
tSU(START) tH(START)  
tSU-DATA  
tH-DATA  
tSU(STOP)tIDLE  
F = Acknowledge Bit Clocked into Master  
G = MSB of Data Clocked into Slave  
H = LSB of Data Clocked into Slave  
I = Slave Pulls SDA Line Low  
J = Acknowledge Clocked into Master  
K = Acknowledge Clock Pulse  
L = Stop Condition, Data Executed by Slave  
M = New Start Condition  
A = Start Condition  
B = MSB of Address Clocked into Slave  
C = LSB of Address Clocked into Slave  
D = R/W Bit Clocked into Slave  
E = Slave Pulls SDA Line Low  
SMBus Read Timing Diagram  
B
A
C
D
E
F
G
H
I
J
K
tLOW tHIGH  
SCLK  
SDA  
tSU(START) tH(START)  
tSU-DATA  
tSU(STOP)  
tIDLE  
E = Slave Pulls SDA Line Low  
I = Acknowledge Clock Pulse  
J = Stop Condition  
A = Start Condition  
F = Acknowledge Bit Clocked into Master  
G = MSB of Data Clocked into Master  
H = LSB of Data Clocked into Master  
B = MSB of Address Clocked into Slave  
C = LSB of Address Clocked into Slave  
D = R/W Bit Clocked into Slave  
K = New Start Condition  
FIGURE 1-1:  
Bus Timing Data.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 5  
 
TC654/TC655  
2.0  
TYPICAL PERFORMANCE CURVES  
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
180  
175  
170  
165  
160  
155  
150  
145  
140  
135  
130  
14  
Pins 7,8, and 9 Open  
VDD = 5.5 V  
VOL = 0.1 VDD  
VDD = 5.5 V  
12  
10  
8
VDD = 3.0 V  
VDD = 5.0 V  
6
VDD = 4.0 V  
VDD = 3.0 V  
4
2
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (°C)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (°C)  
FIGURE 2-1:  
IDD vs. Temperature.  
FIGURE 2-4:  
PWM, Sink Current vs.  
Temperature.  
9.000  
8.000  
7.000  
6.000  
5.000  
4.000  
3.000  
2.000  
1.000  
50  
IOL = 2.5 mA  
45  
40  
35  
30  
25  
20  
15  
VDD = 3.0 V  
VDD = 5.5 V  
VDD = 5.0 V  
VDD = 5.5 V  
VDD = 3.0 V  
VDD = 4.0 V  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
Temperature (ºC)  
FIGURE 2-2:  
IDD Shutdown vs.  
FIGURE 2-5:  
Fault VOL vs. Temperature.  
Temperature.  
32  
CF = 1.0 µF  
35  
30  
25  
20  
15  
10  
5
31  
30  
29  
28  
27  
VOH = 0.8VDD  
VDD = 5.5 V  
VDD = 3.0 V  
VDD = 5.5 V  
VDD = 5.0 V  
VDD = 4.0 V  
VDD = 3.0 V  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
-40 -25 -10  
5
20  
35  
50  
65  
80  
95 110 125  
Temperature (°C)  
FIGURE 2-6:  
PWM Frequency vs.  
FIGURE 2-3:  
PWM, Source Current vs.  
Temperature.  
Temperature.  
DS20001734C-page 6  
2002-2014 Microchip Technology Inc.  
 
TC654/TC655  
10  
9
8
7
6
5
4
3
2
1
0
50  
45  
40  
35  
30  
25  
20  
CF = 1.0 µF  
VOL = 0.4 V  
VDD = 5.5 V  
VDD = 5.0 V  
VDD = 3.0 V  
VDD = 5.0 V  
VDD = 5.5 V  
VDD = 4.0 V  
VDD = 3.0 V  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
FIGURE 2-7:  
SDA IOL vs. Temperature.  
FIGURE 2-10:  
RPM %error vs.  
Temperature.  
2.620  
2.615  
2.610  
2.605  
2.600  
2.595  
2.590  
2.585  
2.580  
2.575  
45  
40  
35  
VDD = 5.5 V  
VDD = 3.0V  
VDD = 5.0 V  
30  
25  
20  
VDD = 4.0 V  
VDD = 5.5V  
VDD = 3.0 V  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
FIGURE 2-8:  
VCMAX vs. Temperature.  
FIGURE 2-11:  
Sense Threshold  
(VTHSENSE) Hysteresis vs. Temperature.  
1.205  
1.200  
1.195  
1.190  
1.185  
1.180  
150  
140  
VDD = 3.0 V  
130  
120  
110  
100  
90  
VDD = 3.0 V  
VDD = 5.0 V  
VDD = 5.5 V  
VDD = 4.0 V  
VDD = 5.0 V  
80  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
Temperature (ºC)  
FIGURE 2-9:  
VCMIN vs. Temperature.  
FIGURE 2-12:  
SDA, SCLK Hysteresis vs.  
Temperature.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 7  
TC654/TC655  
3.0  
PIN FUNCTIONS  
The descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
Name  
PIN FUNCTION TABLE  
Function  
VIN  
Analog Input  
CF  
Analog Output  
SCLK  
SDA  
Serial Clock Input  
Serial Data In/Out (Open Drain)  
Ground  
GND  
FAULT  
SENSE2  
SENSE1  
VOUT  
VDD  
Digital (Open Drain) Output  
Analog Input  
Analog Input  
Digital Output  
Power Supply Input  
3.1  
Analog Input (V )  
3.6  
Analog Input (SENSE2)  
IN  
A voltage range of 1.62V to 2.6V (typical) on this pin  
drives an active duty-cycle of 30% to 100% on the  
VOUT pin.  
Fan current pulses are detected at this pin. These  
pulses are counted and used in the calculation of the  
Fan 2 RPM.  
3.2  
Analog Output (C )  
3.7  
Analog Input (SENSE1)  
F
Positive terminal for the PWM ramp generator timing  
capacitor. The recommended CF is 1 µF for 30 Hz  
PWM operation.  
Fan current pulses are detected at this pin. These  
pulses are counted and used in the calculation of the  
Fan 1 RPM.  
3.3  
SMBus Serial Clock Input (SCLK)  
3.8  
Digital Output (V  
)
OUT  
Clocks data into and out of the TC654/TC655. See  
Section 5.0 “Serial Communication” for more infor-  
mation on the serial interface.  
This active high complimentary output drives the base  
of an external transistor or the gate of a MOSFET.  
3.9  
Power Supply Input (V  
)
DD  
3.4  
Serial Data (Bi-directional) (SDA)  
The VDD pin with respect to GND provides power to the  
device. This bias supply voltage may be independent of  
the fan power supply.  
Serial data is transferred on the SMBus in both direc-  
tions using this pin. See Section 5.0 “Serial Commu-  
nication” for more information on the serial interface.  
3.5  
Digital (Open Drain) Output  
(FAULT)  
When the fan’s RPM falls below the user-set RPM  
threshold (or OTF occurs with TC655), a logic low sig-  
nal is asserted.  
DS20001734C-page 8  
2002-2014 Microchip Technology Inc.  
 
TC654/TC655  
can be set to provide a predictive fan failure feature.  
This feature can be used to give a system warning and,  
in many cases, help to avoid a system thermal shut-  
down condition. The fan RPM data and threshold reg-  
isters are available over the SMBus interface which  
allows for complete system control.  
4.0  
DEVICE OPERATION  
The TC654 and TC655 devices allow you to control,  
monitor and communicate (via SMBus) fan speed for 2-  
wire and 3-wire DC brushless fans. By pulse-width  
modulating (PWM) the voltage across the fan, the  
TC654/TC655 controls fan speed according to the sys-  
tem temperature.The goal of temperature proportional  
fan speed control is to reduce fan power consumption,  
increase fan life and reduce system acoustic noise.  
With the TC654 and TC655 devices, fan speed can be  
controlled by the analog input VIN or the SMBus inter-  
face, allowing for high system flexibility.  
The TC654/TC655 devices are identical in every  
aspect except for how they indicate an over-tempera-  
ture condition. When VIN voltage exceeds 2.6V (typi-  
cal), both devices will set OTF (bit 5<X>) in the Status  
Register to a '1'. The TC655 will additionally pull the  
FAULT output low during an over-temperature condi-  
tion.  
The TC654 and TC655 also measure and monitor fan  
revolutions per minute (RPM). A fan’s speed (RPM) is  
a measure of its health. As a fan’s bearings wear out,  
the fan slows down and eventually stops (locked rotor).  
By monitoring the fan’s RPM level, the TC654/TC655  
devices can detect open, shorted, unconnected and  
locked rotor fan conditions. The fan speed threshold  
+5V  
+12V  
+5V  
FAN  
FAN  
1
2
C2  
1 µF  
RISO1  
R1  
NTC Thermistor  
100 k@ 25°C  
715  
34.8 k  
10  
VDD  
RISO2  
9
8
1
VIN  
VOUT  
C1  
715  
R2  
0.01 µF  
CSENSE1  
0.1 µF  
14.7 k  
SENSE1  
2
CF  
RSENSE1  
CF  
1.0 µF  
TC654/TC655  
SENSE2  
CSENSE2  
0.1 µF  
7
RSCLK  
+5V  
20 k  
3
4
SCLK  
RSENSE2  
+5V  
6
PIC®  
Microcontroller  
RFAULT  
+5V  
20 k  
FAULT  
SDA  
GND  
5
RSDA  
20 k  
Note: Refer to Table 7-1 for RSENSE1 and RSENSE2 values.  
FIGURE 4-1: Typical Application Circuit.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 9  
TC654/TC655  
4.1  
Fan Speed Control Methods  
T
The speed of a DC brushless fan is proportional to the  
voltage across it. For example, if a fan’s rating is  
5000 RPM at 12V, it’s speed would be 2500 RPM at 6V.  
This, of course, will not be exact, but should be close.  
There are two main methods for fan speed control. The  
first is pulse width modulation (PWM) and the second  
is linear. Using either method the total system power  
requirement to run the fan is equal. The difference  
between the two methods is where the power is  
consumed.  
Ton  
Toff  
T = Period  
T = 1/F  
F = Frequency  
D = Duty Cycle  
D = Ton / T  
The following example compares the two methods for  
a 12V, 120 mA fan running at 50% speed. With 6V  
applied across the fan, the fan draws an average cur-  
rent of 68 mA. Using a linear control method, there are  
6V across the fan and 6V across the drive element.  
With 6V and 68 mA, the drive element is dissipating  
410 mW of power. Using the PWM approach, the fan is  
modulated at a 50% duty cycle, with most of the 12V  
being dropped across the fan. With 50% duty cycle, the  
fan draws an RMS current of 110 mA and an average  
current of 72 mA. Using a MOSFET with a 1 RDS(on)  
(a fairly typical value for this low current) the power dis-  
sipation in the drive element would be: 12 mW (Irms2 *  
RDS(on)). Using a standard 2N2222A NPN transistor  
(assuming a Vce-sat of 0.8V), the power dissipation  
would be 58 mW (Iavg* Vce-sat).  
FIGURE 4-2:  
Waveform.  
Duty Cycle Of A PWM  
The TC654 and TC655 generate a pulse train with a  
typical frequency of 30 Hz (CF = 1 µF). The duty cycle  
can be varied from 30% to 100%. The pulse train gen-  
erated by the TC654/TC655 devices drives the gate of  
an external N-channel MOSFET or the base of an NPN  
transistor (Figure 4-3). See Section 7.5 “Output Drive  
Device Selection” for more information on output  
drive device selection.  
12V  
The PWM approach to fan speed control causes much  
less power dissipation in the drive element. This allows  
smaller devices to be used and will not require any spe-  
cial heatsinking to get rid of the power being dissipated  
in the package.  
FAN  
VDD  
D
Qdrive  
VOUT  
G
TC654/  
TC655  
S
The other advantage to the PWM approach is that the  
voltage being applied to the fan is always near 12V.  
This eliminates any concern about not supplying a high  
enough voltage to run the internal fan components,  
which is very relevant in linear fan speed control.  
GND  
FIGURE 4-3:  
PWM Fan Drive.  
By modulating the voltage applied to the gate of the  
MOSFET Qdrive, the voltage applied to the fan is also  
modulated. When the VOUT pulse is high, the gate of  
the MOSFET is turned on, pulling the voltage at the  
drain of Qdrive to 0V. This places the full 12V across  
the fan for the Ton period of the pulse. When the duty  
cycle of the drive pulse is 100% (full on, Ton = T), the  
fan will run at full speed. As the duty cycle is decreased  
(pulse on time “Ton” is lowered), the fan will slow down  
proportionally. With the TC654 and TC655 devices, the  
duty cycle can be controlled through the analog input  
pin (VIN) or through the SMBus interface by using the  
Duty-Cycle Register. See Section 4.5 “Duty Cycle  
Control (VIN and Duty-Cycle Register)” for more  
details on duty cycle control.  
4.2  
PWM Fan Speed Control  
The TC654 and TC655 devices implement PWM fan  
speed control by varying the duty cycle of a fixed fre-  
quency pulse train. The duty cycle of a waveform is the  
on time divided by the total period of the pulse. For  
example, given a 100 Hz waveform (10 msec.) with an  
on time of 5.0 msec, the duty cycle of this waveform is  
50% (5.0 msec/10.0 msec). An example of this is  
illustrated in Figure 4-2.  
DS20001734C-page 10  
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TC654/TC655  
quency is linear. If a frequency of 15 Hz is desired, a  
capacitor value of 2.0 µF should be used. The fre-  
quency should be kept in the range of 15 Hz to 35 Hz.  
See Section 7.2 “Setting the PWM Frequency” for  
more details.  
4.3  
Fan Start-up  
Often overlooked in fan speed control is the actual  
start-up control period. When starting a fan from a non-  
operating condition (fan speed is zero RPM), the  
desired PWM duty cycle or average fan voltage can not  
be applied immediately. Since the fan is at a rest posi-  
tion, the fan’s inertia must be overcome to get it started.  
The best way to accomplish this is to apply the full rated  
voltage to the fan for one second. This will ensure that  
in all operating environments, the fan will start and  
operate properly.  
4.5  
Duty Cycle Control (V and Duty-  
IN  
Cycle Register)  
The duty cycle of the VOUT PWM drive signal can be  
controlled by either the VIN analog input pin or by the  
Duty-Cycle Register, which is accessible via the  
SMBus interface. The control method is selectable via  
DUTYC (bit 5<0>) of the Configuration Register. The  
default state is for VIN control. If VIN control is selected  
and the VIN pin is open, the PWM duty cycle will default  
to 39.33%. The duty cycle control method can be  
changed at any time via the SMBus interface.  
The TC654 and TC655 devices implement this fan con-  
trol feature without any user programming. During a  
power-up or release from shutdown condition, the  
TC654 and TC655 devices force the VOUT output to a  
100% duty cycle, turning the fan full on for one second  
(CF = 1 µF). Once the one second period is over, the  
TC654/TC655 devices will look to see if SMBus or VIN  
control has been selected in the Configuration Register  
(DUTYC bit 5<0>). Based on this register, the device  
will choose which input will control the VOUT duty cycle.  
Duty cycle control based on VIN is the default state. If  
VIN control is selected and the VIN pin is open (nothing  
is connected to the VIN pin), then the TC654/TC655 will  
default to a duty cycle of 39.33%. This sequence is  
shown in Figure 4-4. This integrated one second start-  
up feature will ensure the fan starts-up every time.  
VIN is an analog input pin. A voltage in the range of  
1.62V to 2.6V (typical) at this pin commands a 30% to  
100% duty cycle on the VOUT output, respectively. If the  
voltage at VIN falls below the 1.62V level, the duty cycle  
will not go below 30%. The relationship between the  
voltage at VIN and the PWM duty cycle is shown in  
Figure 4-5.  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
Power-Up or Release  
from SHDN  
One Second Pulse  
YES  
1
1.2  
1.4  
1.6  
1.8  
2
2.2  
2.4  
2.6  
2.8  
Select SMBus  
Input Voltage (VIN)  
NO  
SMBus PWM Duty  
Cycle Control  
Default PWM: 39.33%  
FIGURE 4-5:  
Voltage (Typical).  
PWM Duty Cycle vs. VIN  
V
IN Open?  
NO  
YES  
For the TC655 device, if the voltage at VIN exceeds the  
2.6V (typical) level, an over-temperature fault indica-  
tion will be given by asserting a low at the FAULT output  
and setting OTF (bit 5<X>) in the Status Register to a  
‘1’.  
VIN PWM Duty  
Cycle Control  
A thermistor network or any other voltage output ther-  
mal sensor can be used to provide the voltage to the  
VIN input. The voltage supplied to the VIN pin can actu-  
ally be thought of as a temperature. For example, the  
circuit shown in Figure 4-6 represents a typical solution  
for a thermistor based temperature sensing network.  
See Section 7.3 “Temperature Sensor Design” for  
more details.  
FIGURE 4-4:  
Power-Up Flow Chart.  
4.4  
PWM Drive Frequency (C )  
F
As previously discussed, the TC654 and TC655  
devices operate with a fixed PWM frequency. The fre-  
quency of the PWM drive output (VOUT) is set by a  
capacitor at the CF pin. With a 1 µF capacitor at the CF  
pin, the typical drive frequency is 30 Hz. This frequency  
can be raised, by decreasing the capacitor value, or  
lowered, by increasing the capacitor value. The rela-  
tionship between the capacitor value and the PWM fre-  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 11  
 
 
TC654/TC655  
This method of control allows for more sophisticated  
algorithms to be implemented by utilizing microcontrol-  
lers or microprocessors in the system. In this way, mul-  
tiple system temperatures can be taken into account for  
determining the necessary fan speed.  
+5V  
As shown in Table 4-1, the duty cycle has more of a  
step function look than did the VIN control approach.  
Because the step changes in duty cycle are small, they  
are rarely audibly noticeable, especially when the fans  
are integrated into the system.  
NTC Thermistor  
100 k@ 25°C  
R1  
34.8 k  
VIN  
C1  
0.01 µF  
TC654/  
TC655  
R2  
14.7 k  
4.6  
PWM Output (V  
)
OUT  
GND  
The VOUT pin is designed to drive two low-cost NPN  
transistors or N-channel MOSFETs as the low side  
power switching elements in the system as is shown in  
Figure 4-7. These switching elements are used to turn  
the fans on and off at the PWM duty cycle commanded  
by the VOUT output.  
FIGURE 4-6:  
NTC Thermistor Sensor  
Network.  
The second method for controlling the duty cycle of the  
PWM output (VOUT) is via the SMBus interface. In order  
to control the PWM duty cycle via the SMBus, DUTYC  
(bit 5<0>) of the Configuration Register (Register 6.3)  
must be set to a ‘1’. This tells the TC654/TC655 device  
that the duty cycle should be controlled by the Duty  
Cycle Register. Next, the Duty Cycle Register must be  
programmed to the desired value. The Duty Cycle Reg-  
ister is a 4 Bit read/write register that allows duty cycles  
from 30% to 100% to be programmed. Table 4-1 shows  
the binary codes for each possible duty cycle.  
This output has complementary drive (pull up and pull  
down) and is optimized for driving NPN transistors or  
N-channel MOSFETs (see Section 2.0 “Typical Per-  
formance CURVES” for sink and source current capa-  
bility of the VOUT drive stage).  
The external device needs to be chosen to fit the volt-  
age and current rating of the fan in a particular applica-  
tion (Refer to Section 7.5 “Output Drive Device  
Selection” Output Drive Device Selection). NPN tran-  
sistors are often a good choice for low-current fans. If a  
NPN transistor is chosen, a base current-limiting resis-  
tor should be used. When using a MOSFET as the  
switching element, it is sometimes a good idea to have  
a gate resistor to help slow down the turn on and turn  
off of the MOSFET. As with any switching waveform,  
fast rising and falling edges can sometimes lead to  
noise problems.  
TABLE 4-1:  
DUTY-CYCLE REGISTER  
(DUTY-CYCLE) 4-BITS,  
READ/WRITE  
Duty-Cycle Register (Duty Cycle)  
D(3)  
D(2)  
D(1)  
D(0)  
Duty-Cycle  
As previously stated, the VOUT output will go to 100%  
duty cycle during power-up and release from shutdown  
conditions. The VOUT output only shuts down when  
commanded to do so via the Configuration Register  
(SDM (bit 0<0>)). Even when a locked rotor condition  
is detected, the VOUT output will continue to pulse at  
the programmed duty cycle.  
0
0
0
0
0
0
0
0
1
0
1
0
30%  
34.67%  
39.33% (default for V  
open and when SMBus  
is not selected)  
IN  
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
44%  
48.67%  
53.33%  
58%  
4.7  
Sensing Fan Operation (SENSE1 &  
SENSE2)  
The TC654 and TC655 also feature Microchip's propri-  
etary FanSense technology. During normal fan opera-  
tion, commutation occurs as each pole of the fan is  
energized. The fan current pulses created by the fan  
commutation are sensed using low value current sense  
resistors in the ground return leg of the fan circuit. The  
voltage pulses across the sense resistor are then AC  
coupled through capacitors to the SENSE pins of the  
TC654/TC655 device. These pulses are utilized for cal-  
culating the RPM of the individual fans. The threshold  
voltage for the SENSE pins is 100 mV (typical). The  
62.67%  
67.33%  
72%  
76.67%  
81.33%  
86%  
90.67%  
95.33%  
100%  
DS20001734C-page 12  
2002-2014 Microchip Technology Inc.  
 
 
TC654/TC655  
peak of the voltage pulse at the SENSE pins must  
exceed the 100 mV (typical) threshold in order for the  
pulse to be counted in the fan RPM measurement.  
4.8  
Fan Fault Threshold and  
Indication (FAULT)  
For the TC654 and TC655 devices, a fault condition  
exists whenever a fan’s sensed RPM level falls below  
the user programmable threshold. The RPM threshold  
values for fan fault detection are set in the FAN_-  
FAULT1 and FAN_FAULT2 Registers (8-bit, read/  
write).  
See Section 7.4 “FanSense Network (RSENSE  
CSENSE)” for more details on selecting the appropriate  
current sense resistor and coupling capacitor values.  
&
The RPM threshold represents the fan speed at which  
the TC654/TC655 devices will indicate a fan fault. This  
threshold can be set at lower levels to indicate fan  
locked rotor conditions or set to higher levels to give  
indications for predictive fan failure. It is recommended  
that the RPM threshold be at least 10% lower than the  
minimum fan speed which occurs at the lowest duty  
cycle set point. The default value for the fan RPM  
thresholds is 500 RPM. If the fan's sensed RPM is less  
than the fan fault threshold for 2.4 seconds (typical), a  
fan fault condition is indicated.  
FAN  
FAN  
1
2
R
ISO1  
R
ISO2  
V
OUT  
SENSE1  
When a fault condition due to low fan RPM occurs, a  
logic low is asserted at the FAULT output. F1F (bit  
0<0>) and F2F (bit 1<0>) in the Status Register are set  
to ‘1’ for respective low RPM levels on the SENSE1  
and SENSE2 inputs. The FAULT output and the fault  
bits in the Status Register can be reset by setting  
FFCLR (bit 7<0>) in the Configuration Register to a ‘1’.  
TC654/  
TC655  
C
C
SENSE1  
SENSE2  
R
SENSE1  
SENSE2  
SENSE2  
R
GND  
For the TC655 device, a fault condition is also indicated  
when an Over-Temperature Fault condition occurs.  
This condition occurs when the VOUT duty cycle  
exceeds the 100% value indicating that no additional  
cooling capability is available. For this condition, a logic  
low is asserted at the FAULT output and OTF (bit 5<X>)  
of the Status Register, the over-temperature fault indi-  
cator, is set to a ‘1’ (The TC654 also indicates an over-  
temperature condition via the OTF bit in the status reg-  
ister). If the duty cycle then decreases below 100%, the  
FAULT output will be released and OTF (bit 5<X>) of  
the Status Register will be reset to ‘0’.  
FIGURE 4-7:  
Fan Current Sensing.  
By selecting F1PPR (bits 2-1<01>) and F2PPR (bits 4-  
3<01>) in the Configuration Register, the TC654 and  
TC655 can be programmed to calculate RPM data for  
fans with 1, 2, 4 or 8 current pulses per rotation. The  
default state assumes a fan with 2 pulses per rotation.  
The measured RPM data is then stored in the RPM-  
OUTPUT1 (RPM1, for SENSE1 input) and RPM-OUT-  
PUT2 (RPM2, for SENSE2 input) Registers. These  
registers are 9-Bit Read-Only registers which store  
RPM data with 25 RPM resolution. By setting RES (bit  
6<0>) of the Configuration Register to a ‘1’, the RPM  
data can be read with 25 RPM resolution. If this Bit is  
left in the default state of '0', the RPM data will only be  
readable with resolution of 50 RPMs, which represents  
8-Bit data.  
4.9  
Low-Power Shutdown Mode  
Some applications may have operating conditions  
where fan cooling is not required as a result of low  
ambient temperature or light system load. During these  
times it may be desirable to shut the fans down to save  
power and reduce system noise.  
The TC654/TC655 devices can be put into a low-power  
Shutdown mode by setting SDM (bit 0<0>) in the Con-  
figuration register to a ‘1’ (this bit is the shutdown bit).  
When the TC654/TC655 devices are in Shutdown  
mode, all functions except for the SMBus interface are  
suspended. During this mode of operation, the TC654  
and TC655 devices will draw a typical supply current of  
only 5 µA. Normal operation will resume as soon as Bit  
0 in the Configuration Register is reset to ‘0’.  
The maximum fan RPM reading is 12775 RPM. If this  
value is exceeded, counter overflow bits in the Status  
Register are set. R1CO (bit 3<0>) and R2CO (bit 4<0>)  
in the Status Register represent the RPM1 and RPM2  
counter overflow bits for the RPM1 and RPM2 regis-  
ters, respectively. These bits will automatically be reset  
to zero if the fan RPM reading has been below the max-  
imum value of 12775 RPM for 2.4 seconds.  
See Table 6-1 for RPM1, RPM2 and Status Register  
command byte assignments.  
2002-2014 Microchip Technology Inc.  
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TC654/TC655  
When the TC654/TC655 devices are brought out of a  
Shutdown mode by resetting SDM (bit 0<0>) in the  
Configuration Register, all of the registers (except for  
the Configuration and FAN_FAULT1 and 2 registers)  
assume their default power-up states. The Configura-  
tion Register and the FAN_FAULT1 and 2 Registers  
maintain the states they were in prior to the device  
being put into the Shutdown mode. Since these are the  
registers which control the parts operation, the part  
does not have to be reprogrammed for operation when  
it comes out of Shutdown mode.  
4.10  
SMBus Interface (SCLK & SDA)  
The TC654/TC655 feature an industry-standard, 2-wire  
serial interface with factory-set addresses. By commu-  
nicating with the TC654/TC655 device registers, func-  
tions like PWM duty cycle, low-power Shutdown mode  
and fan RPM threshold can be controlled. Critical infor-  
mation, such as fan fault, over-temperature and fan  
RPM, can also be obtained via the device data regis-  
ters. The available data and control registers make the  
TC654/TC655 devices very flexible and easy to use. All  
of the available registers are detailed in Section 6.0  
“Register Set”.  
4.11 SMBus Slave Address  
The slave address of the TC654/TC655 is 0011 011  
and is fixed. This address is different from industry-  
standard digital temperature sensors (like TCN75) and,  
therefore, allows the TC654/TC655 to be utilized in  
systems in conjunction with these components. Please  
contact Microchip Technology Inc. if alternate  
addresses are required.  
DS20001734C-page 14  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
are initiated by a Start condition (Start), followed by a  
device address byte and one or more data bytes. The  
device address byte includes a Read/Write selection  
bit. Each access must be terminated by a Stop Condi-  
tion (Stop). A convention call Acknowledge (ACK) con-  
firms the receipt of each byte. Note that SDA can only  
change during periods when SCLK is low (SDA  
changes while SCLK is high are reserved for Start and  
Stop conditions). All bytes are transferred MSB (most  
significant bit) first.  
5.0  
5.1  
SERIAL COMMUNICATION  
SMBus 2-Wire Interface  
The Serial Clock Input (SCLK) and the bi-directional  
data port (SDA) form a 2-wire bi-directional serial port  
for communicating with the TC654/TC655. The follow-  
ing bus protocols have been defined:  
• Data transfer may be initiated only when the bus  
is not busy.  
• During data transfer, the data line must remain  
stable whenever the clock line is high. Changes in  
the data line while the clock line is high will be  
interpreted as a Start or Stop condition.  
5.1.2  
MASTER/SLAVE  
The device that sends data onto the bus is the transmit-  
ter and the device receiving data is the receiver. The  
bus is controlled by a master device which generates  
the serial clock (SCLK), controls the bus access and  
generates the Start and Stop conditions. The TC654/  
TC655 always work as a slave device. Both master and  
slave devices can operate as either transmitter or  
receiver, but the master device determines which mode  
is activated.  
Accordingly, the following Serial Bus conventions have  
been defined.  
TABLE 5-1:  
TC654/TC655 SERIAL BUS  
CONVENTIONS  
Term  
Description  
Transmitter The device sending data to the bus.  
5.1.3  
START CONDITION (START)  
Receiver  
The device receiving data from the  
bus.  
A high-to-low transition of the SDA line while the clock  
(SCLK) is high determines a Start condition. All com-  
mands must be preceded by a Start condition.  
Master  
The device which controls the bus: ini-  
tiating transfers (Start), generating the  
clock and terminating transfers (Stop).  
5.1.4  
ADDRESS BYTE  
Slave  
Start  
The device addressed by the master.  
Immediately following the Start Condition, the host  
must transmit the address byte to the TC654/TC655.  
The 7-bit SMBus address for the TC654/TC655 is  
0011 011. The 7-bit address transmitted in the serial  
bit stream must match for the TC654/TC655 to respond  
with an Acknowledge (indicating the TC654/TC655 is  
on the bus and ready to accept data). The eighth bit in  
the Address Byte is a Read-Write Bit. This bit is a ‘1’ for  
a read operation or ‘0’ for a write operation. During the  
first phase of any transfer, this bit will be set = 0to indi-  
cate that the command byte is being written.  
A unique condition signaling the  
beginning of a transfer indicated by  
SDA falling (High to Low) while SCLK  
is high.  
Stop  
ACK  
A unique condition signaling the end  
of a transfer indicated by SDA rising  
(Low to High) while SCLK is high.  
A Receiver acknowledges the receipt  
of each byte with this unique condi-  
tion. The Receiver pulls SDA low  
during SCLK high of the ACK clock-  
pulse. The Master provides the clock  
pulse for the ACK cycle.  
5.1.5  
STOP CONDITION (STOP)  
A low-to-high transition of the SDA line while the clock  
(SCLK) is high determines a Stop condition. All opera-  
tions must be ended with a Stop condition.  
Busy  
Communication is not possible  
because the bus is in use.  
NOT Busy  
Data Valid  
When the bus is idle, both SDA and  
SCLK will remain high.  
5.1.6  
DATA VALID  
The state of SDA must remain stable  
during the high period of SCLK in  
order for a data bit to be considered  
valid. SDA only changes state while  
SCLK is low during normal data trans-  
fers. (See Start and Stop conditions)  
The state of the data line represents valid data when,  
after a Start condition, the data line is stable for the  
duration of the high period of the clock signal.  
The data on the line must be changed during the low  
period of the clock signal. There is one clock pulse per  
bit of data. Each data transfer is initiated with a Start  
condition and terminated with a Stop condition. The  
number of the data bytes transferred between the Start  
and Stop conditions is determined by the master device  
and is unlimited.  
5.1.1  
DATA TRANSFER  
The TC654/TC655 support a bi-directional 2-Wire bus  
and data transmission protocol. The serial protocol  
sequencing is illustrated in Figure 1-1. Data transfers  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 15  
TC654/TC655  
last byte that has been clocked out of the slave. In this  
case, the slave (TC654/TC655) will leave the data line  
high to enable the master device to generate the Stop  
condition.  
5.1.7  
ACKNOWLEDGE (ACK)  
Each receiving device, when addressed, is obliged to  
generate an acknowledge bit after the reception of  
each byte. The master device must generate an extra  
clock pulse, which is associated with this acknowledge  
bit.  
5.2  
SMBus Protocols  
The TC654/TC655 devices communicate with three  
standard SMBus protocols. These are the write byte,  
read byte and receive byte. The receive byte is a short-  
ened method for reading from, or writing to, a register  
which had been selected by the previous read or write  
command. These transmission protocols are shown in  
Figures 5-1, 5-2 and 5-3.  
The device that acknowledges has to pull down the  
SDA line during the acknowledge clock pulse in such a  
way that the SDA line is stable low during the high  
period of the acknowledge related clock pulse. Setup  
and hold times must be taken into account. During  
reads, a master device must signal an end of data to  
the slave by not generating an acknowledge bit on the  
S
ADDRESS  
7 Bits  
WR  
ACK  
COMMAND  
8 Bits  
ACK  
DATA  
8 Bits  
ACK  
P
Slave Address  
Command Byte: selects  
which register you are  
writing to.  
Data Byte: data goes  
into the register set  
by the command byte.  
FIGURE 5-1:  
SMBus Protocol: Write Byte Format.  
S
ADDRESS  
7 Bits  
WR  
ACK  
COMMAND  
8 Bits  
ACK  
Slave Address  
Command Byte: selects  
which register you are  
writing to.  
S
ADDRESS  
7 Bits  
RD  
ACK  
DATA  
8 Bits  
NACK  
P
Slave Address:  
repeated due to change  
in data flow direction.  
Data Byte: reads from  
the register set by the  
command byte.  
FIGURE 5-2:  
SMBus Protocol: Read Byte Format.  
S
ADDRESS  
7 Bits  
RD  
ACK  
DATA  
8 Bits  
NACK  
P
Slave Address  
Data Byte: reads data from  
the register commanded by  
the last Read Byte or Write  
Byte transmission  
FIGURE 5-3:  
SMBus Protocol: Receive Byte Format.  
S = Start Condition  
P = Stop Condition  
ACK = Acknowledge = 0  
NACK = Not Acknowledged = 1  
Shaded = Slave Transmission  
WR = Write = 0  
RD = Read = 1  
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TC654/TC655  
6.0  
REGISTER SET  
The TC654/TC655 devices contain 9 registers that pro-  
vide a variety of data and functionality control to the  
outside system. These registers are listed below in  
Table 6-1. Of key importance is the command byte  
information, which is needed in the read and write pro-  
tocols in order to select the individual registers.  
TABLE 6-1:  
Register  
COMMAND BYTE ASSIGNMENTS  
Command  
Read  
Write  
POR Default State  
Function  
0000 0000  
0000 0001  
0000 0010  
0000 0011  
0000 0100  
0000 0101  
0 0000 0000  
0 0000 0000  
0000 1010  
0000 1010  
0000 1010  
00X0 0X00  
RPM1  
X
X
X
X
X
X
—
—
X
RPM Output 1  
RPM2  
RPM Output 2  
FAN_FAULT1  
FAN_FAULT2  
CONFIG  
STATUS  
Fan Fault 1 Threshold  
Fan Fault 2 Threshold  
Configuration  
X
X
—
Status. See Section 6.4 “Status  
Register (Status)”, Status Register  
explanation of X  
0000 0110  
0000 0111  
0000 1000  
0000 0010  
0101 0100  
0000 000X  
DUTY_CYCLE  
MFR_ID  
X
X
X
X
Fan Speed Duty Cycle  
—
—
Manufacturer Identification  
VER_ID  
Version Identification:  
(X = ‘0’ TC654, X = ‘1’ TC655)  
the RPM information in 50 RPM (8-bit) or 25 RPM (9-  
bit) increments. This is selected via RES (bit 6<0>) in  
the Configuration Register, with ‘0’ = 50 RPM and  
‘1’ = 25 RPM. The default state is zero (50 RPM). The  
maximum fan RPM value that can be read is  
12775 RPM. If this value is exceeded, R2CO (bit 4<0>)  
and R1CO (bit 3<0>) in the Status Register will be set to  
a '1' to indicate that a counter overflow of the respective  
RPM register has occurred. Register 6-1 shows the  
RPM output register 9-bit format.  
6.1  
RPM-OUTPUT1 & RPM-OUTPUT2  
Registers (RPM1 & RPM2)  
As discussed in Section 4.7 “Sensing Fan Operation  
(SENSE1 & SENSE2)”, fan current pulses are detected  
at the SENSE1 and SENSE2 inputs of the TC654/  
TC655 device. The current pulse information is used to  
calculate the fan RPM. The fan RPM data for fans 1 and  
2 is then written to registers RPM1 and RPM2, respec-  
tively. RPM1 and RPM2 are 9-bit registers that provide  
REGISTER 6-1:  
RPM OUTPUT REGISTERS (RPM1 & RPM2)  
D(8)  
D(7)  
D(6)  
D(5)  
D(4)  
D(3)  
D(2)  
D(1)  
D(0)  
RPM  
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
1
0
.
0
25  
50  
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
12750  
12775  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 17  
 
 
TC654/TC655  
in RPM1 and RPM2 Registers) drops below the value  
that is set in the Fan Fault Registers for more than  
2.4sec, a fan fault indication will be given. F1F (bit  
0<0>) and F2F (bit 1<0>) in the Status Register indi-  
cate fan fault conditions for fan 1 and fan 2, respec-  
tively. The FAULT output will also be pulled low in a fan  
fault condition. Changing FFCLR (bit 7<0>) in the Con-  
figuration Register will reset the fan fault bits in the Sta-  
tus Register as well as the FAULT output. See  
Register 6-2 for the Fan Fault Threshold Register 8-bit  
format.  
6.2  
FAN_FAULT1 & FAN_FAULT2  
Threshold Registers  
(FAN_FAULT1 & FAN_ FAULT2)  
The Fan Fault Threshold Registers (FAN_FAULT1 and  
FAN_ FAULT2) are used to set the fan fault threshold  
levels for fan 1 and fan 2, respectively. The Fan Fault  
Registers are 8-bit, read/writable registers that allow  
the fan fault RPM threshold to be set in 50 RPM incre-  
ments. The default setting for both Fan Fault registers  
is 500 RPM (0000 1010). The maximum set point  
value is 12750 RPM. If the measured fan RPM (stored  
REGISTER 6-2:  
FAN FAULT THRESHOLD REGISTERS (FAN_FAULT1 & FAN_FAULT2)  
D(7)  
D(6)  
D(5)  
D(4)  
D(3)  
D(2)  
D(1)  
D(0)  
RPM  
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
0
0
.
0
50  
100  
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
12700  
12750  
DS20001734C-page 18  
2002-2014 Microchip Technology Inc.  
 
TC654/TC655  
VOUT duty cycle (fan speed) control method, select the  
fan current pulses per rotation for fans 1 and 2 (for fan  
RPM calculation) and put the TC654/TC655 device into  
a Shutdown mode to save power consumption. See  
Register 6-3 below for the Configuration Register bit  
descriptions.  
6.3  
CONFIGURATION REGISTER  
(CONFIG)  
The Configuration Register is an 8-bit read/writable  
multi-function control register. This register allows the  
user to clear fan faults, select RPM resolution, select  
REGISTER 6-3: CONFIGURATION REGISTER (CONFIG)  
R/W-0  
R/W-0  
RES  
R/W-0  
R/W-0  
R/W-1  
R/W-0  
R/W-1  
R/W-0  
SDM  
FFCLR  
DUTYC  
F2PPR  
F2PPR  
F1PPR  
F1PPR  
bit 7  
bit 0  
bit 7  
bit 6  
bit 5  
FFCLR: Fan Fault Clear  
1= Clear Fan Fault. This will reset the Fan Fault bits in the Status Register and the FAULT output.  
0= Normal Operation (default)  
RES: Resolution Selection for RPM Output Registers  
1= RPM Output Registers (RPM1 and RPM2) will be set for 25 RPM (9-bit) resolution.  
0= RPM Output Registers (RPM1 and RPM2) will be set for 50 RPM (8-bit) resolution. (default)  
DUTYC: Duty Cycle Control Method  
1= The VOUT duty cycle will be controlled via the SMBus interface. The value for the VOUT duty cycle  
will be taken from the duty cycle register (DUTY_CYCLE).  
0= The VOUT duty cycle will be controlled via the VIN analog input pin. The VOUT duty cycle value will  
be between 30% and 100% for VIN values between 1.62V and 2.6V typical. If the VIN pin is open  
when this mode is selected, the VOUT duty cycle will default to 39.33%. (default)  
bit 4-3  
bit 2-1  
bit 0  
F2PPR: Fan 2 Pulses Per Rotation  
The TC654/TC655 device uses this setting to understand how many current pulses per revolution Fan 2  
should have. It then uses this as part of the calculation for the fan 2 RPM value in the RPM2 Register.  
See Section 7.7 “Determining Current Pulses Per Revolution of Fans” for application information on  
determining your fan’s number of current pulses per revolution.  
00= 1  
01= 2 (default)  
10= 4  
11= 8  
F1PPR: Fan 1 Pulses Per Rotation  
The TC654/TC655 device uses this setting to understand how many current pulses per revolution Fan 1  
should have. It then uses this as part of the calculation for the fan 1 RPM value for the RPM1 Register.  
See Section 7.7 “Determining Current Pulses Per Revolution of Fans” for application information on  
determining your fan’s number of current pulses per revolution.  
00= 1  
01= 2 (default)  
10= 4  
11= 8  
SDM: Shutdown Mode  
1= Shutdown mode. See Section 4.9 “Low-Power Shutdown Mode” for more information on low-  
power Shutdown mode.  
0= Normal operation. (default)  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
U = Unimplemented bit, read as ‘0’  
’0’ = Bit is cleared x = Bit is unknown  
’1’ = Bit is set  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 19  
 
 
TC654/TC655  
and over-temperature indication are all available in the  
Status register. The Status register is an 8-bit Read-  
Only register with bits 6 and 7 unused. See Register 6-  
4 below for the bit descriptions.  
6.4  
STATUS REGISTER (STATUS)  
The Status register provides all the information about  
what is going on within the TC654/TC655 devices. Fan  
fault information, VIN status, RPM counter overflow,  
REGISTER 6-4:  
STATUS REGISTER (STATUS)  
U-0  
—
U-0  
—
R-X  
R-0  
R-0  
R-X  
R-0  
F2F  
R-0  
OTF  
R2CO  
R1CO  
VSTAT  
F1F  
bit 7  
bit 0  
bit 7-6  
bit 5  
Unimplemented: Read as ‘0’  
OTF: Over-Temperature Fault Condition  
For the TC654/TC655 device, this bit is set to the proper state immediately at start-up and is therefore  
treated as an unknown (X). If VIN is greater than the threshold required for 100% duty cycle on VOUT  
(2.6V typical), then the bit will be set to a ‘1’. If it is less than the threshold, the bit will be set to ‘0’. This  
is determined at power-up.  
1= Over-Temperature condition has occurred.  
0= Normal operation. VIN is less than 2.6V.  
bit 4  
bit 3  
R2CO: RPM2 Counter Overflow  
1= Fault condition. The maximum RPM reading of 12775 RPM in register RPM2 has been exceeded.  
This bit will automatically reset to zero when the RPM reading comes back into range.  
0= Normal operation. RPM reading is within limits (default).  
R1CO: RPM1 Counter Overflow  
1= Fault condition. The maximum RPM reading of 12775 RPM in register RPM1 has been exceeded.  
This bit will automatically reset to zero when the RPM reading comes back into range.  
0= Normal operation. RPM reading is within limits (default).  
bit 2  
VSTAT: VIN Input Status  
For the TC654/TC655 devices, the VIN pin status is checked immediately at power-up. If no external  
thermistor or voltage output network is connected (VIN is open), this bit is set to a ‘1’. If an external net-  
work is detected, this bit is set to ‘0’. If the VIN pin is open and SMBus operation has not been selected  
in the Configuration Register, the VOUT duty cycle will default to 39.33%.  
1= VIN is open.  
0= Normal operation. voltage present at VIN.  
bit 1  
bit 0  
F2F: Fan 2 Fault  
1= Fault Condition. The value for fan RPM in the RPM2 Register has fallen below the value set in the  
FAN_FAULT2 Threshold Register. The speed of Fan 2 is too low and a fault condition is being indi-  
cated. The FAULT output will be pulled low at the same time. This fault bit can be cleared using the  
Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration Register.  
0= Normal Operation (default).  
F1F: Fan 1 Fault  
1= Fault Condition. The value for fan RPM in the RPM1 Register has fallen below the value set in the  
FAN_FAULT1 Threshold Register. The speed of Fan 1 is too low and a fault condition is being indi-  
cated. The FAULT output will be pulled low at the same time. This fault bit can be cleared using the  
Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration Register.  
0= Normal Operation (default).  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
U = Unimplemented bit, read as ‘0’  
’0’ = Bit is cleared x = Bit is unknown  
’1’ = Bit is set  
DS20001734C-page 20  
2002-2014 Microchip Technology Inc.  
 
TC654/TC655  
6.5  
DUTY-CYCLE Register  
(DUTY_CYCLE)  
6.6  
Manufacturer’s Identification  
Register (MFR_ID)  
The DUTY_CYCLE register is a 4-bit read/writable reg-  
ister used to control the duty cycle of the VOUT output.  
The controllable duty cycle range via this register is  
30% to 100%, with programming steps of 4.67%.This  
method of duty cycle control is mainly used with the  
SMBus interface. However, if the VIN method of duty  
cycle control has been selected (or defaulted to), and  
the VIN pin is open, the duty cycle will go to the default  
setting of this register, which is 0010 (39.33%). The  
duty cycle settings are shown in Register 6-5.  
This register allows the user to identify the manufac-  
turer of the part. The MFR_ID register is an 8-bit Read-  
Only register. See Register 6-6 for the Microchip man-  
ufacturer ID.  
REGISTER 6-6:  
MANUFACTURER’S  
IDENTIFICATION  
REGISTER (MFR_ID)  
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]  
0
1
0
1
0
1
0
0
REGISTER 6-5:  
DUTY-CYCLE REGISTER  
(DUTY_CYCLE)  
6.7  
Version ID Register (VER_ID)  
D(3)  
D(2)  
D(1)  
D(0)  
Duty-Cycle  
This register is used to indicate which version of the  
device is being used, either the TC654 or the TC655.  
This register is a simple 2-bit Read-Only register.  
0
0
0
0
0
0
0
0
1
0
1
0
30%  
34.67%  
39.33% (default for V  
IN  
open and when SMBus  
is not selected)  
REGISTER 6-7:  
VERSION ID REGISTER  
(VER_ID)  
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
44%  
D[1] D[0] Version  
48.67%  
53.33%  
58%  
0
0
0
1
TC654  
TC655  
62.67%  
67.33%  
72%  
76.67%  
81.33%  
86%  
90.67%  
95.33%  
100%  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 21  
 
 
TC654/TC655  
7.0  
7.1  
APPLICATIONS INFORMATION  
SDA  
SCLK  
Connecting to the SMBus  
PIC16F876  
Microcontroller  
The SMBus is an open-collector bus, requiring pull-up  
resistors connected to the SDA and SCLK lines. This  
configuration is shown in Figure 7-1.  
24LC01  
EEPROM  
TC654/TC655  
Fan Speed  
Controller  
VDD  
TCN75  
Temperature  
Sensor  
TC654/TC655  
R
R
SDA  
SCLK  
FIGURE 7-2:  
Multiple Devices on SMBus.  
7.2 Setting the PWM Frequency  
Range for R: 13.2 kto 46 kfor VDD = 5.0V  
FIGURE 7-1: Pull-up Resistors On  
The PWM frequency of the VOUT output is set by the  
capacitor value attached to the CF pin. The PWM fre-  
quency will be 30 Hz (typical) for a 1 µF capacitor. The  
relationship between frequency and capacitor value is  
linear, making alternate frequency selections easy.  
SMBus.  
The number of devices connected to the bus is limited  
only by the maximum rise and fall times of the SDA  
and SCLK lines. Unlike I2C specifications, SMBus  
does not specify a maximum bus capacitance value.  
Rather, the SMBus specification calls out that the max-  
imum current through the pull-up resistor be 350 µA  
(minimum, 100 µA, is also specified). Therefore, the  
value of the pull-up resistors will vary depending on the  
system’s bias voltage, VDD. Minimizing bus capaci-  
tance is still very important as it directly affects the rise  
and fall times of the SDA and SCLK lines. The range  
for pull-up resistor values for a 5V system are shown  
in Figure 7-1.  
As stated in previous sections, the PWM frequency  
should be kept in the range of 15 Hz to 35 Hz. This will  
eliminate the possibility of having audible frequencies  
when varying the duty cycle of the fan drive.  
A very important factor to consider when selecting the  
PWM frequency for the TC654/TC655 devices is the  
RPM rating of the selected fan and the minimum duty  
cycle for operation. For fans that have a full-speed rat-  
ing of 3000 RPM or less, it is desirable to use a lower  
PWM frequency. A lower PWM frequency allows for a  
longer time period to monitor the fan current pulses.  
The goal is to be able to monitor at least two fan current  
pulses during the on time of the VOUT output.  
Although SMBus specifications only require the SDA  
and SCLK lines to pull down 350 µA, with a maximum  
voltage drop of 0.4V, the TC654/TC655 has been  
designed to meet a maximum voltage drop of 0.4V, with  
3 mA of current. This allows lower values of pull-up  
resistors to be used, which will allow higher bus capac-  
itance. If this is to be done, though, all devices on the  
bus must be able to meet the same pull-down current  
requirements as well.  
Example: Your system design requirement is to oper-  
ate the fan at 50% duty cycle when ambient tempera-  
tures are below 20°C. The fan full-speed RPM rating is  
3000 RPM and has four current pulses per rotation. At  
50% duty cycle, the fan will be operating at approxi-  
mately 1500 RPM.  
EQUATION  
A possible configuration using multiple devices on the  
SMBus is shown in Figure 7-2.  
60 1000  
Time for one revolution (msec.) = ----------------------- = 40  
1500  
If one fan revolution occurs in 40 msec, then each fan  
pulse occurs 10 msec apart. In order to detect two fan  
current pulses, the on time of the VOUT pulse must be  
at least 20 msec. With the duty cycle at 50%, the total  
period of one cycle must be at least 40 msec, which  
makes the PWM frequency 25 Hz. For this example, a  
PWM frequency of 20 Hz is recommended. This would  
define a CF capacitor value of 1.5 µF.  
DS20001734C-page 22  
2002-2014 Microchip Technology Inc.  
 
 
TC654/TC655  
EQUATION  
7.3  
Temperature Sensor Design  
VDD R2  
As discussed in previous sections, the VIN analog input  
has a range of 1.62V to 2.6V (typical), which represents  
a duty cycle range on the VOUT output of 30% to 100%,  
respectively. The VIN voltages can be thought of as rep-  
resenting temperatures. The 1.62V level is the low tem-  
perature at which the system only requires 30% fan  
speed for proper cooling. The 2.6V level is the high  
temperature, for which the system needs maximum  
cooling capability. Therefore, the fan needs to be at  
100% speed.  
Vt1= ---------------------------------------  
RTEMPt1+ R2  
VDD R2  
Vt2= ---------------------------------------  
RTEMPt2+ R2  
In order to solve for the values of R1 and R2, the values  
for VIN and the temperatures at which they are to occur  
need to be selected. The variables, t1 and t2, represent  
the selected temperatures. The value of the thermistor  
at these two temperatures can be found in the thermis-  
tor data sheet. With the values for the thermistor and  
the values for VIN, you now have two equations from  
which the values for R1 and R2 can be found.  
One of the simplest ways of sensing temperature over  
a given range is to use a thermistor. By using an NTC  
thermistor as shown in Figure 7-3, a temperature vari-  
ant voltage can be created.  
Example: The following design goals are desired:  
VDD  
• Duty Cycle = 50% (VIN = 1.9V) with Temperature  
(t1) = 30°C  
IDIV  
• Duty Cycle = 100% (VIN = 2.6V) with Temperature  
(t2) = 60°C  
Using a 100 kthermistor (25°C value), we look up the  
thermistor values at the desired temperatures:  
Rt  
R1  
• Rt = 79428 @ 30°C  
• Rt = 22593 @ 60°C  
VIN  
Substituting these numbers into the given equations,  
we come up with the following numbers for R1 and R2.  
R2  
• R1 = 34.8 k  
• R2 = 14.7 k  
FIGURE 7-3:  
Temperature Sensing  
Circuit.  
140000  
120000  
100000  
80000  
60000  
40000  
20000  
0
4.000  
3.500  
3.000  
2.500  
2.000  
1.500  
1.000  
0.500  
0.000  
Figure 7-3 represents a temperature dependent volt-  
age divider circuit. Rt is a conventional NTC thermistor,  
R1 and R2 are standard resistors. R1 and Rt form a par-  
allel resistor combination that will be referred to as  
RTEMP (RTEMP = R1 * Rt/ R1 + Rt). As the temperature  
increases, the value of Rt decreases and the value of  
RTEMP will decrease with it. Accordingly, the voltage at  
VIN increases as temperature increases, giving the  
desired relationship for the VIN input. The purpose of  
R1 is to help linearize the response of the sensing net-  
work. Figure 7-4 shows an example of this.  
VIN Voltage  
NTC Thermistor  
100K @ 25ºC  
RTEMP  
Temperature (ºC)  
There are many values that can be chosen for the NTC  
thermistor. There are also thermistors which have a lin-  
ear resistance instead of logarithmic, which can help to  
eliminate R1. If less current draw from VDD is desired,  
then a larger value thermistor should be chosen. The  
voltage at the VIN pin can also be generated by a volt-  
age output temperature sensor device. The key is to  
get the desired VIN voltage to system (or component)  
temperature relationship.  
FIGURE 7-4:  
How Thermistor Resistance,  
VIN, And RTEMP Vary With Temperature.  
Figure 7-4 graphs three parameters versus tempera-  
ture. They are Rt, R1 in parallel with Rt, and VIN. As  
described earlier, you can see that the thermistor has a  
logarithmic resistance variation. When put in parallel  
with R1, though, the combined resistance becomes  
more linear, which is the desired effect. This gives us  
the linear looking curve for VIN.  
The following equations apply to the circuit in  
Figure 7-3.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 23  
 
 
TC654/TC655  
TABLE 7-1:  
RSENSE VS. FAN CURRENT  
7.4  
FanSense Network (R  
&
SENSE  
C
)
Nominal Fan Current  
(mA)  
SENSE  
R
(ohm)  
SENSE  
The network comprised of RSENSE and CSENSE allows  
the TC654/TC655 devices to detect commutation of the  
fan motor. RSENSE converts the fan current into a volt-  
age. CSENSE AC couples this voltage signal to the  
SENSE pins (SENSE1 and SENSE2). The goal of the  
SENSE network is to provide a voltage pulse to the  
SENSE pin that has a minimum amplitude of 120 mV.  
This will ensure that the current pulse caused by the  
fan commutation is recognized by the TC654/TC655  
device.  
50  
9.1  
100  
150  
200  
250  
300  
350  
400  
450  
500  
4.7  
3.0  
2.4  
2.0  
1.8  
1.5  
1.3  
1.2  
1.0  
A 0.1 µF ceramic capacitor is recommended for  
CSENSE. Smaller values will require larger sense resis-  
tors be used. Using a 0.1 µF capacitor results in rea-  
sonable values for RSENSE. Figure 7-5 illustrates a  
typical SENSE network.  
Figure 7-6 shows some typical waveforms for the fan  
current and the voltage at the Sense pins.  
FAN  
FAN  
1
2
RISO1  
715  
RISO2  
VOUT  
715   
SENSE1  
CSENSE1  
(0.1 µF typical)  
RSENSE1  
SENSE2  
CSENSE2  
RSENSE2  
(0.1 µF typical)  
FIGURE 7-6:  
Sense Pin Waveforms.  
Typical Fan Current and  
Note: See Table 7-1 for RSENSE1 and RSENSE2 values.  
FIGURE 7-5:  
Typical Sense Network.  
7.5  
Output Drive Device Selection  
The value of RSENSE will change with the current rating  
of the fan. A key point is that the current rating of the  
fan specified by the manufacturer may be a worst case  
rating. The actual current drawn by the fan may be  
lower than this rating. For the purposes of setting the  
value for RSENSE, the operating fan current should be  
measured.  
The TC654/TC655 is designed to drive two external  
NPN transistors or two external N-channel MOSFETs  
as the fan speed modulating elements. These two  
arrangements are shown in Figure 7-7. For lower cur-  
rent fans, NPN transistors are a very economical  
choice for the fan drive device. It is recommended that,  
for higher-current fans (500 mA and above), MOSFETs  
be used as the fan drive device. Table 7-2 provides  
some possible part numbers for use as the fan drive  
element.  
Table 7-1 shows values of RSENSE according to the  
nominal operating current of the fan. The fan currents  
are average values. If the fan current falls between two  
of the values listed, use the higher resistor value.  
When using an NPN transistor as the fan drive ele-  
ment, a base current limiting resistor must be used.  
This is shown in Figure 7-7.  
When using MOSFETs as the fan drive element, it is  
very easy to turn the MOSFETs on and off at very high  
rates. Because the gate capacitances of these small  
DS20001734C-page 24  
2002-2014 Microchip Technology Inc.  
 
 
 
TC654/TC655  
MOSFETs are very low, the TC654/TC655 can charge  
and discharge them very quickly, leading to very fast  
edges. Of key concern is the turn-off edge of the MOS-  
FET. Since the fan motor winding is essentially an  
inductor, once the MOSFET is turned off, the current  
that was flowing through the motor wants to continue to  
flow. If the fan does not have internal clamp diodes  
around the windings of the motor, there is no path for  
this current to flow through, and the voltage at the drain  
of the MOSFET may rise until the drain to source rating  
of the MOSFET is exceeded. This will most likely cause  
the MOSFET to go into Avalanche mode. Since there  
is very little energy in this occurrence, it will probably  
not fail the device, but it would be a long term reliability  
issue. The following is recommended:  
• Ask how the fan is designed. If the fan has clamp  
diodes internally, you will not experience this  
problem. If the fan does not have internal clamp  
diodes, it is a good idea to put one externally  
(Figure 7-8). You can also put a resistor between  
VOUT and the gate of the MOSFET, which will help  
slow down the turn-off and limit this condition.  
VDD  
VDD  
FAN  
FAN  
RBASE  
Q1  
VOUT  
Q1  
VOUT  
RSENSE  
RSENSE  
GND  
GND  
a) Single Bipolar Transistor  
b) N-Channel MOSFET  
FIGURE 7-7:  
Output Drive Device Configurations.  
TABLE 7-2:  
Device  
FAN DRIVE DEVICE SELECTION TABLE (Note 2)  
Max Vbe sat /  
Fan Current  
(mA)  
Suggested  
Rbase (ohms)  
Package  
Min hfe  
Vce/V  
DS  
Vgs(V)  
MMBT2222A  
MPS2222A  
MPS6602  
SI2302  
SOT-23  
TO-92  
1.2  
1.2  
1.2  
2.5  
2.5  
4.5  
4.5  
50  
50  
40  
40  
40  
20  
20  
30  
60  
150  
150  
500  
500  
500  
1000  
500  
800  
800  
TO-92  
50  
301  
SOT-23  
SOT-23  
SO-8  
NA  
NA  
NA  
NA  
Note 1  
Note 1  
Note 1  
Note 1  
MGSF1N02E  
SI4410  
SI2308  
SOT-23  
Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times.  
2: These drive devices are suggestions only. Fan currents listed are for individual fans.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 25  
 
 
TC654/TC655  
The first piece of information required is the fan's full-  
speed RPM rating. The fan RPM rating can then be  
converted to give the time for one revolution using the  
following equation:  
FAN  
EQUATION  
60 1000  
Time for one revolution (msec.) = -----------------------  
Fan RPM  
The fan current can now be monitored over this time  
period. The number of pulses occurring in this time  
period is the fan's "Current Pulses per Rotation" rating  
which is needed in order to accurately read fan RPM.  
Q1  
VOUT  
RSENSE  
Example: The full-speed fan RPM rating is 8200 RPM.  
From this, the time for one fan revolution is calculated  
to be 7.3 msec, using the previously discussed equa-  
tion. Using a current probe, the fan current can be mon-  
itored as the fan is operating at full speed. Figure 7-9  
shows the fan current pulses for this example. The  
7.44 msec window, marked by the cursors, is very near  
the 7.3 msec calculated above, and is within the toler-  
ance of the fan ratings. Four current pulses occur within  
this 7.44 msec time frame. Given this information,  
F2PPR (bits 4-3<01>) and F1PPR (bits 2-1<01>) in the  
Configuration Register, should be set to '10' to indicate  
4 current pulses per revolution.  
GND  
Q1- N-Channel MOSFET  
FIGURE 7-8:  
Off.  
Clamp Diode For Fan Turn-  
7.6  
Bias Supply Bypassing and Noise  
Filtering  
The bias supply (VDD) for the TC654/TC655 devices  
should be bypassed with a 1 µF ceramic capacitor. This  
capacitor will help supply the peak currents that are  
required to drive the base/gate of the external fan drive  
devices.  
As the VIN pin controls the duty cycle in a linear fashion,  
any noise on this pin can cause duty cycle jittering. For  
this reason, the VIN pin should be bypassed with a  
0.01 µF capacitor.  
In order to keep fan noise off of the TC654/TC655  
device ground, individual ground returns for the TC654/  
TC655 and the low side of the fan current sense resis-  
tor should be used.  
7.7  
Determining Current Pulses Per  
Revolution of Fans  
There are many different fan designs available in the  
marketplace today. The motor designs can vary and,  
along with it, the number of current pulses in one fan  
revolution. In order to correctly measure and communi-  
cate the fan speed, the TC654/TC655 must be pro-  
grammed for the proper number of fan current pulses  
per revolution. This is done by setting the F2PPR and  
F1PPR bits in the Configuration Register to the proper  
values (see Section 6.3 “Configuration Register  
(Config)” for settings). A fan's current pulses per revo-  
lution can be determined in the following manner.  
FIGURE 7-9:  
Revolution Fan.  
Four Current Pulses Per  
7.8  
How to Eliminate False Current  
Pulse Sensing  
During the PWM mode of operation, some fans will  
generate an extra current pulse. This pulse occurs  
when the external drive device is turned on and is, in  
most cases, caused by the fan's electronics that control  
the fan motor. This pulse does not represent true fan  
current and needs to be blanked out. This is particularly  
important for detecting a fan in a locked rotor condition.  
Figure 7-10 shows the voltage pulse at the Sense pin,  
DS20001734C-page 26  
2002-2014 Microchip Technology Inc.  
 
TC654/TC655  
which is caused by the fan's "extra" current pulse  
during PWM output turn-on.  
FAN  
1
FAN  
2
RISO1  
CSLOW1  
(0.1uF  
typical)  
Sense Pin Voltage  
"Extra Pulse"  
RISO2  
V
OUT  
CSLOW2  
SENSE1  
(0.1 µF typical)  
CSENSE  
(0.1 µF typical)  
RSENSE1  
TC654/  
TC655  
V
OUT  
PWM  
SENSE2  
CSENSE2  
(0.1 µF typical)  
GND  
RSENSE2  
FIGURE 7-11:  
Capacitor.  
Transistor Drive with CSLOW  
FIGURE 7-10:  
Extra Pulse at Sense Pin.  
This problem occurs mainly with fans that have a cur-  
rent waveshape like the one shown in Figure 7-9. For  
configurations where an NPN transistor is being used  
as the external drive device, the typical RSENSE and  
CSENSE scheme can continue to be used to sense the  
fan current pulses. In order to eliminate the extra cur-  
rent pulse, a slow-down capacitor can be placed from  
the base of the transistor to ground. A 0.1 µF capacitor  
is appropriate in most cases. This arrangement is  
shown in Figure 7-11. This capacitor will help to slow  
down the turn-on edge of the transistor and reduce the  
amplitude of the extra current pulse.  
FAN  
1
FAN  
2
V
OUT  
RSLOW1  
(1 k  
typical)  
SENSE1  
For configurations using an N-channel MOSFET as the  
drive device, the slow-down capacitor does not fix all  
conditions and the current sensing scheme must be  
changed. Since the current for this type of fan always  
returns to zero, the coupling capacitor (CSENSE) is not  
needed. Instead, it will be replaced by an R-C configu-  
ration to eliminate the voltage pulse generated by the  
extra current pulse. This new sensing configuration is  
shown in Figure 7-12. The values of the resistor/capac-  
itor combination should be adjusted so that the voltage  
pulse generated by the extra current pulse is smoothed  
and is not registered by the TC654/TC655 as a true fan  
current pulse. Typical values for RSLOW and CSLOW are  
1 Kand 1000 pF, respectively.  
CSLOW1  
TC654/  
TC655  
(1000pF typical)  
RSENSE1  
RSLOW2  
(1 ktypical)  
SENSE2  
GND  
RSENSE2  
CSLOW  
2
(1000pF typical)  
FIGURE 7-12:  
FET Drive with RSLOW/  
SLOW Sense Scheme.  
C
2002-2014 Microchip Technology Inc.  
DS20001734C-page 27  
 
 
TC654/TC655  
8.0  
8.1  
PACKAGING INFORMATION  
Package Marking Information  
10-Lead MSOP (3x3 mm)  
Example  
TC654E  
135256  
Legend: XX...X Customer-specific information  
Y
YY  
WW  
NNN  
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
Pb-free JEDEC® designator for Matte Tin (Sn)  
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
)
e3  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information.  
DS20001734C-page 28  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
UN  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 29  
TC654/TC655  
UN  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
DS20001734C-page 30  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
10-Lead Plastic Micro Small Outline Package (UN) [MSOP]  
Note: For the most current package drawings, please see the Microchip Packaging Specification located at  
http://www.microchip.com/packaging  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 31  
TC654/TC655  
NOTES:  
DS20001734C-page 32  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
APPENDIX A: REVISION HISTORY  
Revision C (July 2014)  
The following is the list of modifications.  
1. Updated the package marking drawing.  
2. Added Appendix A.  
Revision B (January 2013)  
The following is the list of modifications.  
1. Added a note to the package outline drawing.  
Revision A (2002)  
• Original Release of this Document.  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 33  
TC654/TC655  
NOTES:  
DS20001734C-page 34  
2002-2014 Microchip Technology Inc.  
TC654/TC655  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
PART NO.  
Device  
X
/XX  
Examples:  
Temperature Package  
Range  
a)  
b)  
c)  
d)  
TC654EUN: PWM Fan Speed Controller w/  
Fault Detection  
TC654EUNT: PWM Fan Speed Controller  
w/Fault Detection (Tape and Reel)  
Device:  
TC654:  
PWM Fan Speed Controller w/Fault Detection  
TC655EUN: PWM Fan Speed Controller w/  
Fault Detection  
TC654T: PWM Fan Speed Controller w/Fault Detection  
(Tape and Reel)  
TC655:  
TC655T: PWM Fan Speed Controller w/Fault Detection  
(Tape and Reel)  
PWM Fan Speed Controller w/Fault Detection  
TC655EUNT: PWM Fan Speed Controller  
w/Fault Detection (Tape and Reel)  
Temperature Range:  
Package:  
E
=
=
-40C to +85C  
UN  
Plastic Micro Small Outline (MSOP), 10-lead  
2002-2014 Microchip Technology Inc.  
DS20001734C-page35  
TC654/TC655  
NOTES:  
DS20001734C-page 36  
2002-2014 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, dsPIC,  
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,  
LANCheck, MediaLB, MOST, MOST logo, MPLAB,  
32  
OptoLyzer, PIC, PICSTART, PIC logo, RightTouch, SpyNIC,  
SST, SST Logo, SuperFlash and UNI/O are registered  
trademarks of Microchip Technology Incorporated in the  
U.S.A. and other countries.  
The Embedded Control Solutions Company and mTouch are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A.  
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,  
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit  
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,  
KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,  
MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code  
Generation, PICDEM, PICDEM.net, PICkit, PICtail,  
RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total  
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,  
WiperLock, Wireless DNA, and ZENA are trademarks of  
Microchip Technology Incorporated in the U.S.A. and other  
countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
Silicon Storage Technology is a registered trademark of  
Microchip Technology Inc. in other countries.  
GestIC is a registered trademarks of Microchip Technology  
Germany II GmbH & Co. KG, a subsidiary of Microchip  
Technology Inc., in other countries.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2002-2014, Microchip Technology Incorporated, Printed in  
the U.S.A., All Rights Reserved.  
ISBN: 978-1-63276-362-4  
QUALITY MANAGEMENT SYSTEM  
CERTIFIED BY DNV  
Microchip received ISO/TS-16949:2009 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona; Gresham, Oregon and design centers in California  
and India. The Company’s quality system processes and procedures  
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
== ISO/TS 16949 ==  
2002-2014 Microchip Technology Inc.  
DS20001734C-page 37  
Worldwide Sales and Service  
AMERICAS  
ASIA/PACIFIC  
ASIA/PACIFIC  
EUROPE  
Corporate Office  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support:  
http://www.microchip.com/  
support  
Asia Pacific Office  
Suites 3707-14, 37th Floor  
Tower 6, The Gateway  
Harbour City, Kowloon  
Hong Kong  
Tel: 852-2943-5100  
Fax: 852-2401-3431  
India - Bangalore  
Tel: 91-80-3090-4444  
Fax: 91-80-3090-4123  
Austria - Wels  
Tel: 43-7242-2244-39  
Fax: 43-7242-2244-393  
Denmark - Copenhagen  
Tel: 45-4450-2828  
Fax: 45-4485-2829  
India - New Delhi  
Tel: 91-11-4160-8631  
Fax: 91-11-4160-8632  
France - Paris  
Tel: 33-1-69-53-63-20  
Fax: 33-1-69-30-90-79  
India - Pune  
Tel: 91-20-3019-1500  
Australia - Sydney  
Tel: 61-2-9868-6733  
Fax: 61-2-9868-6755  
Web Address:  
www.microchip.com  
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Tel: 81-6-6152-7160  
Fax: 81-6-6152-9310  
Germany - Dusseldorf  
Tel: 49-2129-3766400  
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Fax: 678-957-1455  
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Tel: 86-10-8569-7000  
Fax: 86-10-8528-2104  
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Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
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Tel: 81-3-6880- 3770  
Fax: 81-3-6880-3771  
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Tel: 86-28-8665-5511  
Fax: 86-28-8665-7889  
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Tel: 512-257-3370  
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Tel: 49-7231-424750  
Korea - Daegu  
Tel: 82-53-744-4301  
Fax: 82-53-744-4302  
Boston  
China - Chongqing  
Tel: 86-23-8980-9588  
Fax: 86-23-8980-9500  
Italy - Milan  
Tel: 39-0331-742611  
Fax: 39-0331-466781  
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Tel: 774-760-0087  
Fax: 774-760-0088  
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Fax: 82-2-558-5932 or  
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Tel: 852-2943-5100  
Fax: 852-2401-3431  
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Fax: 216-447-0643  
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Tel: 48-22-3325737  
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Fax: 972-818-2924  
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Tel: 63-2-634-9065  
Fax: 63-2-634-9069  
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Tel: 86-532-8502-7355  
Fax: 86-532-8502-7205  
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Fax: 65-6334-8850  
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Tel: 86-21-5407-5533  
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Tel: 86-755-8864-2200  
Fax: 86-755-8203-1760  
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Tel: 886-2-2508-8600  
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Tel: 86-27-5980-5300  
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Tel: 949-462-9523  
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Thailand - Bangkok  
Tel: 66-2-694-1351  
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Tel: 408-735-9110  
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Tel: 86-592-2388138  
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Tel: 86-756-3210040  
Fax: 86-756-3210049  
03/25/14  
DS20001734C-page 38  
2002-2014 Microchip Technology Inc.  

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