TC7650CPAG [MICROCHIP]
OP-AMP, 5 uV OFFSET-MAX, 2 MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8;
| 型号： | TC7650CPAG |
| 厂家： | 
MICROCHIP |
| 描述： | OP-AMP, 5 uV OFFSET-MAX, 2 MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8 光电二极管 |
| 文件： | 总14页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TC7650
Chopper Stabilized Operational Amplifier
Package Type
Features
• Low Input Offset Voltage: 0.7µV Typ
• Low Input Offset Voltage Drift: 0.05V/°C Max
• Low Input Bias Current: 10pA Max
• High Impedance Differential CMOS Inputs: 1012
• High Open Loop Voltage Gain: 120dB Min.
• Low Input Noise Voltage: 2.0Vp-p
• High Slew Rate: 2.5V/sec.
8-Pin DIP
TC7650CPA
14-Pin DIP
C
1
2
3
4
8 C
A
B
–
+
V
7
INPUT
INPUT
DD
6 OUTPUT
V
SS
5 OUTPUT CLAMP
• Low Power Operation: 20mW
• Output Clamp Speeds Recovery Time
• Compensated Internally for Stable Unity Gain
Operation
C
C
B
1
14 INT/EXT
• Direct Replacement for ICL7650
• Available in 8-Pin Plastic DIP and 14-Pin Plastic
DIP Packages
A
2
3
4
5
6
7
13 EXT CLK IN
12 INT CLK OUT
NC
Applications
–
V
DD
INPUT
INPUT
11
TC7650CPD
• Instrumentation
+
10 OUTPUT
• Medical Instrumentation
• Embedded Control
NC
9
8
OUTPUT CLAMP
• Temperature Sensor Amplifier
• Strain Gage Amplifier
V
C
SS
RETN
NC = NO INTERNAL CONNECTION
Device Selection Table
Part
Number
Temperature
Range
Package
Max VOS
TC7650CPA 8-Pin PDIP 0°C to +70°C
TC7650CPD 14-Pin PDIP 0°C to +70°C
5V
5V
2001-2012 Microchip Technology Inc.
DS21463C-page 1
TC7650
The TC7650 nulling scheme corrects both DC VOS
errors and VOS drift errors with temperature. A nulling
amplifier alternately corrects its own VOS errors and the
main amplifier VOS error. Offset nulling voltages are
stored on two user supplied external capacitors. The
capacitors connect to the internal amplifier VOS null
points. The main amplifier input signal is never
switched. Switching spikes are not present at the
TC7650 output.
General Description
The TC7650 CMOS chopper stabilized operational
amplifier practically removes offset voltage error terms
from system error calculations. The 5V maximum VOS
specification, for example, represents a 15 times
improvement over the industry standard OP07E. The
50nV/°C offset drift specification is over 25 times lower
than the OP07E. The increased performance elimi-
nates VOS trim procedures, periodic potentiometer
adjustment and the reliability problems caused by dam-
aged trimmers.
The 14-pin dual-in-line package (DIP) has an external
oscillator input to drive the nulling circuitry for optimum
noise performance. Both the 8 and 14-pin DIPs have
an output voltage clamp circuit to minimize overload
recovery time.
The TC7650 performance advantages are achieved
without the additional manufacturing complexity and
cost incurred with laser or "zener zap" VOS trim tech-
niques.
Functional Block Diagram
Output
Clamp
14-Pin DIP Only
INT/EXT
Output Clamp
Circuit
Oscillator
EXT CLK IN
CLK OUT
Main
Amplifier
A
B
Inputs
Output
C
C
B
NULL
Intermod
Compensation
A
B
B
B
A
Null
Amplifier
TC7650
A
*C
RETN
Null
*
For 8-Pin DIP, connect to V
ss
DS21463C-page 2
2001-2012 Microchip Technology Inc.
TC7650
*Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the
device at these or any other conditions above those indi-
cated in the operation sections of the specifications is not
implied. Exposure to Absolute Maximum Rating conditions
for extended periods my affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS*
Total Supply Voltage (VDD to VSS) .......................+18V
Input Voltage .................... (VDD +0.3V) to (VSS – 0.3V)
Storage Temperature Range..............-65°C to +150°C
Voltage on Oscillator Control Pins...............VDD to VSS
Duration of Output Short Circuit.....................Indefinite
Current Into Any Pin............................................10mA
While Operating (Note 3)............................100µA
Package Power Dissipation (TA 70°C)
8-Pin Plastic DIP.......................................730mW
14-Pin Plastic DIP.....................................800mW
Operating Temperature Range
C Device .......................................... 0°C to +70°C
TC7652 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD = +5V, VSS = -5V, CA = CB = 0.1F, TA = +25°C, unless otherwise indicated.
Symbol
Input
Parameter
Min.
Typ
Max
Units
Test Conditions
VOS
Input Offset Voltage
—
—
±0.7
±1.0
±5
—
—
V
TA = +25°C
Over Operating Temp Range
VOS/T
Input Offset Voltage Average
Temperature Coefficient
—
0.01
0.05
V/°C Operating Temperature Range
Offset Voltage vs. Time
—
100
—
nV/
month
IBIAS
Input Bias Current
—
—
—
1.5
35
100
10
150
400
pA
pA
pA
TA = +25°C
0°C TA +70°C
-25°C TA +85°C
IOS
Input Offset Current
—
—
0.5
—
—
—
pA
eNP-P
IN
Input Noise Voltage
2
0.01
VP-P RS = 100, 0 to 10Hz
Input Noise Current
—
pA/Hz f = 10Hz
RIN
Input Resistance
—
1012
-5.2 to +2
130
CMVR
CMRR
Output
A
Common Mode Voltage Range
Common Mode Rejection Ratio
-5
+1.6
—
V
120
dB
CMVR = -5V to +1.5V
Large Signal Voltage Gain
120
130
—
dB
RL = 10k
VOUT
Output Voltage Swing (Note 2)
±4.7
—
±4.85
±4.95
—
—
RL = 10k
RL = 100k
V
V
Clamp ON Current
Clamp OFF Current
25
—
70
1
200
—
A
RL = 100k (Note 1)
pA
-4V < VOUT < +4V (Note 1)
Dynamic
BW
SR
tR
Unity Gain Bandwidth
Slew Rate
—
—
2.0
2.5
0.2
20
—
—
MHz
Unity Gain (+1)
V/sec CL = 50pF, RL = 10k
Rise Time
—
—
sec
Overshoot
—
—
%
fCH
Internal Chopping Frequency
120
200
375
Hz
Pins 12–14 Open (DIP)
No Load
Supply
V
DD, VSS
Operating Supply Range
Supply Current
4.5
—
—
2
16
V
IS
3.5
mA
dB
PSRR
Power Supply Rejection Ratio
120
130
VS = ±3V to ±8V
Note 1: See "Output Clamp" discussion.
2: Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics.
3: Limiting input current to 100A is recommended to avoid latch-up problems.
2001-2012 Microchip Technology Inc.
DS21463C-page 3
TC7650
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Symbol
Description
8-pin DIP 14-pin DIP
1,8
2
2,1
4
CA, CB
-INPUT
+INPUT
VSS
Nulling capacitor pins
Inverting Input
3
5
Non-inverting Input
Negative Power Supply
Output Voltage Clamp
4
7
5
9
OUTPUT
CLAMP
6
10
11
3,6
8
OUTPUT
VDD
Output
7
Positive Power Supply
No internal connection
Capacitor current return pin
—
—
—
—
—
NC
CRETN
12
13
14
INT CLK OUT Internal Clock Output
EXT CLK IN External Clock Input
INT/EXT
Select Internal or External Clock
After the nulling amplifier is zeroed, the main amplifier
is zeroed; the A switches open and B switches close.
3.0
3.1
DETAILED DESCRIPTION
Theory of Operation
The output voltage equation is:
Figure 3-1 shows the major elements of the TC7650.
There are two amplifiers (the main amplifier and the
nulling amplifier), and both have offset null capability.
The main amplifier is connected full-time from the input
to the output. The nulling amplifier, under the control of
the chopping frequency oscillator and clock circuit,
alternately nulls itself and the main amplifier. Two exter-
nal capacitors provide the required storage of the null-
ing potentials and the necessary nulling loop time
constants. The nulling arrangement operates over the
full common mode and power supply ranges, and is
also independent of the output level, thus giving excep-
EQUATION 3-2:
+
-
+
-
V
= A V
+ (V - V ) + A (V - V ) + A
V
OUT
M
OSM
N
N
OSE
EQUATION 3-3:
V
+ V
+
-
OSM
OSN
V
= A
A
V – V + -------------------------------------------
OUT
M
N
A
N
As desired, the device offset voltages are reduced by
the high open loop gain of the nulling amplifier.
tionally high CMRR, PSRR and AVOL
.
Careful balancing of the input switches minimizes
chopper frequency charge injection at the input termi-
nals, and the feed forward type injection into the com-
pensation capacitor that can cause output spikes in this
type of circuit.
3.2
Output Stage/Loading
The output circuit is a high impedance stage (approxi-
mately 18k). With loads less than this, the chopper
amplifier behaves in some ways like a trans-conduc-
tance amplifier whose open-loop gain is proportional to
load resistance. For example, the open loop gain will
be 17dB lower with a 1k load than with a 10k load.
If the amplifier is used strictly for DC, the lower gain is
of little consequence, since the DC gain is typically
greater than 120dB, even with a 1k load. In wideband
applications, the best frequency response will be
achieved with a load resistor of 10k or higher. This
results in a smooth 6dB/octave response from 0.1Hz to
2MHz, with phase shifts of less than 10° in the transi-
The circuit's offset voltage compensation is easily
shown. With the nulling inputs shorted, a voltage
almost identical to the nulling amplifier offset voltage is
stored on CA. The effective offset voltage at the null
amplifier input is:
EQUATION 3-1:
1
V
= -----------------V
OSE
OSN
A
+ 1
N
DS21463C-page 4
2001-2012 Microchip Technology Inc.
TC7650
tion region, where the main amplifier takes over from
the null amplifier. The clock frequency sets the transi-
tion region.
ing sum and difference frequencies, and causing dis-
turbances to the gain and phase versus frequency
characteristics near the chopping frequency. These
effects are substantially reduced in the TC7650 by
feeding the nulling circuit with a dynamic current corre-
sponding to the compensation capacitor current in such
a way as to cancel that portion of the input signal due
to a finite AC gain. The intermodulation and gain/phase
disturbances are held to very low values, and can gen-
erally be ignored.
3.3
Intermodulation
Previous chopper stabilized amplifiers have suffered
from intermodulation effects between the chopper fre-
quency and input signals. These arise because the
finite AC gain of the amplifier results in a small AC sig-
nal at the input. This is seen by the zeroing circuit as an
error signal, which is chopped and fed back, thus inject-
FIGURE 3-1:
TC7650 CONTAINS A NULLING AND MAIN AMPLIFIER. OFFSET CORRECTION
VOLTAGES ARE STORED ON TWO EXTERNAL CAPACITORS.
+
Main
Amplifier
V
+
V
Analog Input
OUT
Null
-
-
V
Gain = A
M
B
A
TC7650
+
C
B
B
A
Null
A
-
C
Null
Amplifier
Gain = A , Offset = V
N
OSN
FIGURE 3-2:
NULLING CAPACITOR
CONNECTION
3.5
Clock Operation
The internal oscillator is set for a 200Hz nominal chop-
ping frequency on both the 8- and 14-pin DIPs. With the
14-pin DIP TC7650, the 200 Hz internal chopping fre-
quency is available at the internal clock output (Pin 12).
A 400Hz nominal signal will be present at the external
clock input pin (Pin 13) with INT/EXT high or open. This
is the internal clock signal before a divide-by-two oper-
ation.
V
V
V
DD
SS
DD
11
7
2
4
5
-
-
7
10
6
TC7650
TC7650
3
4
+
1
+
8
C
B
8
1
V
SS
2
The 14-pin DIP device can be driven by an external
clock. The INT/EXT input (Pin 14) has an internal pull-
up and may be left open for internal clock operation. If
an external clock is used, INT/EXT must be tied to VSS
(Pin 7) to disable the internal clock. The external clock
signal is applied to the external clock input (Pin 13).
C
C
C
A
A
B
14-PIN PACKAGE
8-PIN PACKAGE
3.4
Nulling Capacitor Connection
The external clock amplitude should swing between
VDD and ground for power supplies up to ±6V and
between V+ and V+ -6V for higher supply voltages.
The offset voltage correction capacitors are connected
to CA and CB. The common capacitor connection is
made to VSS (Pin 4) on the 8-pin packages and to
capacitor return (CRETN, Pin 8) on the 14-pin packages.
The common connection should be made through a
separate PC trace or wire to avoid voltage drops. The
capacitors outside foil, if possible, should be connected
At low frequencies the external clock duty cycle is not
critical, since an internal divide-by-two gives the
desired 50% switching duty cycle. The offset storage
correction capacitors are charged only when the exter-
nal clock input is high. A 50% to 80% external clock
to CRETN or VSS
.
2001-2012 Microchip Technology Inc.
DS21463C-page 5
TC7650
positive duty cycle is desired for frequencies above
500Hz to ensure transients settle before the internal
switches open.
FIGURE 3-5:
INVERTING AMPLIFIER WITH
OPTIONAL CLAMP
R
2
The external clock input can also be used as a strobe
input. If a strobe signal is connected at the external
clock input so that it is LOW during the time an overload
signal is applied, neither capacitor will be charged. The
leakage currents at the capacitors pins are very low. At
25°C a typical TC7650 will drift less than 10V/sec.
Clamp
R
1
Input
TC7650
Output
C
*
R
+
C
(R R ) ‡ 100 kΩ
1
2
For Full Clamp
Effect
3.6
Output Clamp
Chopper-stabilized systems can show long recovery
times from overloads. If the output is driven to either
supply rail, output saturation occurs. The inputs are no
longer held at a "virtual ground." The VOS null circuit
treats the differential signal as an offset and tries to cor-
rect it by charging the external capacitors. The nulling
circuit also saturates. Once the input signal returns to
normal, the response time is lengthened by the long
recovery time of the nulling amplifier and external
capacitors.
–
*
Connect To V
On 8-Pin DIP.
µ
µ
F
0.1
F
0.1
R
The output clamp circuit is shown in Figure 3-3, with
typical inverting and non-inverting circuit connections
shown in Figures 3-4 and 3-5. Output voltage versus
clamp circuit current characteristics are shown in the
typical operating curves. For the clamp to be fully effec-
tive, the impedance across the clamp output should be
greater than 100k.
Through an external clamp connection, the TC7650
eliminates the overload recovery problem by reducing
the feedback network gain before the output voltage
reaches either supply rail.
3.7
Latch-Up Avoidance
Junction-isolated CMOS circuits inherently include a
parasitic 4-layer (p-n-p-n) structure which has charac-
teristics similar to an SCR. Under certain circum-
stances this junction may be triggered into a low-
impedance state, resulting in excessive supply current.
To avoid this condition, no voltage greater than 0.3V
beyond the supply rails should be applied to any pin. In
general, the amplifier supplies must be established
either at the same time or before any input signals are
applied. If this is not possible, the drive circuits must
limit input current flow to under 0.1mA to avoid latch-
up.
FIGURE 3-3:
INTERNAL CLAMP CIRCUIT
Internal
+
+
Positive Clamp Bias ≈ V - V ≈ V - 0.7
T
P-Channel
Output
Clamp Pin
N-Channel
3.8
Thermoelectric Potentials
FIGURE 3-4:
NON-INVERTING AMPLIFIER
WITH OPTIONAL CLAMP
Precision DC measurements are ultimately limited by
thermoelectric potentials developed in thermocouple
junctions of dissimilar metals, alloys, silicon, etc.
Unless all junctions are at the same temperature, ther-
moelectric voltages, typically around 0.1V/°C, but up
to tens of V/°C for some materials, will be generated.
In order to realize the benefits extremely-low offset volt-
ages provide, it is essential to take special precautions
to avoid temperature gradients. All components should
be enclosed to eliminate air movement, especially
those caused by power dissipating elements in the sys-
tem. Low thermoelectric co-efficient connections
should be used where possible and power supply volt-
ages and power dissipation should be kept to a mini-
mum. High impedance loads are preferable, and
separation from surrounding heat dissipating elements
is advised.
0.1µF
*
Connect To V
SS
On 8-Pin DIP.
C
+
*
R
Input
Output
C
TC7650
R
R
2
1
Clamp
R
3
R
+ (R1/R2) ‡ 100 kΩ
3
For Full Clamp Effect
DS21463C-page 6
2001-2012 Microchip Technology Inc.
TC7650
FIGURE 3-6:
INPUT GUARD CONNECTION
3.9
Pin Compatibility
On the 8-pin mini-DIP TC7650, the external null stor-
age capacitors are connected to pins 1 and 8. On most
other operational amplifiers these are left open or are
used for offset potentiometer or compensation capaci-
tor connections.
Inverting Amplifier
R
R
1
2
Input
-
For OP05 and OP07 operational amplifiers, the
replacement of the offset null potentiometer between
pins 1 and 8 by two capacitors from the pins to VSS will
convert the OP05/07 pin configurations for TC7650
operation. For LM108 devices, the compensation
capacitor is replaced by the external nulling capacitors.
The LM101/748/709 pinouts are modified similarly by
removing any circuit connections to Pin 5. On the
TC7650, Pin 5 is the output clamp connection.
Output
+
R *
3
Noninverting Amplifier
R
2
Other operational amplifiers may use this pin as an off-
set or compensation point.
R *
3
The minor modifications needed to retrofit a TC7650
into existing sockets operating at reduced power sup-
ply voltages make prototyping and circuit verification
straightforward.
-
Output
+
R
1
3.10 Input Guarding
Input
Should Be Low
Impedence For
Optimum Guarding
High impedance, low leakage CMOS inputs allow the
TC7650 to make measurements of high-impedance
sources. Stray leakage paths can increase input cur-
rents and decrease input resistance unless inputs are
guarded. A guard is a conductive PC trace surrounding
the input terminals. The ring connects to a low imped-
ance point at the same potential as the inputs. Stray
leakages are absorbed by the low impedance ring. The
equal potential between ring and inputs prevents input
leakage currents. Typical guard connections are shown
in Figure 3-6.
R
R
2
1
NOTE: R
=
3
R
+ R
2
1
Follower
R *
3
-
Output
+
Input
The 14-pin DIP configuration has been specifically
designed to ease input guarding. The pins adjacent to
the inputs are unused.
In applications requiring low leakage currents, boards
should be cleaned thoroughly and blown dry after sol-
dering. Protective coatings will prevent future board
contamination.
3.11 Component Selection
The two required capacitors, CA and CB, have optimum
values, depending on the clock or chopping frequency.
For the preset internal clock, the correct value is 0.1F.
To maintain the same relationship between the chop-
ping frequency and the nulling time constant, the
capacitor values should be scaled in proportion to the
external clock, if used. High quality film type capacitors
(such as Mylar) are preferred; ceramic or other lower
grade capacitors may be suitable in some applications.
For fast settling on initial turn-on, low dielectric absorp-
tion capacitors (such as polypropylene) should be
used. With ceramic capacitors, several seconds may
be required to settle to 1V.
2001-2012 Microchip Technology Inc.
DS21463C-page 7
TC7650
4.0
TYPICAL CHARACTERISTICS
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Positive Clamp Current
vs. Output Voltage
Negative Clamp Current
vs. Output Voltage
1 mA
1 mA
TA = +25˚C
TA = +25˚C
VS 5V
0.1 mA
0.1 mA
VS
=
5V
=
0.01 mA
1mA
0.01 mA
1mA
0.1
m
A
0.1 A
m
0.01mA
1 nA
0.01mA
1 nA
0.1 nA
0.1 nA
0.01 nA
1 pA
0.01 nA
1 pA
-4.0 -4.1 -4.2
-4.4 -4.5 -4.6 -4.7 -4.8 -4.9 -5.0
-4.3
4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Supply Current vs.
Supply Voltage
Gain/Phase vs. Frequency
3.0
2.6
2.2
1.8
1.4
1.0
30
20
10
0
225
180
135
90
TA = +25˚C
GAIN
45
–10
–20
0
PHASE
-45
-90
–30
–40
–50
-135
-180
CLOSED-LOOP
GAIN = 20
–60
5
6
7
8
9
10 11 12 13 14 15
1k
10k
100k
1M
10M
SUPPLY VOLTAGE (V)
FREQUENCY (H )
z
DS21463C-page 8
2001-2012 Microchip Technology Inc.
TC7650
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
Package marking information not available at this time.
5.2
Package Dimensions
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
8-Pin Plastic DIP
PIN 1
.260 (6.60)
.240 (6.10)
.045 (1.14)
.030 (0.76)
.070 (1.78)
.040 (1.02)
.310 (7.87)
.290 (7.37)
.400 (10.16)
.348 (8.84)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.015 (0.38)
.008 (0.20)
3˚MIN.
.150 (3.81)
.115 (2.92)
.400 (10.16)
.310 (7.87)
.110 (2.79)
.090 (2.29)
.022 (0.56)
.015 (0.38)
Dimensions: inches (mm)
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
14-Pin PDIP (Narrow)
PIN 1
.260 (6.60)
.240 (6.10)
.310 (7.87)
.290 (7.37)
.770 (19.56)
.745 (18.92)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.015 (0.38)
.008 (0.20)
3˚MIN.
.150 (3.81)
.115 (2.92)
.400 (10.16)
.310 (7.87)
.110 (2.79) .070 (1.78)
.090 (2.29) .045 (1.14)
.022 (0.56)
.015 (0.38)
Dimensions: inches (mm)
2001-2012 Microchip Technology Inc.
DS21463C-page 9
TC7650
6.0
REVISION HISTORY
Revision C (December 2012)
Added a note to each package outline drawing.
DS21463C-page 10
2001-2012 Microchip Technology Inc.
TC7650
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1. Your local Microchip sales office
2. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2001-2012 Microchip Technology Inc.
DS21463C-page 11
TC7650
NOTES:
DS21463C-page 12
2001-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
32
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768402
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
== ISO/TS 16949 ==
2001-2012 Microchip Technology Inc.
DS21463C-page 13
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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Corporate Office
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China - Wuhan
Tel: 86-27-5980-5300
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Taiwan - Taipei
Tel: 886-2-2508-8600
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Santa Clara
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Fax: 408-961-6445
China - Xian
Tel: 86-29-8833-7252
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Thailand - Bangkok
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Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
China - Xiamen
Tel: 905-673-0699
Fax: 905-673-6509
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
11/29/12
DS21463C-page 14
2001-2012 Microchip Technology Inc.
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