TC826CBU [MICROCHIP]

Analog-to-Digital Converter with Bar Graph Display Output; 模拟数字转换器与条形图显示输出
TC826CBU
型号: TC826CBU
厂家: MICROCHIP    MICROCHIP
描述:

Analog-to-Digital Converter with Bar Graph Display Output
模拟数字转换器与条形图显示输出

转换器
文件: 总18页 (文件大小:473K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TC826  
Analog-to-Digital Converter with Bar Graph Display Output  
Features  
General Description  
• Bipolar A/D Conversion  
In many applications, a graphical display is preferred  
over a digital display. Knowing a process or system  
operates, for example, within design limits is more valu-  
able than a direct system variable read out. A bar or  
moving dot display supplies information precisely with-  
out requiring further interpretation by the viewer.  
• 2.5% Resolution  
• Direct LCD Display Drive  
• ‘Thermometer’ BAR or DOT Display  
• 40 Data Segments Plus Zero  
• Over Range Plus Polarity Indication  
• Precision On-Chip Reference: 35ppm/°C  
• Differential Analog Input  
The TC826 is a complete analog-to-digital converter  
with direct liquid crystal (LCD) display drive. The 40  
LCD data segments plus zero driver give a 2.5% reso-  
lution bar display. Full scale differential input voltage  
range extends from 20mV to 2V. The TC826 sensitivity  
is 500µV. A low drift 35ppm/°C internal reference, LCD  
backplane oscillator and driver, input polarity LCD  
driver, and over range LCD driver make designs simple  
and low cost. The CMOS design required only 125µA  
from a 9V battery. In +5V systems, a TC7660 DC to DC  
converter can supply the -5V supply. The differential  
analog input leakage is a low 10pA.  
• Low Input Leakage: 10pA  
• Display Flashes on Over Range  
• Display HOLD Mode  
• Auto-Zero Cycle Eliminates Zero Adjust  
Potentiometer  
• 9V Battery Operation  
• Low Power Consumption: 1.1mW  
• 20mV to 2.0V Full Scale Operation  
• Non-Multiplexed LCD Drive for Maximum  
Viewing Angle  
Two display formats are possible. The BAR mode dis-  
play is like a ‘thermometer’ scale. The LCD segment  
driver that equals the input, plus all below it are on. The  
DOT mode activates only the segment equal to the  
input. In either mode, the polarity signal is active for  
negative input signals. An over range input signal  
causes the display to flash and activates the over range  
annunciator. A HOLD mode can be selected that  
freezes the display and prevents updating.  
Device Selection Table  
Part Number  
Package  
Temperature Range  
TC826CBU  
64-Pin PQFP  
0°C to +70°C  
The dual slope integrating conversion method with  
auto-zero phase maximizes noise immunity and elimi-  
nates zero scale adjustment potentiometers. Zero  
scale drift is a low 5µV/°C. Conversion rate is typically  
5 per second and is adjustable by a single external  
resistor.  
A compact, 0.5" square, flat package minimizes PC  
board area. The high pin count LSI package makes  
multiplexed LCD displays unnecessary. Low cost,  
direct drive LCD displays offer the widest viewing angle  
and are readily available. A standard display is avail-  
able now for TC826 prototyping work.  
2002 Microchip Technology Inc.  
DS21477B-page 1  
TC826  
Package Type  
64-Pin PQFP  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
NC  
1
2
48  
47  
NC  
ANALOG  
COMMON  
BAR 30  
BAR 29  
BAR 28  
BAR 27  
BAR 26  
BAR 25  
BAR 24  
BAR 23  
+IN  
-IN  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
3
4
REF IN  
5
6
C
+
REF  
C
-
REF  
7
V
DD  
TC826CBU  
8
V
BUF  
9
C
AZ  
10  
11  
BAR 22  
BAR 21  
BAR 20  
BAR 19  
BAR 18  
BAR 17  
BAR 16  
V
INT  
V
SS  
12  
13  
14  
15  
OSC1  
OSC2  
BP  
36  
35  
34  
33  
BAR 0 16  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
Typical Application  
C
INT  
R
INT  
C
AZ  
9
10  
11  
V
INT  
6
V
C
BUF  
AZ  
C
+
REF  
1MΩ  
C
61  
62  
REF  
1.0mf  
BAR/DOT  
HOLD  
7
C
-
REF  
1MΩ  
1MΩ  
13  
OSC1  
R
OSC  
TC826  
430kΩ  
14  
15  
59  
63  
12  
OSC2  
BP  
TEST  
V
SS  
OR  
REF ANALOG  
IN COMMON -IN +IN BAR 40 POL-  
BAR 0-  
V
DD  
8
5
2
4
3
60  
Backplane  
R
R
2
1
9V  
-IN +IN  
41 Segment LCD  
Bar Graph  
2V  
Full Scale  
200mV  
Full Scale  
20mV  
Full Scale  
Component  
OR  
R
INT  
2MΩ  
20kΩ  
20kΩ  
C
0.033mf  
1mf  
0.033mf  
1mf  
0.033mf  
1mf  
INT  
C
REF  
C
AZ  
0.068mf  
0.068mf  
0.014mf  
R + R = 250kΩ  
1 2  
DS21477B-page 2  
2002 Microchip Technology Inc.  
TC826  
*Stresses above those listed under "Absolute Maximum  
Ratings" may cause permanent damage to the device. These  
are stress ratings only and functional operation of the device  
at these or any other conditions above those indicated in the  
operation sections of the specifications is not implied.  
Exposure to Absolute Maximum Rating conditions for  
extended periods may affect device reliability.  
1.0  
ELECTRICAL  
CHARACTERISTICS  
Absolute Maximum Ratings*  
Supply Voltage (V+ to V-)....................................... 15V  
Analog Input Voltage (Either Input) (Note 1)... V+ to V-  
Power Dissipation (T 70°C)  
A
64-Pin Plastic Flat Package ...............................1.14W  
Operating Temperature Range:  
Commercial Package (C)........................ 0°C to +70°C  
Storage Temperature Range.............. -65°C to +150°C  
TC826 ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: VS = 9V; ROSC = 430k; TA = 25°C; Full Scale = 20mV, unless otherwise stated.  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
Test Conditions  
Zero Input  
-0  
±0  
+0  
1
Display VIN = 0.0V  
Zero Reading Drift  
0.2  
µV/°C  
VIN = 0.0V  
0°C TA +70°C  
NL  
Linearity Error  
-1  
-1  
0.5  
0
+1  
+1  
20  
Count  
Count  
µVP-P  
pA  
Max Deviation from Best Straight Line  
R/O  
EN  
Rollover Error  
-VIN = +VIN  
VIN = 0V  
Noise  
60  
10  
50  
ILK  
Input Leakage Current  
Common Mode Rejection Ratio  
VIN = 0V  
CMRR  
µV/V  
VCM = ±1V  
VIN = 0V  
Scale Factor Temperature Coefficient  
1
ppm/°C 0 TA 7 +0°C  
External Ref. Temperature  
Coefficient = 0ppm/°C  
VCTC  
Analog Common Temperature  
Coefficient  
35  
100  
ppm/°C 250kbetween Common and  
V+, 0°C TA +70°C  
VCOM  
VSD  
VBD  
IDD  
Analog Common Voltage  
LCD Segment Drive Voltage  
LCD Backplane Drive Voltage  
Power Supply Current  
2.7  
4
2.9  
5
3.35  
6
V
250kbetween Common and VDD  
VP-P  
VP-P  
µA  
4
5
6
125  
175  
Note 1: Input voltages may exceed the supply voltages when the input current is limited to 100µA.  
2: Static sensitive device. Unused devices should be stored in conductive material to protect devices from static discharge  
and static fields.  
3: Backplane drive is in phase with segment drive for ‘off’ segment and 180°C out of phase for ‘on’ segment. Frequency is  
10 times conversion rate.  
4: Logic input pins 58, 59, and 60 should be connected through 1Mseries resistors to VSS for logic 0.  
2002 Microchip Technology Inc.  
DS21477B-page 3  
TC826  
2.0  
PIN DESCRIPTION  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
PIN FUNCTION TABLE  
Pin Number  
(64-Pin PQFP)  
Symbol  
Description  
1
2
NC  
Positive analog signal input.  
ANALOG  
COMMON  
Establishes the internal analog ground point. Analog common is set to 2.9V below the  
positive supply COMMON by an internal zener reference circuit. The voltage difference  
between VDD and analog common can be used to supply the TC826 voltage reference  
input at REF IN (Pin 5).  
3
4
5
+IN  
-IN  
Positive analog signal input.  
Negative analog signal input.  
REF IN  
Reference voltage positive input. Measured relative to analog common.  
REF IN Full Scale/2.  
6
CREF  
+
Reference capacitor connection.  
Reference capacitor connection.  
Positive supply terminal.  
7
CREF  
VDD  
-
8
9
VBUF  
CAZ  
Buffer output. Integration resistor connection.  
Negative comparator input. Auto-zero capacitor connection.  
Integrator output. Integration capacitor connection.  
Negative supply terminal.  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
VINT  
VSS  
OSC1  
OSC2  
BP  
Oscillator resistor (ROSC) connection.  
Oscillator resistor (ROSC) connection.  
LCD Backplane driver.  
BAR 0  
NC  
LCD Segment driver: Bar 0.  
No connection.  
BAR 1  
BAR 2  
BAR 3  
BAR 4  
BAR 5  
BAR 6  
BAR 7  
BAR 8  
BAR 9  
BAR 10  
BAR 11  
BAR 12  
BAR 13  
BAR 14  
BAR 15  
BAR 16  
BAR 17  
BAR 18  
BAR 19  
BAR 20  
BAR 21  
BAR 22  
BAR 23  
LCD Segment driver: Bar 1.  
LCD Segment driver: Bar 2.  
LCD Segment driver: Bar 3.  
LCD Segment driver: Bar 4.  
LCD Segment driver: Bar 5.  
LCD Segment driver: Bar 6.  
LCD Segment driver: Bar 7.  
LCD Segment driver: Bar 8.  
LCD Segment driver: Bar 9.  
LCD Segment driver: Bar 10.  
LCD Segment driver: Bar 11.  
LCD Segment driver: Bar 12.  
LCD Segment driver: Bar 13.  
LCD Segment driver: Bar 14.  
LCD Segment driver: Bar 15.  
LCD Segment driver: Bar 16.  
LCD Segment driver: Bar 17.  
LCD Segment driver: Bar 18.  
LCD Segment driver: Bar 19.  
LCD Segment driver: Bar 20.  
LCD Segment driver: Bar 21.  
LCD Segment driver: Bar 22.  
LCD Segment driver: Bar 23.  
DS21477B-page 4  
2002 Microchip Technology Inc.  
TC826  
TABLE 2-1:  
PIN FUNCTION TABLE (CONTINUED)  
Pin Number  
(64-Pin PQFP)  
Symbol  
Description  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
BAR 24  
BAR 25  
BAR 26  
BAR 27  
BAR 28  
BAR 29  
BAR 30  
NC  
LCD Segment driver: Bar 24.  
LCD Segment driver: Bar 25.  
LCD Segment driver: Bar 26.  
LCD Segment driver: Bar 27.  
LCD Segment driver: Bar 28.  
LCD Segment driver: Bar 29.  
LCD Segment driver: Bar 30.  
No connection.  
BAR 31  
BAR 32  
BAR 33  
BAR 34  
BAR 35  
BAR 36  
BAR 37  
BAR 38  
BAR 39  
BAR 40  
OR  
LCD Segment driver: Bar 31.  
LCD Segment driver: Bar 32.  
LCD Segment driver: Bar 33.  
LCD Segment driver: Bar 34.  
LCD Segment driver: Bar 35.  
LCD Segment driver: Bar 36.  
LCD Segment driver: Bar 37.  
LCD Segment driver: Bar 38.  
LCD Segment driver: Bar 39.  
LCD Segment driver: Bar 40.  
LCD segment driver that indicated input out-of-range condition.  
LCD segment driver that indicates input signal is negative.  
POL-  
BAR/DOT  
Input logic signal that selects BAR or DOT display format. Normally in BAR mode. Connect  
to VSS through 1Mresistor for DOT format.  
62  
63  
HOLD  
TEST  
Input logic signal that prevents display from changing. Pulled high internally to inactive  
state. Connect to VSS through 1Mseries resistor for HOLD mode operation.  
Input logic signal. Sets TC826 to BAR Display mode. BAR 0 to 40, plus OR flash on and  
off. The POL- LCD driver is on. Pulled high internally to inactive state. Connect to VSS with  
1Mseries resistor to activate.  
64  
NC  
No connection.  
2002 Microchip Technology Inc.  
DS21477B-page 5  
TC826  
A simple mathematical equation relates the input signal  
reference voltage and integration time:  
3.0  
3.1  
DETAILED DESCRIPTION  
Dual Slope Conversion Principles  
EQUATION 3-1:  
The TC826 is a dual slope, integrating analog-to-digital  
converter. The conventional dual slope converter mea-  
surement cycle has two distinct phases:  
t
V T  
1
RC  
INT  
R
RI  
V
(t)dt =  
IN  
0
RC  
• Input Signal Integration  
Where:  
• Reference Voltage Integration (De-integration)  
V
V
= Reference Voltage  
R
The input signal being converted is integrated for a  
fixed time period (T ). Time is measured by counting  
clock pulses. An opposite polarity constant reference  
voltage is then integrated until the integrator output  
voltage returns to zero. The reference integration time  
= Signal Integration Time (Fixed)  
SI  
RI  
SI  
T
= Reference Voltage Integration Time  
(Variable)  
is directly proportional to the input signal (T  
(Figure 3-1).  
)
RI  
In a simple dual slope converter, a complete conver-  
sion requires the integrator output to ‘ramp-up’ and  
‘ramp-down’.  
FIGURE 3-1:  
BASIC DUAL SLOPE CONVERTER  
C
Integrator  
R
Analog Input  
Signal  
Comparator  
+
+
+/–  
Phase Control  
REF  
Voltage  
Switch Driver  
Control  
Logic  
Clock  
Polarity Control  
Counter  
Display  
V
V
1/2 V  
IN  
FULL SCALE  
1/4 V  
IN  
FULL SCALE  
Fixed Signal  
Integrate  
Time  
Variable  
Reference  
Integrate  
Time  
DS21477B-page 6  
2002 Microchip Technology Inc.  
TC826  
For a constant V  
:
FIGURE 3-2:  
NORMAL MODE  
IN  
REJECTION OF DUAL  
SLOPE CONVERTER  
EQUATION 3-2:  
T
T
RI  
SI  
30  
V
= V  
R
IN  
T = Measurement  
Period  
The dual slope converter accuracy is unrelated to the  
integrating resistor and capacitor values, as long as  
they are stable during a measurement cycle. An inher-  
ent benefit is noise immunity. Noise spikes are inte-  
grated or averaged to zero during the integration  
periods. Integrating ADCs are immune to the large con-  
version errors that plague successive approximation  
converters in high noise environments. Interfering sig-  
nals with frequency components at multiples of the  
averaging period will be attenuated (Figure 3-2).  
20  
10  
0
0.1/T  
1/T  
10/T  
Input Frequency  
The TC826 converter improves the conventional dual  
slope conversion technique by incorporating an auto-  
zero phase. This phase eliminates zero scale offset  
errors and drift. A potentiometer is not required to  
obtain a zero output for zero input.  
2002 Microchip Technology Inc.  
DS21477B-page 7  
TC826  
The auto-zero cycle length is 19 counts minimum.  
Unused time in the de-integrate cycle is added to the  
auto-zero cycle.  
4.0  
4.1  
THEORY OF OPERATION  
Analog Section  
In addition to the basic signal integrate and de-  
integrate cycles discussed above, the TC826 incorpo-  
rates an auto-zero cycle.This cycle removes buffer  
amplifier, integrator, and comparator offset voltage  
error terms from the conversion. A true digital zero  
reading results without external adjusting potentiome-  
ters. A complete conversion consists of three cycles:  
an auto-zero, signal integrate and reference cycle  
(Figure 4-1 and Figure 4-2).  
4.1.2  
SIGNAL INTEGRATION CYCLE  
The auto-zero loop is opened and the internal differen-  
tial inputs connect to +IN and -IN. The differential input  
signal is integrated for a fixed time period. The TC826  
signal integration period is 20 clock periods or counts.  
The externally set clock frequency is divided by 32  
before clocking the internal counters. The integration  
time period is:  
EQUATION 4-1:  
4.1.1  
AUTO-ZERO CYCLE  
Where:  
During the auto-zero cycle, the differential input signal  
is disconnected from the circuit by opening internal  
analog gates. The internal nodes are shorted to analog  
common (internal analog ground) to establish a zero  
input condition. Additional analog gates close a feed-  
back loop around the offset voltage error compensation.  
32  
T
=
x 20  
SI  
F
OSC  
F
= External Clock Frequency  
OSC  
The voltage level established on C compensates for  
AZ  
device offset voltages.  
FIGURE 4-1:  
TC826 ANALOG SECTION  
R
INT  
REF IN  
5
V
DD  
8
C
REF  
C
C
INT  
AZ  
6
7
9
10  
11  
TC826  
AZ  
Integrator  
+
CMPTR  
To Digital Section  
+
3
+Input  
+
Buffer  
Comparator  
AZ  
INT  
AZ  
DE-  
DE+  
AZ  
INT  
V
DD  
V
DD  
DE+  
DE-  
2
4
Analog  
Common  
INT  
6.3V  
-INPUT  
1µA  
V  
2.9V  
DD  
From  
AZ  
INT  
DE+  
DE-  
Digital  
Control  
Center  
+
Analog Switch  
12  
V  
DD  
DS21477B-page 8  
2002 Microchip Technology Inc.  
TC826  
The differential input voltage must be within the device  
Common mode range when the converter and mea-  
sured system share the same power supply common  
(ground). If the converter and measured system do not  
share the same power supply common, -IN should be  
tied to analog common. This is the usual connection for  
battery operated systems. Polarity is determined at the  
end of signal integrate signal phase. The sign bit is a  
true polarity indication, in that signals less than 1LSB  
are correctly determined. This allows precision null  
detection limited only by device noise and system  
noise.  
4.1.3  
REFERENCE INTEGRATE CYCLE  
The final phase is reference integrate or de-integrate.  
-IN is internally connected to analog common and +IN  
is connected with the correct polarity to cause the inte-  
grator output to return to zero. The time required for the  
output to return to zero is proportional to the input sig-  
nal and is between 0 and 40 counts. The digital reading  
displayed is:  
EQUATION 4-2:  
V
IN  
20 =  
V
REF  
FIGURE 4-2:  
CONVERSION HAS THREE PHASES  
Auto-Zero Phase (AZ)  
Signal Integrate  
Phase (SI)  
Reference Integrate Phase (RI)  
(De-integrate)  
Sign Bit Determined  
Integrator  
Output  
Analog Common  
Potential  
True Zero  
Crossing  
Zero Crossing  
Detected  
Internal  
System  
Clock (FSYS)  
Internal Data  
Latch Update  
Signal  
Number of Counts  
Proportional to  
V
IN  
T
T V  
D
I
IN  
19 Counts  
Minimum  
20  
Counts  
41 Counts  
Maximum  
1
One Conversion Cycle = 80 Counts  
(T  
= 80 X  
)
CONV  
FSYS  
2002 Microchip Technology Inc.  
DS21477B-page 9  
TC826  
4.2  
System Timing  
4.4  
Components Value Selection  
INTEGRATING RESISTOR (R  
The oscillator frequency is divided by 32 prior to clock-  
ing the internal counters. The three-phase measure-  
ment cycle takes a total of 80 clock pulses. The 80  
count cycle is independent of input signal magnitude.  
4.4.1  
)
INT  
The desired full scale input voltage and output current  
capability of the input buffer and integrator amplifier set  
the integration resistor value. The internal class A out-  
put stage amplifiers will supply a 1µA drive current with  
minimal linearity error. R  
1µA full scale current:  
Each phase of the measurement cycle has the follow-  
ing length:  
is easily calculated for a  
INT  
• Auto-Zero Phase: 19 to 59 Counts  
For signals less than full scale, the auto-zero is  
assigned the unused reference integrate time period.  
EQUATION 4-4:  
• Signal Integrate: 20 Counts  
This time period is fixed. The integration period is:  
V
Full Scale Voltage(V)  
1 x 10 – 6  
FS  
R
=
=
INT  
1 x 10 – 6  
EQUATION 4-3:  
Where V = Full Scale Analog Input  
FS  
32  
T
= 20  
SI  
F
OSC  
4.4.2  
INTEGRATING CAPACITOR (C  
)
INT  
Where F  
is the externally set clock frequency.  
OSC  
The integrating capacitor should be selected to maxi-  
mize integrator output swing. The integrator output will  
• Reference Integrate: 0 to 41 Counts  
swing to within 0.4V of V + or V - without saturating.  
S
S
4.3  
Reference Voltage Selection  
The integrating capacitor is easily calculated:  
A full scale reading requires the input signal be twice  
the reference voltage. The reference potential is mea-  
sured between REF IN (Pin 5) and ANALOG  
COMMON (Pin 2).  
EQUATION 4-5:  
V
640  
x V  
FS  
C
=
INT  
F
R
OSC  
INT  
INT  
TABLE 4-1:  
Where: V  
= Integrator Swing  
INT  
F
= Oscillator Frequency  
OSC  
Required Full Scale Voltage  
V
REF  
20mV  
2V  
10mV  
1V  
The integrating capacitor should be selected for low  
dielectric absorption to prevent rollover errors. Polypro-  
pylene capacitors are suggested.  
The internal voltage reference potential available at  
analog common will normally be used to supply the  
converter’s reference. This potential is stable when-  
ever the supply potential is greater than approximately  
7V. In applications where an externally generated refer-  
ence voltage is desired, refer to Figure 4-3.  
4.4.3  
AUTO-ZERO CAPACITOR (C  
)
AZ  
C
should be 2-3 times larger than the integration  
AZ  
capacitor. A polypropylene capacitor is suggested. Typ-  
ical values from 0.14µF to 0.068µF are satisfactory.  
The reference voltage is adjusted with a near full scale  
input signal. Adjust for proper LCD display read out.  
4.4.4  
REFERENCE CAPACITOR (C  
)
REF  
A 1µF capacitor is suggested. Low leakage capacitors,  
such as polypropylene, are recommended.  
FIGURE 4-3:  
EXTERNAL REFERENCE  
Several capacitor/resistor combinations for common  
full scale input conditions are given in Table 4-2.  
V+  
8
V+  
TC826  
MCP1525  
5
2
1µF  
REF IN  
2.50V  
Reference  
ANALOG  
COMMON  
(b)  
DS21477B-page 10  
2002 Microchip Technology Inc.  
TC826  
TABLE 4-2:  
SUGGESTED COMPONENT  
VALUES  
FIGURE 4-4:  
TRANSFER FUNCTION  
Over Range  
Indication  
40  
2V  
2mV  
20mV  
Comp.  
Full Scale  
VREF 1V  
Full Scale  
VREF 100V  
Full Scale  
VREF 10V  
39  
2
RINT  
CINT  
CREF  
CAZ  
2MΩ  
0.033µF  
1µF  
200kΩ  
0.033µF  
1µF  
20kΩ  
0.033µF  
1µF  
1
0.068µF  
430kΩ  
0.068µF  
430kΩ  
1.14µF  
430kΩ  
-0.5  
0
ROSC  
-2  
-1  
0.5  
1
2
3
39 39.5 40 40.5  
Note: Approximately 5 conversions/second.  
Analog Input  
V
40  
FS  
(X  
)
4.5  
Differential Signal Inputs  
The TC826 is designed with true differential inputs and  
accepts input signals within the input stage Common  
4.7  
BAR/DOT Input (Pin 61)  
mode voltage range (V ). The typical range is V+ -1  
CM  
The BAR/DOT input allows the user to select the dis-  
play format. The TC826 powers up in the BAR mode.  
Select the DOT display format by connecting BAR/DOT  
to the negative supply (Pin 12) through a 1Mresistor.  
to V- +1V. Common mode voltages are removed from  
the system when the TC826 operates from a battery or  
floating power source (isolated from measured sys-  
tem) and -IN is connected to analog common (V  
).  
COM  
4.8  
HOLD Input (Pin 62)  
In systems where Common mode rejection ratio mini-  
mizes error. Common mode voltages do, however,  
affect the integrator output level. Integrator output sat-  
uration must be prevented. A worse case condition  
The TC826 data output latches are not updated at the  
end of each conversion if HOLD is tied to the negative  
supply (Pin 12) through a 1Mresistor. The LCD dis-  
play continuously displays the previous conversion  
results.  
exists if a large positive V  
exists in conjunction with  
CM  
a full scale negative differential signal. The negative  
signal drives the integrator output positive along with  
The HOLD pin is normally pulled high by an internal  
pull-up.  
V
. For such applications, the integrator output swing  
CM  
can be reduced below the recommended 2V full scale  
swing. The integrator output will swing within 0.3V of  
V
4.9  
TEST Input (Pin 63)  
or V without increased linearity error.  
DD  
SS  
The TC826 enters a Test mode with the TEST input  
connected to the negative supply (Pin 12). The connec-  
tion must be made through a 1Mresistor. The TEST  
input is normally internally pulled high. A low input sets  
the output data latch to all ones. The BAR Display  
mode is set. The 41 LCD output segments (zero plus  
40 data segments) and over range annunciator flash on  
and off at 1/4 the conversion rate. The polarity annun-  
ciator (POL-) segment will be on, but not flashing.  
4.6  
Digital Section  
The TC826 contains all the segment drivers necessary  
to drive a liquid crystal display (LCD). An LCD back-  
plane driver is included. The backplane frequency is  
the external clock frequency divided by 256. A 430kΩ  
OSC gets the backplane frequency to approximately  
55Hz, with a 5V nominal amplitude. When a segment  
driver is in phase with the backplane signal, the seg-  
ment is ‘OFF’. An out-of-phase segment drive signal  
causes the segment to be ‘ON’ or visible. This AC drive  
configuration results in negligible DC voltage across  
each LCD segment. This insures long LCD display life.  
The polarity segment drive, -POL, is ‘ON’ for negative  
analog inputs. If +IN and -IN are reversed, this indicator  
would reverse. The TC826 transfer function is shown in  
Figure 4-4.  
4.10 Over Range Display Operation  
(OR, Pin 59)  
An out-of-range input signal will be indicated on the  
LCD display by the OR annunciator driver (Pin 59)  
becoming active.  
In the BAR display format, the 41 bar segments and the  
over range annunciator, OR, will flash ON and OFF. The  
flash rate is on fourth the conversion rate (F  
/2560).  
OSC  
In the DOT Display mode, OR flashes and all other data  
segment drivers are off.  
2002 Microchip Technology Inc.  
DS21477B-page 11  
TC826  
FIGURE 4-6:  
EXTERNAL OSCILLATOR  
CONNECTION  
4.11 Polarity Indication (POL-, Pin 60)  
The TC826 converts and displays data for positive and  
negative input signals. The POL LCD segment driver  
(Pin 60) is active for negative signals.  
8
TC826  
4.12 Oscillator Operation  
9V  
12  
13  
OSC1  
14  
OSC2  
The TC826 external oscillator frequency, F  
, is set  
OSC  
by resistor R  
connected between pins 13 and 14.  
OSC  
The oscillator frequency versus resistance curve is  
shown in Figure 4-5.  
0.1µf  
FIGURE 4-5:  
OSCILLATOR  
FREQUENCY VS. R  
External  
Oscillator  
OSC  
50  
40  
30  
20  
10  
20  
T
= 25°C  
18  
16  
14  
12  
10  
8
A
A. Single 9V Supply  
V
to V = 9V  
SS  
DD  
V
= 5V  
DD  
V
DD  
8
Power  
Supply  
13  
TC826  
Oscillator  
6
0.1µf  
4
12  
V
SS  
2
0
0
2
4
6
OSC  
8 10 12 14 16 18 20  
(X 100k)  
0
B. Dual Supply  
V
= 5V  
SS  
R
4.13 LCD Display Format  
F
is divided by 32 to provide an internal system  
OSC  
The input signal can be displayed in two formats  
(Figure 4-7). The BAR/DOT input (Pin 61) selects the  
format. The TC826 measurement cycle operates  
identically for either mode.  
clock, FYSY. Each conversion requires 80 internal  
clock cycles. The internal system clock is divided by 8  
to provide the LCD backplane drive frequency. The dis-  
play flash rate during an input out-of-range signal is set  
by dividing FSYS by 320.  
FIGURE 4-7:  
DISPLAY OPTION  
FORMATS  
The internal oscillator may be bypassed by driving  
OSC1 (Pin 13) with an external signal generator. OSC2  
(Pin 14) should be left unconnected.  
A. BAR Mode  
1. Input = 0  
2. Input = 5%  
of Full Scale  
The oscillator should swing from V  
supply operation (Figure 4-6). In dual supply operation,  
the signal should swing from power supply ground to  
to V in single  
SS  
DD  
Bar 4  
Bar 3  
Bar 2  
Bar 1  
Bar 0  
Off  
Off  
Off  
Off  
On  
Off  
Off  
On  
On  
On  
V
.
DD  
B. DOT Mode  
1. Input = 0  
2. Input = 5%  
of Full Scale  
Bar 4  
Bar 3  
Bar 2  
Bar 1  
Bar 0  
Off  
Off  
Off  
Off  
On  
Off  
Off  
On  
Off  
Off  
DS21477B-page 12  
2002 Microchip Technology Inc.  
TC826  
4.14 BAR Format  
4.17 LCD Backplane Driver (BP, Pin 15)  
The TC826 powers up in the BAR mode. BAR/DOT is  
pulled high internally. This display format is similar to a  
thermometer display. All bars/LCD segments including  
zero, below the bar/LCD segment equaling the input  
signal level, are on. A half scale input signal, for exam-  
ple, would be displayed with BAR 0 to BAR 20 on.  
Additional drive electronics are not required to interface  
the TC826 to an LCD display. The TC826 has an on-  
chip backplane generator and driver. The backplane  
frequency is:  
FBP = F  
/256  
OSC  
Figure 4-8 gives typical backplane driver rise/fall time  
versus backplane capacitance.  
4.15 DOT Format  
By connecting BAR/DOT to V through a 1Mresis-  
SS  
FIGURE 4-8:  
BACKPLANE DRIVE RISE/  
FALL TIME VS.  
CAPACITANCE  
tor, the DOT mode is selected. Only the BAR LCD seg-  
ment equaling the input signal is on. The zero segment  
is on for zero input.  
This mode is useful for moving cursor or ‘needle’ appli-  
cations.  
10  
T
A
= 25°C  
= 9V  
9
V
S
8
7
6
5
4
3
2
1
4.16 LCD Displays  
Most end products will use a custom LCD display for  
final production. Custom LCD displays are low cost and  
available from all manufacturers. The TC826 interfaces  
to non-multiplexed LCD displays. A backplane driver is  
included on-chip.  
To speed initial evaluation and prototype work, a stan-  
dard TC826 LCD display is available from Varitronix.  
Varitronix Ltd. LCDs  
4/F Liven House  
0
1
2
3
4
5
6
7
8
0 10  
61-63 King Yip Street  
Kwun Tong, Kowloon  
Hong Kong  
Tel: (852)2389-4317  
Fax: (852)2343-9555  
Backplane Capacitance (X 100pf)  
4.18 Flat Package Socket  
Sockets suitable for prototype work are available. A  
USA source is:  
USA Office:  
VL Electronics / Varitronix  
3250 Wilshire Blvd., Suite 901  
Los Angeles, CA 90010  
Tel: (213) 738-8700  
Nepenthe Distribution  
2471 East Bayshore, Suite 520  
Palo Alto, CA 94303  
Tel: 415/856-9332  
Fax: (213) 738-5340  
Telex: 910/373-2060  
• Part No.: VBG-413-DP  
• ‘BQ’ Socket Part No.: IC51-064-042 BQ  
Other standard LCD displays suitable for development  
work are available in both linear and circular formats.  
One manufacturer is:  
UCE Inc.  
24 Fitch Street  
Norwalk, CT 06855  
Tel: 203/838-7509  
• Part No. 5040: 50 segment circular display with  
3-digit numeric scale.  
• Part No. 5020: 50 segment linear display.  
2002 Microchip Technology Inc.  
DS21477B-page 13  
TC826  
5.0  
5.1  
PACKAGING INFORMATION  
Package Marking Information  
Package marking data not available at this time.  
5.2  
Taping Form  
Component Taping Orientation for 64-Pin PQFP Devices  
User Direction of Feed  
PIN 1  
W
P
Standard Reel Component Orientation  
for TR Suffix Device  
Carrier Tape, Number of Components Per Reel and Reel Size  
Package  
Carrier Width (W)  
Pitch (P)  
Part Per Full Reel  
Reel Size  
64-Pin PQFP  
32 mm  
24 mm  
250  
13 in  
Note: Drawing does not represent total number of pins.  
5.3  
Package Dimensions  
64-Pin PQFP  
7° MAX.  
.009 (0.23)  
.005 (0.13)  
.041 (1.03)  
.031 (0.78)  
PIN 1  
.018 (0.45)  
.012 (0.30)  
.555 (14.10)  
.547 (13.90)  
.687 (17.45)  
.667 (16.95)  
.031 (0.80) TYP.  
.010 (0.25) TYP.  
.555 (14.10)  
.547 (13.90)  
.120 (3.05)  
.100 (2.55)  
.687 (17.45)  
.667 (16.95)  
.130 (3.30) MAX.  
Dimensions: mm (inches)  
DS21477B-page 14  
2002 Microchip Technology Inc.  
TC826  
NOTES:  
2002 Microchip Technology Inc.  
DS21477B-page 15  
TC826  
SALES AND SUPPORT  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-  
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
New Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
DS21477B-page 16  
2002 Microchip Technology Inc.  
TC826  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
No representation or warranty is given and no liability is  
assumed by Microchip Technology Incorporated with respect  
to the accuracy or use of such information, or infringement of  
patents or other intellectual property rights arising from such  
use or otherwise. Use of Microchip’s products as critical com-  
ponents in life support systems is not authorized except with  
express written approval by Microchip. No licenses are con-  
veyed, implicitly or otherwise, under any intellectual property  
rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, FilterLab,  
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,  
PICSTART, PRO MATE, SEEVAL and The Embedded Control  
Solutions Company are registered trademarks of Microchip Tech-  
nology Incorporated in the U.S.A. and other countries.  
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,  
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,  
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,  
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode  
and Total Endurance are trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Serialized Quick Turn Programming (SQTP) is a service mark  
of Microchip Technology Incorporated in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2002, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received QS-9000 quality system  
certification for its worldwide headquarters,  
design and wafer fabrication facilities in  
Chandler and Tempe, Arizona in July 1999  
and Mountain View, California in March 2002.  
The Company’s quality system processes and  
procedures are QS-9000 compliant for its  
PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals,  
non-volatile memory and analog products. In  
addition, Microchip’s quality system for the  
design and manufacture of development  
systems is ISO 9001 certified.  
2002 Microchip Technology Inc.  
DS21477B-page 17  
WORLDWIDE SALES AND SERVICE  
Japan  
AMERICAS  
ASIA/PACIFIC  
Microchip Technology Japan K.K.  
Benex S-1 6F  
3-18-20, Shinyokohama  
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Tel: 81-45-471- 6166 Fax: 81-45-471-6122  
Corporate Office  
Australia  
2355 West Chandler Blvd.  
Microchip Technology Australia Pty Ltd  
Suite 22, 41 Rawson Street  
Epping 2121, NSW  
Chandler, AZ 85224-6199  
Tel: 480-792-7200 Fax: 480-792-7277  
Technical Support: 480-792-7627  
Web Address: http://www.microchip.com  
Australia  
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755  
Korea  
Rocky Mountain  
China - Beijing  
Microchip Technology Korea  
168-1, Youngbo Bldg. 3 Floor  
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Tel: 480-792-7966 Fax: 480-792-7456  
Microchip Technology Consulting (Shanghai)  
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Unit 915  
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Tel: 91-80-2290061 Fax: 91-80-2290062  
03/01/02  
DS21477B-page 18  
2002 Microchip Technology Inc.  

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