VN1206 [MICROCHIP]
N-Channel Enhancement-Mode Vertical DMOS FET;
| 型号： | VN1206 |
| 厂家： | 
MICROCHIP |
| 描述： | N-Channel Enhancement-Mode Vertical DMOS FET |
| 文件： | 总12页 (文件大小：735K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VN1206
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
• Free from Secondary Breakdown
• Low Power Drive Requirement
• Ease of Paralleling
The VN1206 Enhancement-mode (normally-off)
transistor uses a vertical DMOS structure and a
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
• Low CISS and Fast Switching Speeds
• Excellent Thermal Stability
• Integral Source-Drain Diode
• High Input Impedance and High Gain
Applications
Microchip’s vertical DMOS FETs are ideally suited for a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
• Motor Controls
• Converters
• Amplifiers
• Switches
• Power Supply Circuits
• Drivers (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Type
3-lead TO-92
(Top view)
DRAIN
SOURCE
GATE
See Table 2-1 for pin information.
2021 Microchip Technology Inc.
DS20005986A-page 1
VN1206
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±30V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle
Parameter
Sym.
Min. Typ. Max. Unit
Conditions
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
VGS(th)
IGSS
120
0.8
—
—
—
—
—
2
V
V
VGS = 0V, ID = 100 µA
VGS = VDS, ID = 1 mA
VGS = ±15V, VDS = 0V
VGS = 0V,
Gate Body Leakage Current
100
nA
—
—
10
µA
V
DS = Maximum rating
VDS = 0.8 Maximum rating,
GS = 0V, TA = 125°C
Zero-Gate Voltage Drain Current
IDSS
—
—
500
µA
V
(Note 1)
On-State Drain Current
ID(ON)
1
—
—
—
—
10
6
A
Ω
Ω
VGS = 10V, VDS = 10V
VGS = 2.5V, ID = 100 mA
VGS = 10V, ID = 500 mA
—
—
Static Drain-to-Source On-State Resistance
RDS(ON)
Note 1: Specification is obtained by characterization and is not 100% tested.
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All AC Parameters are not 100% sample tested.
Parameter
Sym. Min. Typ. Max. Unit
Conditions
Forward Transconductance
Input Capacitance
GFS 300
—
—
—
—
—
—
—
—
—
125
50
20
8
mmho VDS = 10V, ID = 500 mA
pF
CISS
COSS
CRSS
td(ON)
tr
—
—
—
—
—
—
—
VGS = 0V,
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
pF
pF
ns
ns
ns
ns
V
DS = 25V,
f = 1 MHz
V
DD = 60V,
ID = 400 mA,
GEN = 25Ω
Rise Time
8
Turn-Off Delay Time
td(OFF)
tf
18
12
R
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
VSD
—
1.2
—
V
VGS = 0V, ISD = 250 mA (Note 1)
Note 1: Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty
cycle
DS20005986A-page 2
2021 Microchip Technology Inc.
VN1206
TEMPERATURE SPECIFICATIONS
Parameter
Sym. Min. Typ. Max. Unit
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
Storage Temperature
TA
TS
–55
–55
—
—
+150
+150
°C
°C
PACKAGE THERMAL RESISTANCE
3-lead TO-92
JA
—
132
—
°C/W
THERMAL CHARACTERISTICS
ID (Note 1)
(Continuous)
(mA)
ID
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(A)
Package
(Pulsed)
(A)
3-lead TO-92
230
2
1
230
2
Note 1: ID (continuous) is limited by maximum rated TJ.
2021 Microchip Technology Inc.
DS20005986A-page 3
VN1206
2.0
PIN DESCRIPTION
The details on the pins of VN1206 are listed in
Table 2-1. Refer to Package Type for the location of
pins.
TABLE 2-1:
Pin Number
TO-92 PIN FUNCTION TABLE
Pin Name
Description
1
2
3
Source
Gate
Source
Gate
Drain
Drain
DS20005986A-page 4
2021 Microchip Technology Inc.
VN1206
3.0
FUNCTIONAL DESCRIPTION
Figure 3-1 illustrates the switching waveforms and test
circuit for VN1206.
10V
VDD
90%
INPUT
Pulse
RL
10%
Generator
OUTPUT
0V
t(ON)
td(ON)
t(OFF)
td(OFF)
RGEN
tf
tr
VDD
OUTPUT
INPUT
D.U.T.
10%
10%
0V
90%
90%
FIGURE 3-1:
Switching Waveforms and Test Circuit.
TABLE 3-1:
PRODUCT SUMMARY
RDS(ON)
IDSS
(Minimum)
(A)
BVDSS/BVDGS
(Maximum)
(Ω)
(V)
120
6
1
2021 Microchip Technology Inc.
DS20005986A-page 5
VN1206
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
Example
VN1206
3-lead TO-92
XXXXXX
e3
e
3
X
L
YWWNNN
111084
Legend: XX...X Product Code or Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
DS20005986A-page 6
2021 Microchip Technology Inc.
VN1206
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2021 Microchip Technology Inc.
DS20005986A-page 7
VN1206
NOTES:
DS20005986A-page 8
2021 Microchip Technology Inc.
VN1206
APPENDIX A: REVISION HISTORY
Revision A (May 2021)
• Converted Supertex Doc# DSFP-VN1206 to
Microchip DS20005986A
• Added a pin function table
• Changed the package marking format
• Removed the 3-Lead TO-92 L P003, P005, P013,
and P014 media types to align packaging
specifications with the actual BQM
• Made minor text changes throughout the
document
2021 Microchip Technology Inc.
DS20005986A-page 9
VN1206
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
XX
PART NO.
Device
-
X
-
X
Package
Options
Environmental
Media Type
a) VN1206L-G:
N-Channel Enhancement-
Mode, Vertical DMOS FET,
3-lead TO-92, 1000/Bag
b) VN1206L-G-P002:
N-Channel Enhancement-
Mode, Vertical DMOS FET,
3-lead TO-92, 2000RVT/Reel
Device:
VN1206
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Package:
L
=
=
3-lead TO-92
Environmental:
Media Types:
G
Lead (Pb)-free/RoHS-compliant Package
(blank)
P002
=
=
1000/Bag for an L Package
2000RVT/Reel for an L Package
DS20005986A-page 10
2021 Microchip Technology Inc.
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ISBN: 978-1-5224-8283-3
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2021 Microchip Technology Inc.
DS20005986A-page 11
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DS20005986A-page 12
2021 Microchip Technology Inc.
02/28/20
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