VN3205N3-G-P002 [MICROCHIP]
N-Channel Enhancement-Mode Vertical DMOS FET;型号: | VN3205N3-G-P002 |
厂家: | MICROCHIP |
描述: | N-Channel Enhancement-Mode Vertical DMOS FET |
文件: | 总14页 (文件大小:858K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
VN3205
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
• Free from Secondary Breakdown
• Low Power Drive Requirement
• Ease of Paralleling
The VN3205 Enhancement-mode (normally-off)
transistor uses a vertical DMOS structure and a
well-proven silicon-gate manufacturing process. This
combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
• Low CISS and Fast Switching Speeds
• Excellent Thermal Stability
• Integral Source-Drain Diode
• High Input Impedance and High Gain
Applications
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
• Motor Controls
• Converters, Amplifiers, and Switches
• Power Supply Circuits
• Drivers (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Types
3-lead TO-92
(Top view)
3-lead SOT-89
(Top view)
DRAIN
DRAIN
SOURCE
DRAIN
GATE
SOURCE
GATE
See Table 3-1 and Table 3-2 for pin information.
2021 Microchip Technology Inc.
DS20005995A-page 1
VN3205
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±20V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle
Parameter
Sym.
Min. Typ. Max. Unit
Conditions
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
VGS(th)
50
—
—
—
V
V
VGS = 0V, ID = 10 mA
VGS = VDS, ID = 10 mA
0.8
2.4
VGS = VDS, ID = 10 mA
(Note 1)
Change in VGS(th) with Temperature
Gate Body Leakage Current
ΔVGS(th)
IGSS
—
—
—
–4.3 –5.5 mV/°C
1
100
10
nA
µA
VGS = ±20V, VDS = 0V
VGS = 0V,
—
V
DS = Maximum rating
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
Zero-Gate Voltage Drain Current
On-State Drain Current
IDSS
—
—
1
mA
(Note 1)
ID(ON)
RDS(ON)
ΔRDS(ON)
3
14
—
—
—
—
—
A
Ω
Ω
Ω
Ω
VGS = 10V, VDS = 5V
VGS = 4.5V, ID = 1.5A
VGS = 4.5V, ID = 0.75A
VGS = 10V, ID = 3A
VGS = 10V, ID = 1.5A
TO-92
—
—
—
—
—
0.45
0.45
0.3
SOT-89
TO-92
StaticDrain-to-SourceOn-State
Resistance
SOT-89
0.3
Change in RDS(ON) with Temperature
0.85 1.2 %/°C VGS = 10V, ID = 3A (Note 1)
Note 1: Specification is obtained by characterization and is not 100% tested.
DS20005995A-page 2
2021 Microchip Technology Inc.
VN3205
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are not 100% sample tested.
Parameter
Sym. Min. Typ. Max. Unit
Conditions
Forward Transconductance
Input Capacitance
GFS
CISS
COSS
CRSS
td(ON)
tr
1
1.5
—
mmho VDS = 25V, ID = 2A
—
—
—
—
—
—
—
220 300
pF
pF
pF
ns
ns
ns
ns
V
GS = 0V,
Common-Source Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
70
20
—
—
—
—
120
30
10
15
25
25
VDS = 25V,
f = 1 MHz
V
DD = 25V,
ID = 2A,
GEN = 10Ω
Rise Time
Turn-Off Delay Time
td(OFF)
tf
R
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
VSD
trr
—
—
—
1.6
—
V
VGS = 0V, ISD = 1.5A (Note 1)
300
ns
VGS = 0V, ISD = 1A
Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated.
Pulse test: 300 µs pulse, 2% duty cycle
TEMPERATURE SPECIFICATIONS
Parameter
Sym. Min. Typ. Max. Unit
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
Storage Temperature
TA
TS
–55
–55
—
—
+150
+150
°C
°C
PACKAGE THERMAL RESISTANCE
3-lead TO-92
JA
JA
—
—
132
133
—
—
°C/W
°C/W
3-lead SOT-89
THERMAL CHARACTERISTICS
ID (Note 1)
(Continuous) (Pulsed)
ID
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1)
(A)
IDRM
(A)
Package
(A)
(A)
3-lead TO-92
3-lead SOT-89
1.2
1.5
8
8
1
1.2
1.5
8
8
1.6 (Note 2)
Note 1: ID (continuous) is limited by maximum rated TJ.
2: Mounted on an FR5 Board, 25 mm x 25 mm x 1.57 mm.
2021 Microchip Technology Inc.
DS20005995A-page 3
VN3205
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
20
16
12
8.0
4.0
0
20
16
12
8.0
4.0
0
VGS = 10V
8V
VGS = 10V
8V
6V
6V
4V
3V
4V
3V
0
2.0
4.0
6.0
8.0
10
0
10
20
30
40
50
VDS (volts)
VDS (volts)
FIGURE 2-1:
OutputCharacteristics.
FIGURE 2-4:
Saturation Characteristics.
5.0
3.2
VDS = 25V
4.0
3.0
2.0
1.0
0
2.4
TO-243AA
TA = -55OC
25OC
(TA = 25°C)
1.6
0.8
0
125OC
TO-92
0
2.0
4.0
6.0
8.0
10
0
25
50
75
TC (OC)
100
125
150
ID (amperes)
FIGURE 2-2:
Transconductance vs. Drain
FIGURE 2-5:
Temperature.
1.0
Power Dissipation vs. Case
Current.
10
TO-243AA
TO-92 (pulsed)
(pulsed)
0.8
0.6
0.4
0.2
TO-243AA
PDA = 1.6W
T
= 25OC
1.0
0.1
TO-243AA (DC)
TO-92 (DC)
TO-92
PCD = 1.0W
T
= 25OC
TC = 25OC
0
0.01
0.001
0.01
0.1
1.0
10
0
1.0
10
100
tp (seconds)
VDS (volts)
FIGURE 2-6:
Thermal Response
FIGURE 2-3:
Maximum Rated Safe
Characteristics.
Operating Area.
DS20005995A-page 4
2021 Microchip Technology Inc.
VN3205
1.0
0.8
0.6
0.4
0.2
0
1.1
1.0
0.9
VGS = 4.5V
VGS = 10V
-50
0
50
Tj (OC)
100
150
0
4.0
8.0
12
16
20
ID (amperes)
FIGURE 2-7:
BVDSS Variation with
FIGURE 2-10:
On-Resistance vs. Drain
Temperature.
Current.
10
1.6
1.2
1.1
1.0
0.9
0.8
VDS =25V
RDS(ON) @ 10V, 3.0A
1.4
8.0
6.0
4.0
2.0
0
TA = -55OC
25OC
1.2
1.0
125OC
VGS(th) @ 1.0mA
0.8
0.7
-50
0.6
0
50
100
150
0
2.0
4.0
6.0
8.0
10
Tj (OC)
V
GS (volts)
FIGURE 2-8:
Transfer Characteristics.
FIGURE 2-11:
VGS(th) and RDS Variation
with Temperature.
10
400
f = 1MHz
VDS = 10V
VDS = 40V
8.0
6.0
4.0
2.0
300
200
100
CISS
325 pF
COSS
CRSS
215 pF
1.0
0
0
0
10
20
30
40
0
3.0
4.0
5.0
QG (2n.0anocoulombs)
VDS (volts)
FIGURE 2-9:
Capacitance vs.
FIGURE 2-12:
Gate Drive Dynamic
Drain-to-Source Voltage.
Characteristics.
2021 Microchip Technology Inc.
DS20005995A-page 5
VN3205
3.0
PIN DESCRIPTION
The details on the pins of VN3205 are listed on
Table 3-1 and Table 3-2. Refer to Package Types for
the location of pins.
TABLE 3-1:
Pin Number
3-LEAD TO-92 PIN FUNCTION TABLE
Pin Name
Description
1
2
3
Source
Gate
Source
Gate
Drain
Drain
TABLE 3-2:
Pin Number
3-LEAD SOT-89 PIN FUNCTION TABLE
Pin Name
Description
1
2,4
3
Gate
Drain
Gate
Drain
Source
Source
DS20005995A-page 6
2021 Microchip Technology Inc.
VN3205
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for VN3205.
10V
VDD
90%
INPUT
Pulse
RL
10%
Generator
OUTPUT
0V
t(ON)
td(ON)
t(OFF)
td(OFF)
RGEN
tf
tr
VDD
OUTPUT
0V
INPUT
D.U.T.
10%
10%
90%
90%
FIGURE 4-1:
Switching Waveforms and Test Circuit.
TABLE 4-1:
PRODUCT SUMMARY
RDS(ON)
VGS(th)
(Minimum)
(V)
BVDSS/BVDGS
(Maximum)
(Ω)
(V)
50
0.3
2.4
2021 Microchip Technology Inc.
DS20005995A-page 7
VN3205
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
Example
VN3205
3-lead TO-92
XXXXXX
e3
e
3
XX
N3
YWWNNN
125724
3-lead SOT-89
Example
XXXXYWW
NNN
VN2L123
317
Legend: XX...X Product Code or Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( ))
e
3
*
e
3
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
DS20005995A-page 8
2021 Microchip Technology Inc.
VN3205
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2021 Microchip Technology Inc.
DS20005995A-page 9
VN3205
3-Lead TO-243AA (SOT-89) Package Outline (N8)
D
D1
C
H
E
E1
1
2
3
L
b
b1
A
e
e1
Top View
Side View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
A
1.40
-
b
0.44
-
b1
0.36
-
C
0.35
-
D
4.40
-
D1
1.62
-
E
2.29
-
E1
2.00†
-
e
e1
H
3.94
-
L
0.73†
-
MIN
NOM
MAX
Dimensions
(mm)
1.50
BSC
3.00
BSC
1.60
0.56
0.48
0.44
4.60
1.83
2.60
2.29
4.25
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
DS20005995A-page 10
2021 Microchip Technology Inc.
VN3205
APPENDIX A: REVISION HISTORY
Revision A (February 2021)
• Converted Supertex Doc# DSFP-VN3205 to
Microchip DS20005995A
• Changed the package marking format
• Removed the 3-lead TO-92 N3 P003, P005,
P013, and P014 media types
• Added sections to comply with the standard
Microchip format
• Made minor text changes throughout the
document
2021 Microchip Technology Inc.
DS20005995A-page 11
VN3205
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
XX
PART NO.
Device
-
X
-
X
Package
Options
Environmental
Media Type
a) VN3205N3-G:
N-Channel Enhancement-
Mode Vertical DMOS FET,
3-lead TO-92, 1000/Bag
b) VN3205N3-G-P002:
c) VN3205N8-G:
N-Channel Enhancement-
Mode Vertical DMOS FET,
3-lead TO-92, 2000/Reel
Device:
VN3205
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Packages:
N3
N8
=
=
3-lead TO-92
N-Channel Enhancement-
Mode Vertical DMOS FET,
3-lead SOT-89, 2000/Reel
3-lead SOT-89
Environmental:
Media Types:
G
=
Lead (Pb)-free/RoHS-compliant Package
(blank)
P002
=
=
=
1000/Bag for an N3 Package
2000/Reel for an N3 Package
2000/Reel for an N8 Package
(blank)
DS20005995A-page 12
2021 Microchip Technology Inc.
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ISBN: 978-1-5224-7626-9
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DS20005995A-page 13
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DS20005995A-page 14
2021 Microchip Technology Inc.
02/28/20
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