VP2206N3-G-P013 [MICROCHIP]
P-Channel Enhancement-Mode Vertical DMOS FET;型号: | VP2206N3-G-P013 |
厂家: | MICROCHIP |
描述: | P-Channel Enhancement-Mode Vertical DMOS FET |
文件: | 总14页 (文件大小:824K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
VP2206
P-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
• Free from Secondary Breakdown
• Low Power Drive Requirement
• Ease of Paralleling
The VP2206 Enhancement-mode (normally-off)
transistor uses a vertical DMOS structure and a
well-proven silicon-gate manufacturing process. This
combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
• Low CISS and Fast Switching Speeds
• Excellent Thermal Stability
• Integral Source-to-Drain Diode
• High Input Impedance and High Gain
Applications
Microchip’s vertical DMOS FETs are ideally suited for a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance
and fast switching speeds are desired.
• Motor Controls
• Converters
• Amplifiers
• Switches
• Power Supply Circuits
• Drivers (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Types
3-lead TO-92
3-lead TO-39
(Top view)
(Top view)
DRAIN
GATE
SOURCE
SOURCE
DRAIN
GATE
See Table 3-1 and Table 3-2 for pin information.
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 1
VP2206
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±20V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle
Parameter
Sym.
Min. Typ. Max.
Unit
Conditions
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
VGS(th)
–60
–1
—
—
—
V
V
VGS = 0V, ID = –10 mA
VGS = VDS, ID = –10 mA
–3.5
VGS = VDS, ID = –10 mA
(Note 1)
Change in VGS(th) with Temperature
Gate Body Leakage Current
ΔVGS(th)
IGSS
—
—
—
–4.3 –5.5 mV/°C
–1
—
–100
–50
nA
µA
VGS = ±20V, VDS = 0V
VGS = 0V,
V
DS = Maximum rating
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
Zero-Gate Voltage Drain Current
On-State Drain Current
IDSS
—
—
–10
mA
(Note 1)
–0.85 –2
—
—
A
A
Ω
Ω
VGS = –5V, VDS = –25V
VGS = –10V, VDS = –25V
VGS = –5V, ID = –1A
VGS = –10V, ID = –3.5A
ID(ON)
–4
—
—
–9
1.3
1.5
0.9
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
RDS(ON)
0.75
VGS = –10V, ID = –3.5A
(Note 1)
ΔRDS(ON)
—
0.85
1.2
%/°C
Note 1: Specification is obtained by characterization and is not 100% tested.
DS20006009A-page 2
2021 Microchip Technology Inc. and its subsidiaries
VP2206
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are not 100% sample tested.
Parameter
Sym. Min. Typ. Max. Unit
Conditions
Forward Transconductance
Input Capacitance
GFS 800 1400
—
mmho VDS = –25V, ID = –2A
pF
CISS
COSS
CRSS
td(ON)
tr
—
—
—
—
—
—
—
325 450
125 180
VGS = 0V,
Common-Source Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
pF
pF
ns
ns
ns
ns
V
DS = –25V,
f = 1 MHz
30
4
40
15
25
50
50
V
DD = –25V,
ID = –4A,
GEN = 10Ω
Rise Time
16
16
22
Turn-Off Delay Time
td(OFF)
tf
R
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
VSD
trr
—
—
–1.1 –1.6
500
V
VGS = 0V, ISD = –3.5A (Note 1)
—
ns
VGS = 0V, ISD = –1A
Note 1: Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty
cycle
TEMPERATURE SPECIFICATIONS
Parameter
Sym. Min. Typ. Max. Unit
Conditions
TEMPERATURE RANGE
Operating Ambient Temperature
Storage Temperature
TA
TS
–55
–55
—
—
+150
+150
°C
°C
PACKAGE THERMAL RESISTANCE
3-lead TO-92
JA
—
132
—
°C/W
THERMAL CHARACTERISTICS
ID (Note 1)
(Continuous) (Pulsed)
ID
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1) IDRM
Package
(mA)
(A)
(mA)
(A)
3-lead TO-39
3-lead TO-92
–750
–640
–8
–4
0.36
0.74
–750
–640
–8
–4
Note 1: ID (continuous) is limited by maximum rated TJ.
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 3
VP2206
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
-10
-10
-8.0
-6.0
-4.0
-2.0
0
VGS = -10V
VGS = -10V
-8.0
-6.0
-4.0
-2.0
0
-8V
-8V
-6V
-6V
-4V
-3V
-4V
-3V
0
-2.0
-4.0
-6.0
-8.0
-10
0
-10
-20
-30
-40
-50
VDS (volts)
VDS (volts)
FIGURE 2-1:
OutputCharacteristics.
FIGURE 2-4:
Saturation Characteristics.
2.0
10
VDS = -25V
TA = -55OC
8.0
A = 25OC
TA = 125OC
T
TO-39
6.0
4.0
2.0
0
1.0
TO-92
0
0
-5.0
-10
0
25
50
75
100
125
150
TC (OC)
ID (amperes)
FIGURE 2-2:
Transconductance vs. Drain
FIGURE 2-5:
Power Dissipation vs. Case
Current.
Temperature.
-10
10
TO-39 (pulsed)
TO-92 (pulsed)
TO-39 (DC)
8.0
6.0
4.0
2.0
-1.0
-0.1
TO-39
TDC = 25OC
P
= 6.0W
TO-92 (DC)
TC = 25OC
TO-92
P
= 1.0W
TCD = 25OC
0
-0.01
-1.0
-10
-100
-1000
0.001
0.01
0.1
1.0
10
tP (seconds)
VDS (volts)
FIGURE 2-6:
Thermal Response
FIGURE 2-3:
Maximum Rated Safe
Characteristics.
Operating Area.
DS20006009A-page 4
2021 Microchip Technology Inc. and its subsidiaries
VP2206
5.0
4.0
3.0
2.0
1.0
0
1.1
1.0
0.9
VGS = -5.0V
VGS = -10V
-50
0
50
100
150
0
-2.0
-4.0
-6.0
-8.0
-10
Tj (OC)
ID (amperes)
FIGURE 2-7:
Temperature.
-10
BVDSS Variation with
FIGURE 2-10:
Current.
On-Resistance vs. Drain
2.0
1.2
VDS = -25V
RDS(ON) @ -10V, -3.5A
1.6
-8.0
-6.0
-4.0
-2.0
0
1.1
1.0
0.9
0.8
TA = -55OC
25OC
1.2
0.8
125OC
V(th) @ -1.0mA
0.4
0
0.7
-50
0
50
100
150
0
-2.0
-4.0
-6.0
-8.0
-10
VGS (volts)
Tj (OC)
FIGURE 2-8:
Transfer Characteristics.
FIGURE 2-11:
V(th) and RDS Variation with
Temperature.
-10
400
f = 1.0MHz
CISS
-8.0
-6.0
-4.0
-2.0
300
200
100
VDS = -10V
VDS = -40V
725 pF
COSS
310 pF
2.0
CRSS
0
0
0
-10
-20
-30
-40
0
4.0
6.0
8.0
10
VDS (volts)
QG (nanocoulombs)
FIGURE 2-9:
Capacitance vs.
FIGURE 2-12:
Gate Drive Dynamic
Drain-to-Source Voltage.
Characteristics.
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 5
VP2206
3.0
PIN DESCRIPTION
The details on the pins of VP2206 3-lead TO-39 and
3-lead TO-92 are listed in Table 3-1 and Table 3-2,
respectively. Refer to Package Types for the location
of pins.
TABLE 3-1:
Pin Number
3-LEAD TO-39 PIN FUNCTION TABLE
Pin Name
Description
1
2
3
Source
Gate
Source
Gate
Drain
Drain
TABLE 3-2:
Pin Number
3-LEAD TO-92 PIN FUNCTION TABLE
Pin Name
Description
1
2
3
Source
Gate
Source
Gate
Drain
Drain
DS20006009A-page 6
2021 Microchip Technology Inc. and its subsidiaries
VP2206
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for VP2206.
0V
Pulse
10%
Generator
INPUT
RGEN
90%
t(OFF)
-10V
t(ON)
td(ON)
D.U.T.
tr
td(OFF)
tf
INPUT
OUTPUT
0V
RL
90%
90%
OUTPUT
10%
10%
VDD
VDD
FIGURE 4-1:
Switching Waveforms and Test Circuit.
TABLE 4-1:
PRODUCT SUMMARY
RDS(ON)
ID(ON)
(Minimum)
(A)
BVDSS/BVDGS
(Maximum)
(Ω)
(V)
–60
0.9
–4
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 7
VP2206
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
Example
3-Lead TO-39
VP2206
2138
XXXXXX
YYWW
e4
e4
NNN
123
Example
3-lead TO-92
XXXXXX
VP2206
e3
e
3
N3
115310
XX
YWWNNN
Legend: XX...X Product Code or Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
DS20006009A-page 8
2021 Microchip Technology Inc. and its subsidiaries
VP2206
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 9
VP2206
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
DS20006009A-page 10
2021 Microchip Technology Inc. and its subsidiaries
VP2206
APPENDIX A: REVISION HISTORY
Revision A (December 2021)
• Converted Supertex Doc# DSFP-VP2206 to
Microchip DS20006009A
• Changed the package marking format
• Removed the 3-lead TO-92 N3 P002, P003,
P005, and P014 media types to align packaging
specifications with the actual BQM
• Added some sections to comply with the standard
Microchip format
• Made minor text changes throughout the
document
2021 Microchip Technology Inc. and its subsidiaries
DS20006009A-page 11
VP2206
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
XX
PART NO.
Device
-
X
-
X
Package
Options
Environmental
Media Type
a) VP2206N2-G:
P-Channel Enhancement-
Mode, Vertical DMOS FET,
3-lead TO-39, 500/Bag
b) VP2206N3-G:
P-Channel Enhancement-
Mode, Vertical DMOS FET,
3-lead TO-92, 1000/Bag
Device:
VP2206
=
P-Channel Enhancement-Mode Vertical
DMOS FET
Packages:
N2
N3
=
=
3-lead TO-39
3-lead TO-92
c) VP2206N3-G-P013:
P-Channel Enhancement-
Mode, Vertical DMOS FET,
3-lead TO-92, 2000/Reel
Environmental:
Media Types:
G
=
Lead (Pb)-free/RoHS-compliant Package
(blank)
(blank)
P013
=
=
=
500/Bag for an N2 Package
1000/Bag for an N3 Package
2000/Reel for an N3 Package
DS20006009A-page 12
2021 Microchip Technology Inc. and its subsidiaries
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DS20006009A-page 13
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DS20006009A-page 14
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09/14/21
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