APT84M50L [MICROSEMI]
N-Channel MOSFET; N沟道MOSFET
| 型号： | APT84M50L |
| 厂家： | 
Microsemi |
| 描述： | N-Channel MOSFET |
| 文件： | 总4页 (文件大小：404K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APT84M50B2
APT84M50L
500V, 84A, 0.065Ω Max
N-Channel MOSFET
T-MaxTM
TO-264
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capaci-
tance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
APT84M50B2
APT84M50L
G
D
S
Single die MOSFET
FEATURES
TYPICAL APPLICATIONS
• PFC and other boost converter
• Fast switching with low EMI/RFI
• Buck converter
• Low RDS(on)
• Two switch forward (asymmetrical bridge)
• Single switch forward
• Flyback
• Ultra low Crss for improved noise immunity
• Low gate charge
• Avalanche energy rated
• RoHS compliant
• Inverters
Absolute Maximum Ratings
Symbol Parameter
Unit
Ratings
84
Continuous Drain Current @ TC = 25°C
ID
Continuous Drain Current @ TC = 100°C
53
A
Pulsed Drain Current 1
IDM
VGS
EAS
IAR
270
±30
1845
42
V
mJ
A
Gate-Source Voltage
Single Pulse Avalanche Energy 2
Avalanche Current, Repetitive or Non-Repetitive
Thermal and Mechanical Characteristics
Symbol Characteristic
Min
Typ
Max
1135
0.11
Unit
PD
Total Power Dissipation @ TC = 25°C
W
RθJC
Junction to Case Thermal Resistance
°C/W
°C
RθCS
0.11
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
-55
150
300
Operating and Storage Junction Temperature Range
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
oz
g
0.22
6.2
WT
Package Weight
in·lbf
N·m
10
Torque
Mounting Torque ( TO-264 Package), 4-40 or M3 screw
1.1
Microsemi Website - http://www.microsemi.com
Static Characteristics
T = 25°C unless otherwise specified
J
APT84M50B2_L
Parameter
Test Conditions
Min
Typ
Max
Unit
V
Symbol
VBR(DSS)
V
= 0V, I = 250µA
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature Coefficient
Drain-Source On Resistance 3
Gate-Source Threshold Voltage
Threshold Voltage Temperature Coefficient
500
GS
D
∆VBR(DSS)/∆TJ
Reference to 25°C, I = 250µA
D
V/°C
Ω
0.60
V
= 10V, I = 42A
D
RDS(on)
VGS(th)
0.055 0.065
GS
V
3
4
5
V
= VDS, I = 2.5mA
D
GS
∆VGS(th)/∆TJ
mV/°C
-10
V
= 500V
= 0V
T = 25°C
J
25
DS
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
µA
nA
V
T = 125°C
J
500
GS
V
= ±30V
±100
GS
Dynamic Characteristics
T = 25°C unless otherwise specified
J
Symbol
Parameter
Test Conditions
Min
Typ
65
Max
Unit
gfs
V
= 50V, I = 42A
S
Forward Transconductance
Input Capacitance
DS
D
Ciss
Crss
Coss
13500
185
V
= 0V, V = 25V
DS
GS
Reverse Transfer Capacitance
Output Capacitance
f = 1MHz
1455
pF
4
Co(cr)
Effective Output Capacitance, Charge Related
Effective Output Capacitance, Energy Related
845
425
V
= 0V, V = 0V to 333V
DS
GS
5
Co(er)
Qg
Qgs
Qgd
td(on)
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Current Rise Time
Turn-Off Delay Time
Current Fall Time
340
75
V
= 0 to 10V, I = 42A,
GS
D
nC
ns
V
= 250V
DS
155
60
Resistive Switching
V = 333V, I = 42A
DD
tr
td(off)
tf
70
D
R
= 2.2Ω 6 , V
= 15V
GG
155
50
G
Source-Drain Diode Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Continuous Source Current
(Body Diode)
D
S
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
IS
84
A
G
Pulsed Source Current
(Body Diode) 1
ISM
270
1.0
VSD
trr
I
= 42A, T = 25°C, V
= 0V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
SD
J
GS
3
I
= 42A
720
20
ns
µC
SD
Qrr
diSD/dt = 100A/µs, T = 25°C
J
I
≤ 42A, di/dt ≤1000A/µs, V = 100V,
DD
SD
V/ns
dv/dt
Peak Recovery dv/dt
8
T = 125°C
J
1
2
3
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
Starting at TJ = 25°C, L = 2.08mH, RG = 2.2Ω, IAS = 42A.
Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4
5
Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10.
6
RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT84M50B2_L
160
140
120
100
80
350
300
250
200
150
100
V
= 10V
T
= 125°C
GS
J
VGS= 7,8 & 10V
TJ = -55°C
6V
TJ = 25°C
60
40
TJ = 150°C
5V
50
0
20
0
4.5V
TJ = 125°C
10
0
5
15
20
25
0
0
0
5
10
15
20
25
30
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS(ON)
DS
Figure 1, Output Characteristics
Figure 2, Output Characteristics
2.5
2.0
1.5
1.0
280
240
200
160
120
80
NORMALIZED TO
= 10V 42A
VDS> ID(ON)
x RDS(ON) MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
V
@
GS
TJ = -55°C
TJ = 25°C
TJ = 125°C
0.5
0
40
0
-55 -25
0
25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
1
2
3
4
5
6
7
8
V
, GATE-TO-SOURCE VOLTAGE (V)
J
GS
Figure 3, R
vs Junction Temperature
Figure 4, Transfer Characteristics
DS(ON)
120
100
80
60
40
20
0
20,000
10,000
Ciss
TJ = -55°C
TJ = 25°C
1000
TJ = 125°C
Coss
100
10
Crss
0
10 20 30 40 50 60 70 80 90
100
200
300
400
500
I , DRAIN CURRENT (A)
V
DS
, DRAIN-TO-SOURCE VOLTAGE (V)
D
Figure 5, Gain vs Drain Current
Figure 6, Capacitance vs Drain-to-Source Voltage
280
16
14
12
10
8
I
= 42A
D
240
200
160
120
80
VDS = 100V
VDS = 250V
TJ = 25°C
6
TJ = 150°C
VDS = 400V
4
40
0
2
0
0
100
200
300
400
500
0
0.3
, SOURCE-TO-DRAIN VOLTAGE (V)
SD
0.6
0.9
1.2
1.5
Q , TOTAL GATE CHARGE (nC)
V
g
Figure 7, Gate Charge vs Gate-to-Source Voltage
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
APT84M50B2_L
300
100
300
100
I
I
DM
DM
13µs
100µs
1ms
10ms
100ms
DC line
13µs
100µs
1ms
10
1
10
1
R
R
ds(on)
ds(on)
10ms
100ms
DC line
T = 150°C
C = 25°C
J
T
Scaling for Different Case & Junction
Temperatures:
T
T
J = 125°C
C = 75°C
I
D = ID(T = 25°C)*(T - TC)/125
J
C
0.1
0.1
1
10
100
800
1
10
100
800
V
, DRAIN-TO-SOURCE VOLTAGE (V)
V
DS
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
Figure 9, Forward Safe Operating Area
Figure 10, Maximum Forward Safe Operating Area
TJ (°C)
TC (°C)
ZEXT are the external thermal
0.0166
0.0401
0.0525
impedances: Case to sink,
sink to ambient, etc. Set to
zero when modeling only
the case to junction.
Dissipated Power
(Watts)
0.0147
0.0330
0.479
Figure 11, Transient Thermal Impedance Model
0.12
0.10
0.08
0.06
0.04
D = 0.9
0.7
0.5
0.3
0.1
Note:
t
1
t
2
t
= Pulse Duration
t
1
SINGLE PULSE
1
t
/
2
Duty Factor D =
0.02
0
Peak T = P
x Z
+ T
θJC C
J
DM
0.05
10-5
10-4
10-3
10-2
10-1
1.0
RECTANGULAR PULSE DURATION (seconds)
Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
TO-264 (L) Package Outline
T-MAX™ (B2) Package Outline
e3 100% Sn Plated
4.69 (.185)
5.31 (.209)
4.60 (.181)
15.49 (.610)
16.26 (.640)
5.21 (.205)
19.51 (.768)
20.50 (.807)
1.49 (.059)
2.49 (.098)
1.80 (.071)
2.01 (.079)
3.10 (.122)
3.48 (.137)
5.38 (.212)
6.20 (.244)
5.79 (.228)
6.20 (.244)
20.80 (.819)
21.46 (.845)
25.48 (1.003)
26.49 (1.043)
2.87 (.113)
3.12 (.123)
4.50 (.177) Max.
2.29 (.090)
2.69 (.106)
2.29 (.090)
2.69 (.106)
1.65 (.065)
2.13 (.084)
0.40 (.016)
0.79 (.031)
19.81 (.780)
20.32 (.800)
19.81 (.780)
21.39 (.842)
Gate
Drain
Source
Gate
Drain
Source
1.01 (.040)
1.40 (.055)
0.48 (.019)
0.84 (.033)
2.59 (.102)
3.00 (.118)
0.76 (.030)
1.30 (.051)
2.21 (.087)
2.59 (.102)
2.79 (.110)
5.45 (.215) BSC
2-Plcs.
3.18 (.125)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
These dimensions are equal to the TO-247 without the mounting hole.
Dimensions in Millimeters and (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786
5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
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