EDI88257LP85CI [MICROSEMI]
Standard SRAM, 256KX8, 85ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32;型号: | EDI88257LP85CI |
厂家: | Microsemi |
描述: | Standard SRAM, 256KX8, 85ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32 CD 静态存储器 内存集成电路 |
文件: | 总6页 (文件大小:285K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EDI88257C
White Electronic Designs
256Kx8 Monolithic SRAM
FEATURES
ꢀ
256Kx8 CMOS Static
The EDI88257C is a 2 Megabit 256Kx8 bit Monolithic
CMOS Static RAM.
ꢀ
Random Access Memory
The 32 pin DIP pinout adheres to the JEDEC standard for
the two megabit device, and is a pin replacement for the
256Kx8 module, EDI88257C. The device is upgradeable
to the 512Kx8 SRAM, the EDI88512C. Pin 1 becomes the
higher order address.
• Access Times of 70, 85, 100ns
• Data Retention Function (LP Versions)
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
ALow Power version, EDI88257LP, offers a data retention
function for battery back-up opperation. Military product is
available compliant to Appendix A of MIL-PRF-38535.
ꢀ
JEDEC Approved Pinout
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)
Single +5V ( 10ꢀ) Supply Operation
■
FIGURE 1 – PIN CONFIGURATION
32 DIP
TOP VIEW
PIN DESCRIPTION
A0-17
W#
Address Inputs
Write Enable
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
1
32 VCC
31 A15
30 A17
29 W#
28 A13
27 A8
E#
Chip Enable
2
3
4
5
6
7
8
9
G#
Output Enable
Data Inputs/Outputs
Power (+5V 10ꢀ%
Ground
DQ0-7
VCC
VSS
26 A9
25 A11
24 G#
23 A10
22 E#
21 I/O7
20 I/O6
19 I/O5
18 I/O4
17 I/O3
NC
Not Connected
BLOCK DIAGRAM
Memory Array
Address
Buffer
Address
Decoder
I/O
Circuits
A0-17
DQ0-7
W#
E#
G#
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI88257C
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
Parameter
Value
Unit
G#
X
H
L
X
E#
H
L
W#
X
Mode
Output
High Z
High Z
Data Out
Data In
Power
ICC2, ICC3
ICC1
Voltage on any pin relative to Vss
-0.5 to 7.0
V
Standby
H
Output Deselect
Operating Temperature TA (Ambient)
Industrial
Military
Storage Temperature, Plastic
Power Dissipation
Output Current
Junction Temperature, TJ
NOTE:
Stress greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions greater than those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
L
H
L
Read
Write
ICC1
-40 to +85
-55 to +125
-65 to +150
1
°C
°C
°C
W
mA
°C
L
ICC1
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
20
175
Symbol
Min
4.5
0
2.2
-0.3
Typ
5.0
0
Max
Unit
VCC
5.5
V
VSS
0
V
VIH
VIL
—
VCC +0.5
+0.8
V
—
V
CAPACITANCE
Parameter
Address Lines
Data Lines
Symbol
Condition
Max Unit
CI
VIN = Vcc or Vss, f = 1.0MHz
30
pF
pF
CO
VOUT = Vcc or Vss, f = 1.0MHz 14
These parameters are sampled, not 100ꢀ tested.
DC CHARACTERISTICS
VCC = 5V, TA = +25°C
Parameter
Symbol
ILI
Conditions
Min
—
Typ
—
—
45
3
—
—
—
—
Max
10
10
75
10
5
Units
µA
µA
mA
mA
mA
mA
V
Input Leakage Current
VIN = 0V to VCC
Output Leakage Current
Operating Power Supply Current
Standby (TTL% Power Supply Current
ILO
VI/O = 0V to VCC
—
ICC1
ICC2
W#, E# = VIL, II/O = 0mA, Min Cycle (70-100ns%
E# ≥ VIH, VIN ≤ VIL, VIN ≥ VIH
—
—
C
LP
—
E# ≥ VCC -0.2V
Full Standby Power Supply Current
ICC3
VIN ≥ Vcc -0.2V or VIN ≤ 0.2V
IOL = 2.1mA
—
1
Output Low Voltage
Output High Voltage
VOL
VOH
—
0.4
—
IOH = -1.0mA
2.4
V
AC TEST CONDITIONS
Input Pulse Levels
VSS to 3.0V
5ns
Figure 1
Figure 2
Vcc
Vcc
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
1.5V
480Ω
480Ω
Figure 1
NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2
Q
Q
30pF
5pF
255Ω
255Ω
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI88257C
White Electronic Designs
AC CHARACTERISTICS – READ CYCLE
VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C
Symbol 70ns
JEDEC
85ns
100ns
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1%
Chip Disable to Output in High Z (1%
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1%
Output Disable to Output in High Z(1%
1. This parameter is guaranteed by design but not tested.
Alt.
tRC
Min
Max
Min
85
Max
Min
100
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
tAVAV
tAVQV
tELQV
tELQX
tEHQZ
tAVQX
tGLQV
tGLQX
tGHQZ
70
tAA
70
70
85
85
100
100
tACS
tCLZ
tCHZ
tOH
tOE
tOLZ
tOHZ
10
10
10
10
10
10
25
35
25
30
45
30
30
50
30
5
0
5
0
5
0
ns
AC CHARACTERISTICS – WRITE CYCLE
VCC = 5.0V, VSS = 0V, -55°C≤ TA ≤ +125°C
Symbol
JEDEC
70ns
85ns
100ns
Parameter
Alt.
Min
Max
Min
Max
Min
Max
Units
Write Cycle Time
tAVAV
tWC
70
85
100
ns
Chip Enable to End of Write
tELWH
tELEH
tCW
tCW
60
60
70
70
80
80
ns
ns
Address Setup Time
tAVWL
tAVEL
tAS
tAS
0
0
0
0
0
0
ns
ns
Address Valid to End of Write
Write Pulse Width
tAVWH
tAW
tAW
tWP
tWP
65
65
50
50
70
70
55
55
80
80
60
60
ns
ns
ns
ns
tAVEH
tWLWH
tWLEH
Write Recovery Time
Data Hold Time
tWHAX
tEHAX
tWR
tWR
tDH
tDH
0
0
0
0
0
0
0
0
0
0
0
0
ns
ns
ns
ns
tWHDX
tEHDX
Write to Output in High Z (1%
Data to Write Time
tWLQZ
tWHZ
tDW
tDW
0
40
30
25
0
40
35
30
0
40
40
30
ns
ns
ns
tDVWH
tDVEH
Output Active from End of Write (1%
tWHQX
tWLZ
5
0
0
ns
1. This parameter is guaranteed by design but not tested.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI88257C
White Electronic Designs
FIGURE 2 – TIMING WAVEFORM - READ CYCLE
tAVAV
ADDRESS
E#
tAVQV
tAVAV
tEHQZ
tELQV
tELQX
ADDRESS
DATA I/O
ADDRESS 1
ADDRESS 2
G#
tGLQV
tGLQX
tGHQZ
tAVQV
t
AVQX
DATA OUT
DATA 1
DATA 2
READ CYCLE 2 (W# HIGH)
READ CYCLE 1 (W# HIGH; G#, E# LOW)
FIGURE 3 – WRITE CYCLE - W# CONTROLLED
tAVAV
ADDRESS
tAVWH
tWHAX
tELWH
E#
tAVWL
tWLWH
W#
tDVWH
tWHDX
DATA IN
DATA VALID
tWLQZ
tWHQX
HIGH Z
DATA OUT
WRITE CYCLE 1, W# CONTROLLED
FIGURE 4 – WRITE CYCLE - E# CONTROLLED
tAVAV
ADDRESS
tAVEH
tELEH
tEHAX
E#
tAVEL
tWLEH
W#
tDVEH
tEHDX
DATA IN
DATA VALID
HIGH Z
DATA OUT
WRITE CYCLE 2, E# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI88257C
White Electronic Designs
DATA RETENTION CHARACTERISTICS (EDI88257LP ONLY)
-55°C ≤ TA ≤ +125°C
Characteristic
Low Power Version only
Sym
Conditions
Min
Typ
Max
Units
Data Retention Voltage
Data Retention Quiescent Current
VCC
ICCDR
VCC = 2.0V
E# ≥ VCC -0.2V
2
–
–
–
–
185
V
µA
Chip Disable to Data Retention Time
Operation Recovery Time
tCDR
TR
VIN ≥ VCC -0.2V
or VIN ≤ 0.2V
0
tAVAV
–
–
–
–
ns
ns
FIGURE 5 – DATA RETENTION - E# CONTROLLED
DATA RETENTION MODE
4.5V
4.5V
VCC
VCC
tCDR
tR
E#
E# = VCC -0.2V
DATA RETENTION, E# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI88257C
White Electronic Designs
PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600MILS WIDE)
1.616
1.584
0.620
0.600
0.060
0.040
Pin 1 Indicator
0.200
0.125
0.155
0.115
0.600
NOM
0.020
0.016
0.100
TYP
0.061
0.017
15 x 0.100 = 1.500
ALL DIMENSIONS ARE IN INCHES
ORDERING INFORMATION
EDI 8 8257 C X X X
WHITE ELECTRONIC DESIGNS
SRAM
ORGANIZATION, 256Kx8
TECHNOLOGY:
C = CMOS Standard Power
LP = Low Power
ACCESS TIME (ns)
PACKAGE TYPE:
C = 32 lead Sidebrazed DIP, 600 mil (Package 9)
DEVICE GRADE:
B = MIL-STD-883 Compliant
M= Military Screened
I = Industrial
C = Commercial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September 1999
Rev. 2
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
相关型号:
EDI88257LPA20CI
Standard SRAM, 256KX8, 20ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA25CB
Standard SRAM, 256KX8, 25ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA25CI
Standard SRAM, 256KX8, 25ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA35CB
Standard SRAM, 256KX8, 35ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA35CC
Standard SRAM, 256KX8, 35ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA35CI
Standard SRAM, 256KX8, 35ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA35CM
Standard SRAM, 256KX8, 35ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA45CB
Standard SRAM, 256KX8, 45ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA45CI
Standard SRAM, 256KX8, 45ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA55CB
Standard SRAM, 256KX8, 55ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA55CC
Standard SRAM, 256KX8, 55ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
EDI88257LPA55CI
Standard SRAM, 256KX8, 55ns, CMOS, CDIP32, 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32
WEDC
©2020 ICPDF网 联系我们和版权申明