LX5242CDBK-TR [MICROSEMI]

SCSI Terminator, 9-Line, 105ohm, PDSO36, PLASTIC, SSOP-36;
LX5242CDBK-TR
型号: LX5242CDBK-TR
厂家: Microsemi    Microsemi
描述:

SCSI Terminator, 9-Line, 105ohm, PDSO36, PLASTIC, SSOP-36

光电二极管 接口集成电路
文件: 总7页 (文件大小:215K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UltraMAX  
LX5241/5242/5243  
MULTIMODE SCSI TERMINATOR  
P
R O D U C T I O N D A T A S H E E T  
T
H E  
I
N F I N I T E  
P
O W E R O F  
I N N O V A T I O N  
KEY FEATURES  
DESCRIPTION  
„
Auto-Selectable LVD or Single-  
Ended Termination  
3.0pF Maximum Disabled Output  
Capacitance  
Fast Response, No External  
Capacitors Required  
Compatible with Active Negation  
Drivers  
15µA Supply Current in  
Disconnect Mode  
The LX5241/42/43 is  
a
multimode SCSI  
voltage between 1.2V and 1.4V. In application  
this pin is tied to the DIFFSENSE input of the  
corresponding LVD transceivers. This action  
terminator that is compatible with to the SCSI  
SPI02 (Ultra2 SCSI), SCSI SPI-3 (Ultra3 SCSI or  
Ultra160 SCSI), and pending SCSI SPI-4  
(Ultra320) specifications developed by the T10  
standards committee for low voltage differential  
(LVD) termination, while providing backwards  
compatibility to the SCSI, SCSI-2, and SPI single-  
ended specifications. Multimode compatibility  
permits the use of legacy devices on the bus  
without hardware alterations. Automatic mode  
selection is achieved through voltage detection on  
the Diffsense line.  
„
„
„
„
„
enables  
the  
LVD  
transceiver  
function.  
DIFFSENSE is capable of supplying a maximum  
of 15mA. Tying the DIFFSENSE pin high places  
the LX5241/42/43 in a HI Z state indicating the  
presence of an HVD device. Tying the pin low  
places the part in a single-ended mode while also  
signaling the multimode transceiver to operate in a  
single-ended mode.  
Recognizing the needs of portablnd  
configurable peripherals, the LX5241/42/43 have  
a TTL compatible sleep/disable mode. During  
this sleep/disable mode, power dissipation is  
reduced to a meager 15uA while also placing all  
outputs in a HI Z state. Also during sleep/disable  
mode, the DIFFSENSE function is disabled and is  
placed in a HI Z state.  
Logic Command Disconnects All  
Termination Lines  
„
„
Diffsense Line Driver  
Ground Driver Integrated for  
Single-Ended Operation  
Current Limit and Thermal  
Protection  
Hot-Swap Compatible (Single-  
Ended)  
Ultra160 compliant  
See LX5245/5246 for LVD  
Termination Only  
Pin Compatible With DS2119  
and UCC5630  
The  
LX5241/42/43  
utilizes  
Linfinity’s  
UltraMAX technology which delivers the ultimate  
in SCSI bus performance while saving component  
cost and board area. Elimination of the external  
capacitors also mitigates the need for a lengthy  
capacitor selection process. The individual high  
bandwidth drivers also maximize channel  
separation and reduce channel to channel noise and  
cross talk. The high bandwidth architecture insures  
ULTRA2 performance while providing a clear  
migration path to ULTRA3 and beyond.  
„
„
„
„
Another key feature of the LX5241/42/43 is the  
master / slave function. Dng this pin high or  
floating the pin enables the 1.3V DIFFSENSE  
reference. Driving the ow disables the on  
board DIFFSENSE reference and enables use of  
an external master reference device.  
„
When the LX5241/42/43 is enabled, the  
differential sense (DIFFSENSE) pin supplies a  
IMPORTANT: For the most current data, consult MICROSEMI’s website: htww.microsemi.com  
PRODUCT HIGHLIGHT  
BUS  
VOLTAGE  
6
VOD  
V
OD = V(-) - V(+), Logic =0  
V
(+)  
NEGATED  
100mV  
0V  
-100mV  
V
(-)  
-
-
LX5241  
LX41  
+
+
PACKAGE ORDER INFO  
Plastic TSSOP  
36-Pin  
Plastic TSSOP  
24-Pin  
Plastic TSSOP  
DB  
PW  
PW  
28-Pin  
TA (°C)  
RoHS Compliant / Pb-free  
Transition DC: 0442  
RoHS Compliant / Pb-free  
Transition DC: 0518  
LX5241CDBK  
LX5242CDBK  
LX5241CPWK  
LX5242CPWK  
LX5243CPW  
-
0 to 70  
Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. LX5241CDB-TR)  
I N I N I T Y I C R O E L E C T R O N I C S N C  
11861 WESTERN ROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570  
L
F
M
I
.
Copyright © 2000  
Rev. 1.5a,2005-02-28  
1
A
VENUE, GARDEN G  
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
ABSOLUTE MAXIMUM RATINGS (Note 1)  
PACKAGE PIN OUTS  
TermPwr Voltage .................................................................................................+7V  
Operating Junction Temperature  
Plastic (DB, PW Packages) .......................................................................... 150°C  
Storage Temperature Range ..............................................................-65°C to 150°C  
Lead Temperature (Soldering, 10 seconds) .................................................... 300°C  
RoHS / Pb-free Peak Package Solder Reflow Temp (40 sec. max. exp.)...260°C(+0, -5)  
1
36  
35  
34  
33  
32  
N..  
VTERM  
2
N.C.  
HVD  
3
N.C.  
LVD  
4
1+  
SE  
5
1-  
9-  
631  
7
2+  
9+  
30  
29  
28  
27  
26  
25  
24  
23  
22  
2-  
8-  
8
HEATSINK  
8+  
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with  
respect to Ground. Currents are positive into, negative out of the specified  
terminal.  
9
HEATSINK  
HEATSINK  
HEATSINK  
HEATSINK  
7-  
10  
11  
12  
13  
14  
15  
1621  
17  
18  
HEATSINK  
3+  
3-  
THERMAL DATA  
4+  
7+  
4-  
6-  
DB PACKAGE:  
5+  
5-  
6+  
DIFF B  
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA  
PW PACKAGE:  
50°C/W  
20  
19  
DISCONNECT  
GND  
DIFFSENSE  
MASTER/SLAVE  
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA  
100°C/W  
DB PACKAGE (Top View)  
Junction Temperature Calculation: TJ = TA + (PD x θJA).  
LX5241/5242 ("N.C." = No Internal Connection)  
The θJA numbers are guidelines for the thermal performance of the device/pc-ard  
system. All of the above assume no ambient airflow.  
1+  
1
24  
23  
22  
21  
20  
VTERM  
1-  
2
N.C.  
MASTER / SLAVE FUNCTION TABLE  
3
2+  
9-  
4
2-  
9+  
MASTER /  
SLAVE  
DIFFSENSE  
Status  
5
3+  
8-  
619  
7
3-  
8+  
18  
17  
16  
15  
14  
13  
4+  
7-  
L*  
H
HI Z  
1.3V  
1.3V  
0mA  
15mA urce  
15mA Source  
8
4-  
7+  
9
5+  
5-  
6-  
10  
11  
12  
6+  
Open (Pull-up)  
DISCONNECT  
GND  
DIFFSENSE  
MASTER/SLAVE  
* When in Low state, terminator will detect state of DIFFSENSE line.  
PW PACKAGE (Top View)  
LX5241/5242 ("N.C." = No Internal Connection)  
DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE  
LX5241/5243  
LX5242  
DIFF  
Outputs  
Quiescent  
Current  
DISCONNECT DISCONNECT  
SENSE  
Status  
Type  
N.C.  
1
28  
27  
26  
25  
24  
VTERM  
1+  
2
N.C.  
1-  
3
9-  
L
L
L
H
H
H
L < 0.5V  
Enable  
S.E.  
7mA  
4
2+  
9+  
5
2-  
8-  
623  
7
N.C.  
8+  
22  
21  
20  
19  
18  
17  
16  
15  
3+  
N.C.  
8
3-  
7-  
7 - 1.9V Enable  
LVD  
21mA  
9
4+  
7+  
10  
11  
12  
13  
14  
4-  
6-  
5+  
5-  
6+  
DIFFB  
H > 2.4V  
X
Disable  
Disable  
HI Z  
HI Z  
1mA  
DISCONNECT  
GND  
DIFFSENSE  
MASTER/SLAVE  
H
Open  
L
PW PACKAGE (Top View)  
LX5243 ("N.C." = No Internal Connection)  
10µA  
Open  
RoHS / Pb-free 100% Matte Tin Lead Finish  
Copyright © 2001  
Rev. 1.5a 02/13  
2
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
RECOMMENDED OPERATING CONDITIONS  
(Note 2)  
Recommended Operating Conditions  
Parameter  
Symbol  
Units  
Min.  
Typ.  
Max.  
Termpwr Voltage  
Signal Line Voltage  
LVD  
SE  
VTERM  
3.0  
3.5  
0
5.25  
5.25  
5.0  
V
V
V
V
0
VTERM  
Disconnect Input Voltage  
Operating Virtual Junction Temperature Range  
LX5241C / 5242C / 5243C  
0
70  
°C  
Note 2. Range over which the device is functional.  
ELECTRICAL CHARACTERISTICS  
(Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C TA 70°C, TermPwr = 4.75V.  
For the LX5241/5243 DISCONNECT = L, for the LX5242 DISCONNECT = H. Low duty cycle pulse testing techniques are used which maintains junction and  
case temperatures equal to the ambient temperature.)  
LX5241 / 5242 / 5243  
Parameter  
Symbol  
Test Conditions  
Units  
Min. Typ.  
Max.  
LVD Terminator Section  
TermPwr Supply Current  
LVD ICC All term lines = Open  
25  
15  
30  
35  
1.375  
125  
110  
300  
mA  
µA  
V
mV  
LX5241/5243: DISCONNECT > 2X5242: DISCONNECT < 0.8V  
Common Mode Voltage  
Offset Voltage  
Differential Terminator Impedance  
Common Mode Impedance  
Output Capacitance  
VCM  
VFSB  
ZD  
1.125  
100  
1.25  
112  
105  
200  
2.5  
Open circuit between - and + (see Note 3)  
VOUT Differential = -1V to 1V  
100  
100  
ZCM  
CO  
ILEAK  
0V to 2.5V  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,  
VLINE = 0 to 4V, TA 5°C  
pF  
µA  
Output Leakage  
2
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,  
VTERM = 0V, VLINE = 2.7V  
1
µA  
ms  
Mode Change Delay  
tDF  
DIFFSENSE = 14V to 0V  
115  
DIFFSENSE Section  
DIFFSENSE Output Voltage  
DIFFSENSE Output Source Current  
DIFFSENSE Sink Current  
VDIFF  
IDIFF  
1.2  
5.0  
1.3  
1.4  
15.0  
200  
10  
V
VDIFF = 0V  
mA  
µA  
µA  
ISINK(DIFF) VDIFF = 2.75V  
ILEAK(DIFF) LX/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,  
TA = 25°C  
DIFFSENSE Output Leakage  
Single-Ended Termination Section  
Termpwr Supply Current  
SE ICAll term lines = Open, Master/Slave = 0V  
7
214  
15  
10  
226  
35  
mA  
mA  
µA  
V
mA  
mA  
pF  
All term lines = 0.2V, Master/Slave = 0V  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V  
Terminator Output High Volt  
Output Current  
Sink Current  
Output Capacitance  
Leakage Current  
VO  
IO  
2.6  
21  
45  
2.85  
23  
65  
VOUT = 0.2V  
24  
2
ISINK  
CO  
VOUT = 4V, All lines  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,  
VOUT = 0 to 4V, TA = 25°C  
2.5  
ILEAK  
µA  
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,  
VTERM = Open, VLINE = 2.7V, TA = 25°C  
1
µA  
Note 3. Open circuit failsafe voltage.  
Copyright © 2001  
Rev. 1.5a 02/13  
3
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
ELECTRICAL CHARACTERISTICS  
LX5241 / 5242  
Parameter  
Symbol  
Test Conditions  
Units  
Min. Typ.  
Max.  
Single-Ended Termination Section (continued)  
Ground Driver Impedance  
Thermal Shutdown  
ZG  
I = 1mA  
100  
150  
°C  
DISCONNECT Section  
DISCONNECT Thresholds  
Input Current  
VTH  
IIL  
IIL  
IIH  
IIH  
0.8  
2.0  
10  
V
LX5241/43  
LX5242  
LX5241/43  
LX5242  
DISCONNECT = 0V  
DISCONNECT = 0V  
DISCONNECT = 2.4V  
DISCONNECT = 2.4V  
µA  
nA  
nA  
µA  
100  
100  
10  
MASTER / SLAVE Section  
MASTER / SLAVE Thresholds  
Input Current  
VTH (MS)  
IIL (MS)  
0.8  
2.0  
10  
V
µA  
nA  
MASTER / SLAVE = 0V  
IIH (MS) MASTER / SLAVE = 2.4V  
100  
BLOCK DIARAM  
1 of 9  
SE  
2.85V, 22.5mA  
Power ON  
VTERM  
DISCONNECT  
S.E.  
2.2V  
Internal VREF  
1.30V  
1.07mA  
LVD (-)  
/ SE  
SE  
DISC/HVD  
LVD  
52.5  
52.5  
200  
LVD  
1.25V  
LVD (+)  
/ SE (Pseudo-GND)  
SE  
HVD  
LVD  
10mA  
M/S  
20  
1.07mA  
DIFFSENSE  
DIFB  
MODE Control & Delay  
LATCH  
SE  
SE  
HVD  
LVD  
Window  
Comp.  
HVD  
LVD  
POWER  
ON  
&
MODE  
DELAY  
Power ON  
FIGURE 1 — LX5241/5242 Block Diagram  
Copyright © 2001  
Rev. 1.5a 02/13  
4
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
FUNCTIONAL PIN DESCRIPTION  
Pin  
Designator  
Description  
1-, 2-, 3-, 4-, 5-, 6-, 7-, 8-, 9-6  
Negative signal termination lines for LVD mode. Signal termination lines for SE mode.  
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+ Positive signal termination lines for LVD mode. Pseudo-ground lnes for SE mode.  
VTERM  
Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7µF  
low-ESR capacitor for every three terminator devices. Iis absolutely necessary to connect this pin to  
the decoupling capacitor through a very low impedance (big traces on PCB). Keeping distances very  
short from the decoupling capacitors to the V  
pin is also critical. The value of the decoupling  
capacitor is somewhat layout dependant andTEsRoMmpplications may benefit from high-frequency  
decoupling with 0.1µF capacitors right at VTERM pin.  
DISCONNECT6  
GND6  
Enables / disables terminator. See Power Down Function Table for logic levels per device.  
Terminator ground pin. Connect to ground.  
MASTER / SLAVE6  
Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the control-  
ling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see  
MASTER/SLAVE Function Table.  
DIFFSENSE6  
DIFFB6  
This is a dual function pin. It drives SCSI bus DIFFSENS line. It is also the sense pin to detect the  
SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the  
MASTER/SLAVE pin. Please see SENSE and MASTER/SLAVE Function Tables. Internally  
connected to DIFFB pin through 20kOhm resistor.  
Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense  
pin when the device is a nocontrolling terminator (MASTER/SLAVE pin is Low). An RC filter  
(20kOhm / 0.1µF) is not rered on the LX5241/42/43, as it has an internal timer.  
SE6  
LVD6  
Single-ended output; when High, terminator is operating in SE mode.  
Low Voltage Differenutput. When High, terminator is operating in LVD mode.  
High Voltage Differential output. When High, terminator is operating in HVD mode.  
HVD6  
HEATSINK6  
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink  
only, and not a true ground connection. It is recommeneded that these pins be connected to ground,  
but can be left floating.  
Copyright © 2001  
Rev. 1.5a 02/13  
5
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
APPLICATION SCHEMATIC  
H
O
S
T
P
R
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T
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V
1
-
1
1
-
+
V
V
V
T
T
T
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R
R
R
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T
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R
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1
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t
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(
9
)
L
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X
X
5
5
4
4
4
2
2
1
1
1
4
4
4
/
/
/
2
2
2
L
L
L
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5
5
5
4
4
4
2
2
2
1
1
1
4
4
4
/
2
2
2
4
4
4
3
3
3
9
9
-
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9
9
-
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L
L
L
X
X
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5
5
5
2
2
2
4
4
4
3
3
3
D
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C
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C
C
C
T
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D
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C
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/
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D
D
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G
G
G
N
N
N
D
D
D
D
D
D
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I
I
F
F
F
F
F
F
B
B
B
*
I
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B
B
B
*
*
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V
1
1
1
1
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R
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.
7
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F
4
.
7
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D
a
t
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e
(
9
)
L
L
X
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5
5
2
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9
9
-
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9
9
-
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D
M
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D
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V
1
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5
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(
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4
2
1
C
4
P
W
2
P
a
c
a
k
g
e
.
M
u
s
t
c
o
n
c
n
t
D
I
e
F
F
S
N
E
S
s
i
g
n
l
o
a
t
D
I
F
S
F
N
E
S
E
p
i
n
o
n
P
W
p
c
a
k
a
g
e
.
FIGURE 2 — Linfinity ONLY Application Schematic  
Copyright © 2001  
Rev. 1.5a 02/13  
6
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5241/5242/5243  
UltraMAX  
M U L T I M O D E S C S I T E R M I N A T O R  
P R O D U C T I O N D A T A S H E E T  
APPLICATION SCHEMATIC  
H
O
S
T
P
R
E
I
P
H
E
R
A
L
T
E
R
M
P
O
W
E
R
T
E
R
M
P
O
W
E
R
V
1
-
1
1
-
+
V
V
V
T
T
T
E
E
E
R
M
T
T
T
E
E
E
R
M
M
M
1
+
D
a
t
a
L
i
n
s
e
(
9
)
L
L
X
X
5
5
4
4
4
2
2
1
1
1
4
4
4
/
2
2
2
L
L
L
X
5
5
5
4
4
4
2
2
2
1
1
1
4
4
4
/
2
2
2
4
4
4
3
3
3
9
9
-
+
9
9
-
+
L
L
L
X
X
X
5
5
5
2
2
2
4
4
4
3
3
3
D
I
S
C
O
N
E
N
C
T
D
I
S
C
O
N
E
N
C
T
D
M
G
I
I
I
S
S
S
C
C
C
O
O
O
N
N
N
E
E
E
N
N
N
C
C
C
T
T
T
D
D
D
I
I
I
S
S
S
C
C
C
O
O
O
N
N
N
E
E
E
N
N
N
C
C
C
T
T
T
/
/
/
S
S
S
M
M
M
/
/
/
S
S
S
D
I
F
F
S
E
N
S
E
D
D
I
I
I
F
F
F
F
F
F
S
E
E
E
N
N
N
S
S
S
E
E
E
2
0
k
2
0
k
N
N
N
D
D
D
G
G
G
N
N
N
D
D
D
D
D
D
I
I
I
F
F
F
F
F
F
B
B
B
I
F
F
B
0
.
1
µ
F
0
.
1
µ
F
N
N
N
.
.
.
C
C
C
.
.
.
*
*
*
N
N
N
.
.
.
C
C
C
.
.
.
*
*
*
P
P
P
i
i
i
n
n
n
1
1
1
P
P
P
i
i
i
n
n
n
1
1
1
4
4
4
.
.
.
7
7
7
µ
µ
µ
F
F
F
*
*
*
4
4
4
.
.
.
7
7
7
µ
µ
µ
F
F
F
*
*
*
V
1
1
1
1
-
+
R
M
R
+
D
a
t
a
L
i
n
s
e
(
9
)
L
L
X
X
5
5
2
2
/
X
/
9
9
-
+
9
9
-
+
4
.
7
µ
F
4
.
7
µ
F
D
M
G
D
D
S
D
I
F
F
S
E
N
S
E
I
F
F
B
V
1
1
1
1
-
+
R
M
R
+
L
L
X
X
5
5
2
2
/
X
/
C
o
t
n
r
o
l
L
i
n
s
e
(
9
)
9
9
-
+
9
9
-
+
D
M
G
D
D
S
D
I
F
F
S
E
N
S
E
I
F
F
B
*
T
h
e
c
a
p
c
i
t
o
a
r
o
n
P
i
n
1
c
a
n
b
e
p
l
a
c
e
d
o
n
h
t
e
L
X
5
2
C
4
D
B
1
,
L
X
5
2
C
4
D
B
2
o
r
h
t
e
L
X
5
2
C
4
P
W
3
o
t
b
e
p
i
n
-
c
o
m
p
t
a
i
b
l
e
w
i
t
h
o
t
h
r
e
d
v
e
i
c
e
s
.
T
h
i
s
V / R  
E G  
E
F
c
a
p
c
i
t
o
a
r
i
s
n
t
o
r
e
q
i
r
e
u
d
.
R
FIGURE 3 — Suggested Linfinity LX5241/5242/5243 Universal Application Schematic  
(Please Reference Manufacturer's Current Data Sheet To Ensure Compatibility)  
UltraMAX is a trademark of LinFinity Microelectronics Inc.  
Prodution Data - Information Contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be mod-  
ified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi  
reserves the right to change the configuration and performance of the product and to discontinue product at any time.  
Copyright © 2001  
Rev. 1.5a 02/13  
7

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