LX7175CLD-TR [MICROSEMI]

Switching Regulator, Voltage-mode, 3.5A, 1650kHz Switching Freq-Max, PDSO10, DFN-10;
LX7175CLD-TR
型号: LX7175CLD-TR
厂家: Microsemi    Microsemi
描述:

Switching Regulator, Voltage-mode, 3.5A, 1650kHz Switching Freq-Max, PDSO10, DFN-10

开关 光电二极管 输出元件
文件: 总16页 (文件大小:1037K)
中文:  中文翻译
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LX7175  
3V-5.5V, 3.5A Step Down  
PWM Switching Regulator  
Features  
. 3.5A Step-down Regulator  
Description  
. Operational Input Supply Voltage Range:  
LX7175 is a step-down PWM Switching Regulator  
IC with integrated high side P-CH and low side N-  
CH MOSFETs. The IC operates using a hysteretic  
3V-5.5V  
. Integrated PMOS and NMOS  
. Load Current from zero to 3.5A  
. 1.4MHz Switching Frequency  
control topology with  
a
full load switching  
frequency of 1.4MHz allowing small output filter  
components while maintaining excellent dynamic  
load response.  
. SKIP Pulse to Improve Light Load  
Efficiency  
The operational input voltage range of LX7175 is  
from 3V to 5.5V and it has two modes of operation  
selected externally by MODE pin. When MODE  
pin is high, it operates in continuous PWM  
operation and when it is tied low, it operates in  
Power Save Mode (PSM) with automatic transition  
between PWM and PSM mode depending on the  
load current. This allows the converter’s efficiency  
to remain high when load current drops.  
. Open VReg Type 0 LV Compatible  
. Input UVLO Protection  
. Enable Pin  
. Power Good  
. Internal Soft-start  
. Cycle-by-Cycle Over Current Protection  
. Latch Off Operation Under Output Short.  
. RoHS Compliant for Pb-free  
In the shutdown mode, the IC’s current consumption  
is reduced to less than 1µA and the output capacitor  
is discharged.  
Applications  
. Small Battery Operated Devices  
. HDD  
Other features of the part are: a) cycle-by-cycle  
current limit followed by latch off, b) thermal  
protection with hysteresis, c) internal digital soft  
start, d) and Power Good function.  
. Set-Top Box  
. LCD TV’s  
. Notebook/Netbook  
. Routers  
. Video Cards  
. PC Peripherals  
. PoE Powered Devices  
VIN  
CVIN  
10µF, X5R  
2, 3  
VIN  
Rmode  
L
RPgood  
VOUT  
8
6, 7  
MODE  
SW  
FB  
1µH  
R1  
1%  
COUT  
2x22µF, X5R  
C1  
LX7175  
9
1
PGOOD  
R2  
1%  
EN  
10  
4, 5  
EN  
GND  
on  
off  
PAD  
Figure 1 · Typical Application of LX7175  
July 2013 Rev. 1.2  
www.microsemi.com  
© 2013 Microsemi Corporation  
1
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Pin Configuration and Pinout  
1
10  
9
FB  
EN  
2
PGOOD  
MODE  
SW  
VIN  
Thermal  
Pad  
(GND)  
3
4
5
8
VIN  
GND  
GND  
7
6
SW  
Figure 2 · Pinout DFN 3x3 10L Top View  
Marking: Line1 7175  
Line2 Date / Lot Code  
Line3 * MSC ( * is the pin 1 dot )  
Ordering Information  
Ambient  
Type  
Package  
Part Number  
Packaging Type  
Temperature  
LX7175CLD  
Bulk / Tube  
RoHS Compliant,  
-10°C to 85°C  
DFN 3X3 10L  
Pb-free  
LX7175CLD-TR  
Tape and Reel  
2
Pin Description  
Pin Description  
Pin Number  
Pin Designator  
Description  
Voltage feedback pin. Connect to the output terminal through a resistor  
divider network to set the output voltage of the regulator to the desired  
voltage.  
1
FB  
Input voltage terminal of the regulator. A minimum of 10µF, X5R type  
ceramic capacitor must be connected as close as possible from this pin to  
GND plane to insure proper operation.  
2, 3  
VIN  
4, 5  
6, 7  
GND  
SW  
Ground pins for the power stage.  
Switch-node pin. Connect the output inductor between this pin and output  
capacitor.  
When this pin is connected to GND, the chip will go into variable frequency  
hysteretic mode that gradually reduces switching frequency as the load is  
reduced. When it is connected to VIN, it operates in constant frequency  
hysteretic mode, and will remain in continuous conduction mode. In this  
mode the low side MOSFET is not turned off when the current in the  
inductor reverses direction to pull current from the load.  
8
MODE  
Power-good pin. This is an open-drain output and should be connected to  
a voltage rail (for example, VIN) with an external pull-up resistor. During  
the power on sequence, this pin switches from Low to High state when the  
FB voltage exceeds the power good threshold and the internal soft start  
has finished its operation. It will be pulled low, when the FB falls below the  
power good threshold minus the hysteresis. It will turn back on, when the  
pull FB rises again above the threshold.  
9
PGOOD  
Pulling this pin higher than 2V will enable the regulator. When pulled low,  
the regulator will turn off.  
10  
EN  
For good thermal connection, this PAD must be connected using thermal  
VIAs to the GND plane and to the LAND pattern of the IC.  
Thermal PAD  
3
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Block Diagram  
2,3  
VIN  
PGOOD  
9
CHARGE  
POWER  
GOOD  
PHASE DET  
PUMP  
HIGH SIDE  
DRIVER  
OSC  
SW  
6,7  
MODE  
CURRENT  
LIMIT  
PWM  
CONTROL  
8
FB  
1
LOW SIDE  
DRIVER  
TON, TOFF  
CONTROL  
-
+
EN  
ENABLE  
10  
GND  
4,5  
VREF+  
SOFT START  
DIODE  
EMULATOR  
SOFT  
DISHARGE  
LX7175  
PAD  
Figure 3 · Simplified Block Diagram of LX7175  
4
Absolute Maximum Ratings  
Absolute Maximum Ratings  
Min  
-0.3  
-0.3  
-4  
Max  
7
Units  
V
Parameter  
VIN, EN, FB, PGOOD, MODE to GND  
SW to GND  
7
V
SW to GND (Shorter than 15ns)  
Maximum Junction Temperature  
Storage Temperature  
7
V
150  
150  
°C  
°C  
-65  
Peak Package Solder Reflow Temperature  
(40s, reflow)  
260 (+0, -5)  
°C  
Note: Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only.  
Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term  
operating reliability  
Operating Ratings  
Min  
3.0  
0.8  
-10  
0
Max  
5.5  
3.3  
85  
Units  
V
VIN  
VOUT  
V
Ambient Temperature  
Output Current  
°C  
A
3.5  
Thermal Properties  
Thermal Resistance  
Typ  
Units  
θJA  
41.2  
°C/W  
Note: The JA number assumes no forced airflow. Junction Temperature is calculated using TJ = TA + (PD x JA).  
In particular, θJA is a function of the PCB construction. The stated number above is for a four-layer board in  
accordance with JESD-51 (JEDEC).  
Electrical Characteristics  
Note: The following specifications apply over the operating ambient temperature of -10C TA 85C except  
where otherwise noted with the following test conditions: 3.0 < VIN < 5.5V. Typical parameters refer to  
TJ = 25°C, VIN = 5V.  
Symbol  
Parameter  
Test Condition  
Min  
Typ  
Max  
Units  
Operating Current  
IQ  
Input Current  
ILOAD = 0, MODE = GND  
EN = GND, TA = 25°C  
200  
0.1  
500  
1
µA  
µA  
Input Current at Shut  
Down  
IIN  
5
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Symbol  
Parameter  
Test Condition  
Min  
Typ  
Max  
Units  
VIN INPUT UVLO  
VIN  
Under Voltage Lockout VIN rising  
UVLO Hysteresis  
2.4  
2.8  
V
VHYS  
250  
mV  
FEEDBACK  
TA = 25°C  
0.788 0.800 0.812  
V
V
Feedback Voltage  
VREF  
IFB  
Internal Reference  
0 < TJ < 125°C  
0.782  
0.818  
10  
FB Pin Input Current  
nA  
VIN from 3V to 5.5V, MODE = High,  
ILOAD = 0.1A, VOUT = 1V ,  
Line Regulation  
Load Regulation  
0.065  
%
L = 0.68µH, COUT = 44µF. GBD  
VIN = 5V, MODE = High  
VOUT = 1V  
0.06  
0.08  
ILOAD = 0 to 3.5A,  
L = 0.68µH, COUT = 44µF.  
GBD  
%/A  
VOUT = 3.3V  
VOUT = 1V  
VIN = 5V, MODE = Low  
ILOAD = 0.2A to 3.5A,  
L = 0.68µH, COUT = 44µF.  
GBD  
0.075  
0.11  
%/A  
mV  
VOUT = 3.3V  
Load from 0.1A to 1.5A, Tr = Tf = 1µs,  
VOUT = 1V, L = 0.68µH, COUT = 44μF,  
MODE = High. GBD  
Transient Response  
FB UVLO Threshold  
±35  
FB UVLO  
VFBULVO  
40%  
50%  
VREF  
OUTPUT DEVICE  
RDSON_H RDSON of High Side  
RDSON_L  
55  
40  
100  
65  
mΩ  
mΩ  
RDSON of High Side  
Current Limit  
VIN = 5V.  
0 < TJ < 125°C. GBD  
4.5  
5.9  
5.3  
7.3  
IL  
A
VIN = 3V.  
3.89  
6.74  
Thermal Shut Down  
Threshold  
TSH  
TH  
GBD  
GBD  
140  
163  
27  
185  
°C  
°C  
Hysteresis  
OSCILLATOR  
f
Switching Frequency  
MODE = High  
1.25  
0.3  
70  
1.4  
1.65  
0.6  
MHz  
MHz  
%
In Boundary Conduction Mode, In Hysteretic  
Mode (The PLL is off)  
FHYST  
Switching Frequency  
Maximum Duty Cycle  
0.445  
DMAX  
SOFT START  
From EN going high to VOUT reaches  
regulation.  
TSS  
Soft Start Time  
0.8  
1.4  
1.8  
ms  
6
Electrical Characteristics  
Symbol  
Parameter  
Test Condition  
Min  
Typ  
Max  
Units  
MODE  
MVIH  
Input High  
1.1  
V
MVIL  
Input Low  
Input Bias  
0.4  
1
V
MVIH  
0.01  
µA  
EN INPUT  
ENVIH  
ENVIL  
ENH  
Input High  
1.1  
V
V
Input Low  
0.4  
1
Hysteresis  
0.1  
V
ENII  
Input Bias Current  
0.01  
µA  
POWER-GOOD  
Power-good Transition VFB rising, in percentage of output voltage  
VPG  
83  
40  
%
mV  
High Threshold  
set-point.  
VPGHY  
PGRDSON  
Hysteresis  
Either VFB rising or falling  
Power-good Internal  
FET RDSON  
VIN = 5V, 0 < TJ < 125°C  
100  
1
PGOOD FET Leakage  
Current  
0.01  
5
µA  
µs  
PGOOD Internal Glitch  
Filter  
OUTPUT DISCHARGE  
Internal Discharge  
80  
300  
600  
Resistor  
GBD Guaranteed by design, not production tested.  
7
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Typical Performance Curves (Efficiency & Line Regulation)  
95  
90  
85  
80  
75  
70  
95  
90  
85  
80  
75  
70  
0
500  
1000  
1500  
2000  
2500  
3000  
3500  
1
10  
100  
1000  
Load Current (mA)  
Load Current (mA)  
VIN = 3.3V, VOUT = 0.9V  
VIN = 3.3V, VOUT = 1.2V  
VIN = 3.3V, VOUT = 1.8V  
VIN = 5V, VOUT = 0.9V  
VIN = 5V, VOUT = 1.2V  
VIN = 5V, VOUT = 1.8V  
VIN = 3.3V, VOUT = 0.9V  
VIN = 3.3V, VOUT = 1.2V  
VIN = 3.3V, VOUT = 1.8V  
VIN = 5V, VOUT = 0.9V  
VIN = 5V, VOUT = 1.2V  
VIN = 5V, VOUT = 1.8V  
Figure 4 · PSM Mode Efficiency  
Figure 5 · PSM Mode Efficiency in Log Scale  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0.91  
0.905  
0.9  
0.895  
0.89  
2.75  
3.25  
3.75  
4.25  
4.75  
5.25  
5.75  
1
10  
100  
1000  
VIN (V)  
Load Current (mA)  
VIN = 3.3V, PSM  
VIN = 5V, PSM  
VIN = 3.3V, PWM  
VIN = 5V, PWM  
VOUT=0.9V  
Figure 6 · PSM vs. PWM Efficiency with VOUT=1.8V  
Figure 7 · Line Regulation VOUT = 0.9V (VOUT vs. VIN)  
8
Typical Performance Curves (Line Regulation & Load Regulation)  
Typical Performance Curves (Line Regulation & Load Regulation)  
1.21  
1.208  
1.206  
1.204  
1.202  
1.2  
1.82  
1.81  
1.8  
1.79  
1.78  
1.77  
1.76  
1.198  
1.196  
1.194  
1.192  
1.19  
2.75  
3.25  
3.75  
4.25  
4.75  
5.25  
5.75  
2.75  
3.25  
3.75  
4.25  
4.75  
5.25  
5.75  
VIN (V)  
VIN (V)  
VOUT=1.2V  
VOUT=1.8V  
Figure 8 · Line Regulation VOUT = 1.2V (VOUT vs. VIN)  
Figure 9 · Line Regulation VOUT = 1.8V (VOUT vs. VIN)  
3.31  
3.308  
3.306  
3.304  
3.302  
3.3  
1.012  
1.01  
1.008  
1.006  
1.004  
1.002  
1
3.298  
3.296  
3.294  
0.998  
0
0.5  
1
1.5  
Load Curent (A)  
MODE=LOW  
2
2.5  
3
3.5  
0
0.5  
1
1.5  
Load Current (A)  
MODE=LOW  
2
2.5  
3
3.5  
MODE=HIGH  
MODE=HIGH  
Figure 10 · Load Regulation VIN = 5V, VOUT = 1.0V  
Figure 11 · Load Regulation VIN = 5V, VOUT = 3.3V  
(VOUT vs. Load Current)  
(VOUT vs. Load Current)  
9
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Typical Performance Curves (Load Transient - VIN = 5V, VOUT = 1V)  
Figure 12 · L = 0.68µH, COUT=44µF  
Figure 13 · L = 0.68µH, COUT=44µF, Rising Edge  
CH2: VOUT, CH4: IL  
CH2: VOUT, CH4: IL  
Figure 14 · L = 0.68µH, COUT=154µF  
Figure 15 · L = 0.68µH, COUT=154µF Rising Edge  
CH2: VOUT, CH4: IL  
CH2: VOUT, CH4: IL  
10  
Typical Performance Curves (Start Up - VIN = 5V, VOUT = 1V)  
Typical Performance Curves (Start Up - VIN = 5V, VOUT = 1V)  
Figure 16 · Power up with no load, MODE = High  
Figure 17 · Power up with resistive load, MODE = High  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
Figure 18 · Power up with no load, MODE = Low  
Figure 19 · Power up with resistive load  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
11  
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Typical Performance Curves (Short Condition)  
Figure 20 · Output Short 5V input 1V output  
Figure 21 · Output Short 5V input 3.3V output  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
Figure 22 · Power into Short from VIN, VIN = 5V  
Figure 23 · Power into Short from EN, EN = VIN = 5V  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
CH1: VIN, CH2: VOUT, CH3: PGOOD,  
CH4: Inductor Current  
12  
Typical Performance Curves (Output Voltage Ripple)  
Typical Performance Curves (Output Voltage Ripple)  
34  
32  
30  
28  
26  
24  
22  
20  
45  
40  
35  
30  
25  
20  
15  
22  
44  
66  
88  
110  
132  
154  
176  
22  
44  
66  
88  
110  
132  
154  
176  
Output capacitance (µF)  
Output capacitance (µF)  
L=0.68uH, Vin=5V  
L=0.68uH, Vin=3V  
L=1.5uH, Vin=5V  
L=1.5uH, Vin=3V  
L=0.68uH  
L=1.5uH  
Figure 24 · No Load Peak to Peak Output Ripple  
Figure 25 · No Load Peak to Peak Output Ripple  
VOUT = 1V  
VIN = 5V, VOUT = 3.3V  
Figure 26 · No Load Peak to Peak Output Ripple  
Figure 27 · Figure 26 Rising Edge Zoom In  
CH2: VOUT  
CH1: SW, CH2: VOUT, CH4: Inductor Current  
VIN = 5V, VOUT = 3.3V,  
VIN = 5V, VOUT = 3.3V,  
L = 0.68µH, COUT = 154µF  
L = 0.68µH, COUT = 154µF  
13  
3V-5.5V, 3.5A Step Down PWM Switching Regulator  
Theory of Operation / Application Information  
Basic Operation  
The operation of the controller consists of comparing the VFB voltage to an internal reference.  
When the VFB voltage is lower than the VREF, the upper switch turns on. When the VFB voltage is  
higher than VREF, the upper switch turns off and the lower switch turns on. An internal ramp and  
clock signal are used to stabilize the switching frequency and keep the VFB immune to the output  
capacitor, Co, value or parasitic components (i.e. ESR, ESL).  
Setting of the Output Voltage  
The values of R1 and R2 are chosen so according to the following equation:  
ꢄꢅ  
(
)
 ꢈꢅ   
ꢊꢋꢌ  
 
ꢀꢁꢂ  
ꢄꢆ  
Startup  
The reference is ramped up from zero voltage to 0.8V in 1.4ms. During this time, the PGOOD is  
pulled low. When the reference reaches 0.8V, signaling the end of the soft start cycle, the PGOOD  
pin will go high within 5μS.  
Over Current Protection  
The IC has the ability to protect against all types of short circuit conditions. It has cycle by cycle short  
protection that turns off the upper MOSFET and ends the cycle when the current exceeds the OCP  
threshold. When this occurs, the off-time is at least 200ns before the upper FET is turned on again.  
This will clamp the current at the peak current threshold.  
If the load requires more than the peak current threshold, the output voltage will drop since the current  
is clamped. If the output drops below the feedback UVLO threshold, the device will latch off. The  
enable pin can be cycled to restart the converter.  
During the soft start sequence the current protection mechanism is different. If the peak current  
threshold is exceeded during soft start, the upper FET is turned off for approximately 1μs. After 1μs,  
the upper FET is turned back on. This will limit the peak output current at the peak current threshold.  
During soft start the feedback UVLO alarm is not active, so in the event of a short, the peak current  
will continue to trip until the end of the soft start period. After soft start, the feedback UVLO alarm will  
be active and the latch-off event will occur.  
Output Component Selection Table  
The table below shows the recommended resistor and feedforward capacitor values for a given  
output inductor and output capacitor value. See Figure 1 for the schematic location of R1, R2 and  
C1.  
VIN  
VOUT  
L
COUT  
R1  
R2  
C1  
1.5µH  
0.68µH  
1.5µH  
1µH  
0.68µH  
1.5µH  
0.68µH  
1.5µH  
1µH  
180 pF  
100 pF  
68 pF  
47pF  
33 pF  
330 pF  
220 pF  
150 pF  
120pF  
100 pF  
180pF  
47pF  
154µF (7x22µF)  
5V  
1V  
24.9k  
100k  
44µF (2x22µF)  
154µF (7x22µF)  
44µF (2x22µF)  
5V  
3V  
3.3V  
1V  
100k  
32.4k  
0.68µH  
1.5µH  
1µH  
154µF (7x22µF)  
44µF (2x22µF)  
24.9k  
24.9k  
100k  
100k  
14  
DFN 3x3 10L PACKAGE OUTLINE DIMENSIONS  
DFN 3x3 10L PACKAGE OUTLINE DIMENSIONS  
D
e
MILLIMETERS  
INCHES  
L
Dim  
MIN  
0.70  
0
MAX  
0.80  
0.05  
MIN  
MAX  
A
A1  
A3  
b
0.0276  
0
0.0315  
0.0019  
E
E2  
0.20 REF  
0.0079 REF  
0.18  
0.30  
0.0071  
0.0118  
D
3.00 BSC  
0.1181 BSC  
Bottom  
View  
Top View  
b
D2  
e
2.25  
0.50 BSC  
3.00 BSC  
2.50  
0.0886  
0.0984  
D2  
0.0197 BSC  
0.1181 BSC  
E
E2  
L
1.50  
0.30  
1.75  
0.50  
0.0591  
0.0118  
0.0689  
0.0197  
A
A3  
A1  
Figure 28 · Package Dimensions  
Note: Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm  
(.006”) on any side. Lead dimension shall not include solder coverage  
LAND PATTERN RECOMMENDATION  
0.50mm  
0.30mm  
0.70mm  
1.75mm  
3.40mm  
2.50mm  
Figure 29 · Package Footprint  
Disclaimer:  
This PCB land pattern recommendation is based on information available to Microsemi by its suppliers. The actual land pattern to be used could be different depending on the  
materials and processes used in the PCB assembly, end user must account for this in their final layout. Microsemi makes no warranty or representation of performance based on  
this recommended land pattern.  
PRODUCTION DATA Information contained in this document is proprietary to Microsemi and is  
current as of publication date. This document may not be modified in any way without the express  
written consent of Microsemi. Product processing does not necessarily include testing of all  
parameters. Microsemi reserves the right to change the configuration and performance of the product  
and to discontinue product at any time.  
15  
Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor  
solutions for: aerospace, defense and security; enterprise and communications; and industrial  
and alternative energy markets. Products include high-performance, high-reliability analog and  
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LX7175-4/1.2  

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