PCA873F/CG/HPAS [MICROSEMI]
Ethernet Transceiver, 1-Trnsvr, Bipolar, PQCC28,;
| 型号： | PCA873F/CG/HPAS |
| 厂家： | 
Microsemi |
| 描述： | Ethernet Transceiver, 1-Trnsvr, Bipolar, PQCC28, 以太网：16GBASE-T 电信 电信集成电路 |
| 文件： | 总9页 (文件大小：91K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APRIL 1996
ADVANCE INFORMATION
DS4367 1.3
PCA873F
HIGH SPEED COPPER MEDIA 100 BASE Tx TRANSCEIVER DEVICE
The PCA873F is a transceiver device for use with
category 5 unshielded twisted pair (UTP) and type 1 shielded
twisted pair (STP) operating with data rates of 100/155 Mbit/s.
The device is aimed at dual 10/100Mb/s Ethernet
applications with Auto Negotiation. The PCA873F may also
be used for ATM, FDDI and Fast Ethernet applications.
TXVCC
1
5
6
25 PMIDP
24
TXREF
PMIDN
To enable Auto Negotiation to function in some 10/100
Mb/s applications the PCA873F has its receive side
continuously enabled so as the system can have full visibility
of any 100Mb/s link pulses received whilst in 10mb/s mode.
An important feature of the device is a Quantized
Feedback circuit which overcomes the “baseline wander”
associated with the MLT-3 and NRZ codes and
consequently, maintains the signal noise immunity.
TXGND2 7
TXON 8
23 VCC
2
GND2
SDN
22
21
20
19
9
10
11
TXOP
TXGND1
SDP
TXVCC
2
LBEN
The PCA873F is fabricated using the GEC Plessey
Semiconductors’ complementary high performance bipolar
array technology.
HP28
Fig.1 Pin connections - top view
ꢀ Tristatable TX outputs for dual 10Mb/s and 100Mb/s
ETHERNET applications
ꢀ Permanent receive during tristate to allow Auto
Negotiation with fixed 100Mb/s cards
ꢀ Single +5 V supply
FEATURES
ꢀ Complies with ANSI X 3T9.5 TP-PMD Draft standards
ꢀ Operates over 100 meters STP and category 5 UTP
ꢀ Quantized feedback circuit to overcome “baseline
wander”
ꢀ
28 pin Plastic Leaded Chip Carrier (PLCC)
ꢀ Adaptive equalization
ORDERING INFORMATION
PCA873F/CG/HPAS
ꢀ Programmable TX output current
ꢀ Low voltage shutdown of TX output
TXVCC
1
TXVCC2
-------------------------------------------------
5
11
6
7
SET
TX OUTPUT
CURRENT
CURRENT
TXREF
TXGND2
REFERENCE
CURRENT
DRIVER
9
8
15
16
PMRDP
PMRDN
TXOP
TXON
NRZI → MLT-3
ENCODER
PECL
TX DATA
TX OUTPUTS
13
19
VCC1
10
TXGND1
LBEN
TTL
TTL
LOW
VOLTAGE
SHUTDOWN
12
18
CONTROL
INPUTS
ENCSEL
TXOE
GND1
14
17
MUX/
CONTROL
3
ADAPTIVE
EQUALIZER
25
EQSEL
LOGIC
LEVEL
PMIDP
PMIDN
RX
DATA
PECL
PECL
24
23
22
20
21
2
1
AND QUANTIZED
FEEDBACK CIRCUIT
RXIP
RXIN
RX INPUTS
VCC
2
GND2
SDP
SDN
RXVCC
2
26
27
3
SIGNAL
DETECT
SIGNAL
DETECT
RXVCC1
RXGND1
RXGND2
28
4
-------------------------------------------------
LEVCAP
Fig.2 System block diagram
PCA873F
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
Operation at absolute max. ratings is not implied.
Exposure to stresses outside those listed could cause
permanent damage to the device.
DC supply voltages (V
)
+5V 5ꢀ
CC
Operating temperature (T ) 0°C to +70°C (+25°C typ.)
A
Power dissipation (P )
575mW (typ.)
DC Supply voltage (V
)
-0.5 to +7V
-65 to +150°C
T.B.D.
D
CC
Storage temperature (tst)
ESD
ELECTRICAL CHARACTERISTICS
Recommended operating conditions apply except where stated.
Value
Typ.
Characteristic
Symbol
Units
Conditions
Min.
Max.
DC characteristics
I
-
115
-
mA
V
supply current
no load
CC
CC
TTL high level I/P
TTL low level I/P
V
V
2
-
-
-
-
V
V
IH
0.8
IL
Schmitt high level
Schmitt low level
V
V
3.7
-
-
-
-
V
V
IH
1.5
IL
EQSEL high level I/P
EQSEL low level I/P
EQSEL floating level I/P
V
V
V
4.2
-
-
-
-
-
0.8
-
V
V
V
IH
IL
IZ
V
/2
CC
PECL high level I/P
PECL low level I/P
PECL high level O/P
PECL low level O/P
3.8
-
-
V
-0.5
3.6
-
V
V
V
V
CC
-
-
-
V
-0.9
CC
V
-1.75
3.5
CC
TTL high level I/P current
TTL low level I/P current
I
I
-
-
-
-
10
-400
µA
µA
V = V
IH CC
IH
V = 0V
IL
IL
Schmitt high level I/P current
Schmitt low level I/P current
I
I
-
-
-
-
10
10
µA
µA
V = V
IH CC
IH
V = 0V
IL
IL
EQSEL high level I/P current
EQSEL low level I/P current
I
I
-
-
-
-
1400
-1400
µA
µA
V = V
IH CC
IH
V = 0V
IL
IL
Transmit O/P current
pins TXOP, TXON
-
-
40
20
-
-
mA
mA
R
R
= 1.2kΩ (MLT-3)
= 1.2kΩ (NRZ)
REF
REF
Differential RX I/P
signal voltage
MLT-3
NRZ
-
-
1.4
0.7
-
-
Vp-p
Vp-p
measured on device pins
1,2
RX I/P common mode voltage
RX I/P impedance
-
V
/2
-
V
kΩ
ꢀ
RX I/Ps floating
CC
24
-
Signal detect threshold
V
t
50
-
wrt normalized output of
equalizer (Fig. 3)
TH
AC characteristics
-
2.5
10
-
-
-
-
ns
ns
ns
ns
TX driver outputs rise/fall times
pins TXOP, TXON
50Ω load
TXr
t
TXf
-
Transmit propagation delay
PMRD to TXO
t
TXpd
-
-
Receive propagation delay
RXI to PMID
t
12
MLT-3 or NRZ input
RXpd
Total Peak to Peak
-
2.5
Jitter including Transmitter
Cable and Receiver
2
PCA873F
FUNCTIONAL DESCRIPTION
The functional blocks within the device are shown in Fig. 2
These are described below:-
Fig.3 shows the normalised waveforms to be seen at the
TX outputs. A low voltage shutdown circuit turns off the TX
outputs when system V
specified minimum.
voltage falls to a level below the
CC
Transmit Section
NRZ or NRZI input data is applied to the 'PMRD' PECL
inputs and passed via the NRZI→MLT-3 encoder and current
driver to the 'TXO' outputs.
Receiver Section
This comprises a multi-mode adaptive equalizer, a
signal detect circuit and a quantized feedback block.
The recovered data is passed via the 'MUX/CONTROL
LOGIC' block, to the PMID outputs.
Encoder
The encoder operation is controlled by the state of the
'ENCSEL' pin.
When 'ENCSEL' is high, the NRZ data is passed
unencoded to the 'TXO' outputs.
When 'ENCSEL' is low, the NRZI data is converted to a
three level MLT-3 format at the 'TXO' outputs.
Note: In FDDI applications NRZI would be the binary format
at the PHY interface with the PCA873F whereas for ATM
applications NRZ would be used. The use of NRZ or NRZI is
transparent to internal circuits employed within the device.
Input data may be in either two level NRZ format, or
three level MLT-3 format, as selected by the state of the
'ENCSEL' pin. (High = NRZ: LOW = MLT-3)
Equalizer
The equalizer circuit is necessary to compensate for
signal degradation due to cable losses, however over-
equalization must be avoided to prevent excessive
overshoots resulting in errors during the reception of MLT-3
data. Three operating modes are therefore provided.
These three operating modes are controlled by the state
of tristate input 'EQSEL' and are described below:-
TXO Outputs
These are differential current source outputs with
programmable sink capability, each designed to drive a
nominal output impedance of 50Ω.
1) Auto Equalization ('EQSEL' floating)
Fully automatic equalization is achieved through the use
of a feedback loop driven by a control signal derived from the
signal amplitude.This provides adaptive control and prevents
over-modulation of the signal when short cable lengths are
used.
Output current is set by the value of an external resistor
(R
) between pin 'TXREF' and 'TXGND2'.
REF
This resistor defines an internal reference current
derived from an on-chip bandgap reference.
Final output current at the 'TXO' outputs is a multiple of
this current and is defined as:-
2) Full Equalization ('EQSEL' low)
In this mode, full equalization is applied to the input
signal irrespective of amplitude.
I
(mA) = 26/R
(kΩ) -NRZ mode
TXO
REF
I
(mA) = 52/R
(kΩ) -MLT-3 mode
TXO
REF
3) No Equalization ('EQSEL’ high)
The equalization is disabled completely when EQSEL is
high causing the received data signal to pass through the
equalizer with no correction being performed on it.
The TXO outputs can be tristated by taking the TXOE
pin high. This feature is useful when the output is to be
overdriven such as in dual 10Mb/s and 100Mb/s applications.
Transition times of the 'TXO' outputs are matched and
internally limited to approx. 2.5ns to reduce EMI emissions.
Signal Detector
A high level is produced on the 'SD' output when the
input signal on the 'RX' inputs exceeds the required minimum
for reliable operation. The 'SD' output is forced high
irrespective of input signal amplitude during loopback mode
(see later section on Loopback).
t
t
TXr
TXf
Quantized Feedback Circuit
The MLT-3 and NRZ codes have significant low
frequency components in their spectrum, which are not
transmitted through the transformers that couple the line to
the board. This results in 'Base Line Wander', which can
reduce the noise immunity of the receiver significantly.
The purpose of the quantized feedback circuit is to
restore these low frequency components through the use of
a feedback arrangement. The circuit will also correct any DC
offset that may exist on the received signal.
+1
V
NRZI
TH
0
The quantized feedback circuit generates both NRZ and
MLT-3 outputs. The appropriate output and feedback signal
are selected by the state of the 'ENCSEL' pin.
Control Functions
+1
V
In addition to the encoding and equalization selection
functions, the device also provides a loopback facility and
supports external cable detection circuits (wire fault). These
functions are described below:-
MLT-3
TH
0
V
TH
Loopback
-1
Pin 'LBEN' controls loopback operation.
A low level on this pin defines normal operation, a high
level defines loopback mode.
Fig.3 Normalized signal waveforms NRZI/MLT-3
3
PCA873F
In loopback mode, the 'PMRD' inputs are internally
routed to the 'PMID' outputs, 'SD' is forced high and the
TXOP and TXON outputs are disabled.
JITTER CHARACTERISTICS
TX Side
The jitter performance of the transmit side is illustrated
in Fig.5 for NRZI and Fig.6 for MLT-3. The PCA873F was
driven with a differential PECL signal on pins PMRDP and
PMRDN with the TX output waveform monitored on the cable
side of the magnetics. It can be seen from the plots that there
is no significant jitter introduced by the TX stage.
Output Enable
This function is controlled by pin 'TXOE'
A low level on this pin defines normal operation, a high
level defines tristate mode.
In tristate mode, data transmission is inhibited and the
TXOP and TXON forced into tristate.
RX Side
INTERFACING TO THE TWISTED PAIR (TP) MEDIA
For the receive side the jitter performance is
demonstrated in Fig.7 for NRZI and Fig.8 for MLT-3. The
measurements were made using a PCA873F interfacing to
100m of Cat 5 UTP cable fitted with RJ45 connectors and via
a Pulse Engineering PE-68511 magnetics module. The FDDI
defined Killer Packet was used for data and was run at
125Mb/s in MLT-3 mode and 155Mb/s in NRZ mode. The eye
diagrams were extracted at the PMIDP and PMIDN
differential PECL outputs. The PCA873F was set for auto
Equalisation (EQSEL floating) and used the external
components shown in Fig.4. The jitter figures are the total for
the internal circuits including the Adaptive Equalizer,
Quantized Feedback and, in the case of MLT-3, the MLT-3 to
NRZI decoder. As the test was made with a PCA873F driving
the cable the figure is in effect inclusive of the transmitter
side jitter.
The PCA873F requires transmit and receive magnetics
to couple to the copper media.
Listed below are four Magnetic Manufacturers and their
recommended parts for use on the 155Mbps ATM and
100Base-TX standards:
VENDOR
PART No
Bel Magnetics
Nano Pulse
Pulse
S558-5999-02
NPI 6121-30
PE-68511
Valor
ST 6022
Application Note ref. AN4078 is available giving a more
detailed technical note on the design issues relating to
transceivers for transmission over UTP cables.
Please contact each magnetics vendor for the latest
detailed component part numbers.
NOTE: 1. TX and RX power returns should be
separate and decoupled close to device.
2. ECL O/Ps should be terminated with a
VCC
standard 50Ω equivalent load to V -2V.
CC
50Ω 50Ω
RXVCC
1
VCC1
VCC2
TXVCC1
TXVCC
TXOP
TXON
RXVCC
RXIP
2
2
TO TX
TRANSFORMER
FROM RX
TRANSFORMER
22Ω
56Ω
22Ω
TXGND
RXIN
RXGND1
RXGND2
1k2Ω
TXREF
TXGND2
100nF
PMIDP
PMIDN
LEVCAP
LBEN
ENCSEL
TXOE
SDP
SDN
EQSEL
PMRDP
PMRDN GND1 GND2
Fig.4 Typical application diagram (MLT-3 100Ω CAT-5 UTP)
4
PCA873F
250mV
/div.
500mV
/div.
5nS/div.
4nS/div.
Fig.5 Transmit output NRZI data
Fig.6 Transmit output MLT-3 data
200mV
/div.
200mV
/div.
2nS/div.
2nS/div.
Fig.8 PECL RX data output MLT-3 mode
Fig.7 PECL RX data output NRZI mode
5
PCA873F
PIN DESCRIPTIONS
Name
Type
Description
Pin
1
2
3
4
RXIN
RXIP
input
input
Differential line receiver inputs
RXGND1
LEVCAP
power
analog
Ground to receiver circuits
Level capacitor. This stores the control voltage generated by the quantized
feedback circuits
+5V supply to transmit current reference circuit
5
6
TXV
1
power
analog
power
output
output
power
power
input
CC
Reference current setting pin for transmit outputs TXOP, TXON
TXREF
TXGND2
TXON
7
Ground to current reference circuit
Differential current driver outputs (MLT-3 or NRZ) from transmit
8
9
TXOP
encoder
10
11
12
TXGND
Ground to transmit output driver
TXV
2
+5V supply to transmit output driver
CC
ENCSEL
TTL logic input to select encoded state of TXO outputs and RXI inputs
(0 = MLT-3, 1 = NRZ)
13
14
15
16
17
V
1
power
power
input
input
input
+5V supply to TTL logic inputs
CC
GND1
PMRDP
PMRDN
EQSEL
Ground to TTL logic inputs
Differential PECL logic inputs to transmit encoder
3 level input to select receiver equalization mode:
0 = full equalization, 1 = no equalization, float = adaptive equalization
18
19
TXOE
LBEN
Schmitt input: 0 = normal operation, 1 = inhibit TX outputs
TTL logic input to select loopback mode. LBEN = 1 routes the PMRD inputs
to the PMID outputs and forces the TXOP outputs to a static state
input
input
Differential PECL logic outputs indicating ‘signal detect’ and loopback
20
21
22
23
24
25
26
SDP
SDN
output
output
power
power
output
output
power
mode status
Ground to PECL outputs
GND2
+5V supply to PECL outputs
V
2
CC
PMIDN
PMIDP
Differential PECL compatible logic outputs from receiver circuit
RXV
RXV
2
+5V
CC
27
28
1
+5V supply to receiver circuits
Ground to receiver circuits
power
power
CC
RXGND2
Table.1 Pin descriptions
GLOSSARY OF TERMS AND ABREVIATIONS
UTP
Unshielded Twisted Pair
Shielded Twisted Pair
STP
NRZ
NRZI
MLT-3
FDDI
PHY
ATM
Non Return To Zero
Non Return To Zero Inverted on 1s
Multi Level Transmit -3 levels
Fiber Distributed Data Interface
PHYsical Layer
Asynchronous Transfer Mode
Pseudo ECL
PECL
6
PCA873F
NOTES
7
PCA873F
PACKAGE DETAILS
Dimensions are shown thus: mm (in). For further package information, please contact your local Customer Service Centre.
HEADQUARTERS OPERATIONS
GEC PLESSEY SEMICONDUCTORS
Cheney Manor, Swindon,
Wiltshire, United Kingdom. SN2 2QW
Tel: (01793) 518000
CUSTOMER SERVICE CENTRES
• FRANCE & BENELUX Les Ulis Cedex Tel: (1) 69 18 90 00 Fax: (1) 64 46 06 07
• GERMANY Munich Tel: (089) 3609 06-0 Fax: (089) 3609 06-55
• ITALY Milan Tel: (02) 6607151 Fax: (02)66040993
• JAPAN Tokyo Tel: (03) 5276-5501 Fax: (03) 5276-5510
Fax: (01793) 518411
• KOREA Seoul Tel: (2) 5668141 Fax: (2) 5697933
• NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023
• SOUTH EAST ASIA Singapore Tel: 3827708 Fax: 3828872
• SWEDEN Stockholm Tel: (8)702 97 70 Fax: (8)640 47 36
• TAIWAN, ROC Taipei Tel: (2)5461260 Fax: (2)7190260
• UK, EIRE, DENMARK, FINLAND & NORWAY
Swindon Tel: (01793) 518510 Fax: (01793) 518582
These are supported by Agents and Distributors in major countries worldwide.
© GEC Plessey Semiconductors 1996 Publication No.DS4367 Issue No.1.3 April 1996
TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRINTED IN UNITED KINGDOM
GEC PLESSEY SEMICONDUCTORS
P.O. Box 660017,
1500 Green Hills Road,
Scotts Valley, California 95067-0017,
United States of America.
Tel (408) 438 2900
Fax: (408) 438 5576
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regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service.The
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constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such
information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.
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TECHNICAL DOCUMENTATION - NOT FOR RESALE
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