SG1525AJ/883C [MICROSEMI]
Switching Controller, 0.5A, 500kHz Switching Freq-Max, CDIP16, HERMETIC SEALED, CERAMIC, DIP-16;
| 型号： | SG1525AJ/883C |
| 厂家： | 
Microsemi |
| 描述： | Switching Controller, 0.5A, 500kHz Switching Freq-Max, CDIP16, HERMETIC SEALED, CERAMIC, DIP-16 CD |
| 文件： | 总7页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SG1525A/SG2525A/SG3525A
SG1527A/SG2527A/SG3527A
REGULATING PULSE WIDTH MODULATOR
DESCRIPTION
FEATURES
• 8V to 35V operation
The SG1525A/1527A series of pulse width modulator integrated circuits are
designed to offer improved performance and lower external parts count when used
to implement all types of switching power supplies. The on-chip +5.1 volt reference
is trimmed to ±1% initial accuracy and the input common-mode range of the error
amplifier includes the reference voltage, eliminating external potentiometers and
divider resistors. A Sync input to the oscillator allows multiple units to be slaved
together, or a single unit to be synchronized to an external system clock. A single
resistor between the CT pin and the Discharge pin provides a wide range of deadtime
adjustment. These devices also feature built-in soft-start circuitry with only a timing
capacitor required externally. A Shutdown pin controls both the soft-start circuitry
and the output stages, providing instantaneous turn-off with soft-start recycle for
slow turn-on. These functions are also controlled by an undervoltage lockout which
keeps the outputs off and the soft-start capacitor discharged for input voltages less
than that required for normal operation. Another unique feature of these PWM
circuits is a latch following the comparator. Once a PWM pulse has been terminated
for any reason, the outputs will remain off for the duration of the period. The latch
is reset with each clock pulse. The output stages are totem-pole designs capable
of sourcing or sinking in excess of 200mA. The SG1525A output stage features
NOR logic, giving a LOW output for an OFF state. The SG1527A utilizes OR logic
which results in a HIGH output level when OFF.
• 5.1V reference trimmed to ±1%
• 100Hz to 500KHz oscillator range
• Separate oscillator sync terminal
• Adjustable deadtime control
• Internal soft-start
• Input undervoltage lockout
• Latching P.W.M. to prevent multiple
pulses
• Dual source/sink output drivers
HIGH RELIABILITY FEATURES
- SG1525A, SG1527A
♦ Available to MIL-STD-883B
♦ MIL-M38510/12602BEA - JAN1525AJ
♦ MIL-M38510/12604BEA - JAN1527AJ
♦ Radiation data available
♦ LMI level "S" processing available
BLOCK DIAGRAM
Rev 1.4a 3/19/2005
Microsemi Inc.
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
(714) 898-8121 FAX: (714) 893-2570
1
∞
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage (+VIN) ....................................................... 40V
Collector Supply Voltage (VC) ........................................... 40V
Logic Inputs ....................................................... -0.3V to 5.5V
Analog Inputs ....................................................... -0.3V to VIN
Output Current, Source or Sink ................................... 500mA
Reference Load Current ............................................... 50mA
Oscillator Charging Current ............................................ 5mA
Operating Junction Temperature Range
150°C
Plastic (N, DW Packages ) ....................................... 150°C
-65°C to 150°C
Hermetic (J, L Packages) .....................................
Storage Temperature Range ..........................
Lead Temperature (Soldering, 10 seconds) ................. 300°C
RoHS Peak Package Solder Reflow Temp. (40 sec. max. exp.)...... 260°C(+0, -5)
Note 1. Values beyond which damage may occur.
THERMAL DATA
J Package:
Note A. Junction Temperature Calculation: TJ = TA + (PD x θJA).
Note B. The above numbers for θJC are maximums for the limiting
thermal resistance of the package in a standard mount-
ing configuration. The θJA numbers are meant to be
guidelines for the thermal performance of the device/pc-
board system. All of the above assume no ambient
airflow.
Thermal Resistance-Junction to Case, θJC .................. 30°C/W
Thermal Resistance-Junction to Ambient, θJA .............. 80°C/W
DW Package:
Thermal Resistance-Junction to Case, θJC .................. 40°C/W
Thermal Resistance-Junction to Ambient, θJA ............. 95°C/W
L Package:
Thermal Resistance-Junction to Case, θJC .................. 35°C/W
Thermal Resistance-Junction to Ambient, θJA ........... 120°C/W
N Package:
Thermal Resistance-Junction to Case, θJC ................... 40°C/W
Thermal Resistance-Junction to Ambient, θJA ............. 65°C/W
RECOMMENDED OPERATING CONDITIONS (Note 2)
Input Voltage (+VIN) ................................................ 8V to 35V
Collector Voltage (VC) .......................................... 4.5V to 35V
Sink/Source Load Current (steady state) ............. 0 to 100mA
Sink/Source Load Current (peak) ......................... 0 to 400mA
Reference Load Current ........................................ 0 to 20mA
Oscillator Frequency Range ....................... 100Hz to 350KHz
Oscillator Timing Resistor (RT) ........................ 2KΩ to 150KΩ
Deadtime Resistor Range (RD) ............................. 0Ω to 500Ω
Maximum Shutdown Source Impedance ......................... 5KΩ
Oscillator Timing Capacitor (CT) ................... 0.001µF to 0.1µF
Operating Ambient Temperature Range
SG1525A/SG1527A ....................................
-55°C to 125°C
SG2525A/SG2527A ...................................... -25°C to 85°C
SG3525A/SG3527A ......................................... 0°C to 70°C
Note 2: Range over which the device is functional.
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1525A/SG1527A with -55°C ≤ TA ≤ 125°C,
SG2525A/SG2527A with -25°C ≤ TA ≤ 85°C, SG3525A/SG3527A with 0°C ≤ TA ≤ 70°C, and +VIN = 20V. Low duty cycle pulse testing techniques are
used which maintains junction and case temperatures equal to the ambient temperature.)
SG1525A/2525A
SG1527A/2527A
Min. Typ. Max. Min. Typ. Max.
SG3525A
SG3527A
Parameter
Reference Section
Test Conditions
Units
Output Voltage
TJ = 25°C
5.05 5.10 5.15 5.00 5.10 5.20
V
Line Regulation
Load Regulation
VIN = 8V to 35V
IL = 0 to 20mA
Over Operating Temperature Range
10
20
20
30
50
50
10
20
20
30
50
50
mV
mV
mV
V
Temperature Stability (Note 3)
Total Output Voltage Range (Note 3) Over Line, Load and Temperature
5.00
5.20 4.95
5.25
Short Circuit Current
VREF = 0V, TJ = 25°C
80 100
80 100
mA
Output Noise Voltage (Note 3)
Long Term Stability (Note 3)
10Hz ≤ f ≤ 10KHz, TJ = 25°C
TJ = 125°C
40 200
40 200 µVrms
20 50 mV/khr
20
50
Note 3. These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
Note 4. FOSC = 40KHz (RT = 3.6KΩ, CT = 0.01µF, RD = 0Ω)
Note 5. Applies to SG1525A/2525A/3525A only, due to polarity of output pulses.
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
(714) 898-8121 FAX: (714) 893-2570
2
∞
ELECTRICAL CHARACTERISTICS (continued)
SG1525A/2525A
SG1527A/2527A
SG3525A
SG3527A
Parameter
Test Conditions
Units
Min. Typ. Max. Min. Typ. Max.
Oscillator Section (Note 4)
Initial Accuracy
TJ = 25°C
37.6 40 42.4 37.6 40 42.4 KHz
Voltage Stability
VIN = 8V to 35V
MIN ≤ TJ ≤ MAX
RT = 150KΩ, CT = 0.1µF
RT = 2KΩ, CT = 1nF
±0.3 ±1
±1
±3
±2
±6
150
%
%
Hz
KHz
mA
V
Temperature Stability (Note 3)
Minimum Frequency (Note 3)
Maximum Frequency (Note 3)
Current Mirror
±3
±6
150
350
1.7 2.0 2.2 1.7 2.0 2.2
3.0 3.5 3.0 3.5
350
IRT = 2mA
Clock Amplitude
Clock Width
TJ = 25°C
0.3 0.5 1.0 0.3 0.5 1.0
µs
Sync Threshold
1.2 2.0 2.8 1.2 2.0 2.8
V
Sync Input Current
Sync Voltage = 3.5V
1.0 2.5
1.0 2.5
mA
Error Amplifier Section (VCM = 5.1V)
Input Offset Voltage
Input Bias Current
Input Offset Current
DC Open Loop Gain
Gain-Bandwidth Product (Note 3)
Output Low Level
Output High Level
0.5
1
5
10
1
2
1
10
10
1
mV
µA
µA
dB
MHz
V
RL ≥10MΩ, TJ = 25°C
AV = 0dB, TJ = 25°C
60
1
75
2
60
1
75
2
0.2 0.5
3.8 5.6
0.2 0.5
3.8 5.6
V
Common Mode Rejection
VCM = 1.5V to 5.2V
60
75
60
75
dB
Supply Voltage Rejection
VIN = 8V to 35V
50
60
50
60
dB
P.W.M. Comparator Section (Note 4)
Minimum Duty Cycle
Maximum Duty Cycle
Input Threshold (Note 4)
V
V
COMP = 0.6V
COMP = 3.6V
0
0
%
%
V
45
0.6 0.9
49
45
0.6 0.9
49
Zero Duty Cycle
Maximum Duty Cycle
3.3 3.6
3.3 3.6
V
Input Bias Current
.05 2.0
.05 2.0
µA
Soft-Start Section
Soft Start Current
Soft Start Voltage
V
SHUTDOWN = 0V
VSHUTDOWN = 2V
SHUTDOWN = 2.5V
25
50
0.4 0.6
0.4 1.0
80
25
50
0.4 0.6
0.4 1.0
80
µA
V
mA
Shutdown Input Current
V
Output Drivers Section (each transistor, VC = 20V)
Output High Level
ISOURCE = 20mA
ISOURCE = 100mA
18
17
19
18
18
17
19
18
V
V
Output Low Level
I
SINK = 20mA
ISINK = 100mA
COMP and VSS = High
0.2 0.4
0.2 0.4
V
V
V
µA
ns
ns
µs
2.2
8
1.0
7
1.0
7
2.2
8
Undervoltage Lockout
Collector Leakage (Note 5)
Rise Time
Fall Time
Shutdown Delay (Note 3)
V
6
6
VC = 35V
200
100 600
50 300
200
100 600
50 300
CL = 1nF, TJ = 25°C
CL = 1nF, TJ = 25°C
VSD = 3V, CS = 0, TJ = 25°C
0.5
20
0.2
14
0.2
14
0.5
20
Total Standby Current
Standby Current
VIN = 35V
mA
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
(714) 898-8121 FAX: (714) 893-2570
3
∞
OSCILLATOR SECTION
FIGURE 1 - OSCILLATOR SCHEMATIC
FIGURE 3 - OSCILLATOR DISCHARGE TIME VS. RD AND CT
FIGURE 2 - OSCILLATOR CHARGE TIME VS. RT AND CT
ERROR AMPLIFIER SECTION
FIGURE 4 - ERROR AMPLIFIER
FIGURE 5 - ERROR AMPLIFIER OPEN-LOOP
FREQUENCY RESPONSE
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
(714) 898-8121 FAX: (714) 893-2570
4
∞
OUTPUT SECTION
FIGURE 6 -OUTPUT CIRCUIT (½ Circuit Shown)
FIGURE 7 - OUTPUT SATURATION CHARACTERISTICS
APPLICATION INFORMATION
In conventional push-pull bipolar designs, forward base drive is
controlled by R1 - R3 . Rapid turn-off times for the power devices
are achieved with speed-up capacitors C1 and C2 .
For single-ended supplies, the driver outputs are grounded. The
VC terminal is switched to ground by the totem-pole source
transistors on alternate oscillator cycles.
The low source impedance of the output drivers provides rapid
charging of power FET input capacitance while minimizing exter-
nal components.
Low power transformers can be driven directly by the SG1525A.
Automatic reset occurs during deadtime, when both ends of the
primary winding are switched to ground.
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
5
(714) 898-8121 ∞ FAX: (714) 893-2570
APPLICATION INFORMATION (continued)
SHUTDOWN OPTIONS
1. Use an external transistor or open-collector comparator to pull
down on the Comp terminal. This will set the PWM latch turning
off both outputs. If the shutdown signal is momentary, pulse-
by-pulse protection can be accomplished as the PWM latch will
be reset with each clock pulse.
3. Apply a positive-going signal to the Shutdown terminal. This
will provide most rapid shutdown of the outputs but will not
immediately set the PWM latch if there is a Soft-Start capacitor.
This capacitor will discharge but with a current of approxi-
mately twice the charging current.
2. The same results can be accomplished by pulling down on the
Soft-Startterminalwiththedifferencethatonthispin, shutdown
will not affect the amplifier compensation network but must
discharge any Soft-Start capacitor.
4. The shutdown terminal can be used to set the PWM latch on
a pulse-by-pulse basis if there is no external capacitance on
Soft-Start terminal. Slow turn-on may still be accomplished by
applying an external capacitor, blocking diode, and charging
resistor to the comp terminal. (See SG1524 Application Note).
SG1525A/1527A LAB TEST FIXTURE
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
6
(714) 898-8121 ∞ FAX: (714) 893-2570
CONNECTION DIAGRAMS & ORDERING INFORMATION (See Notes Below)
Ambient
Temperature Range
Package
Part No.
Connection Diagram
16-PIN CERAMIC DIP
J - PACKAGE
SG1525AJ/883B
JAN1525AJ
-55°C to 125°C
-55°C to 125°C
SG1525AJ/DESC -55°C to 125°C
INV. INPUT
N.I. INPUT
1
16
15
14
13
12
11
10
9
VREF
SG1525AJ
SG2525AJ
SG3525AJ
SG1527AJ/883B
JAN1527AJ
-55°C to 125°C
-25°C to 85°C
0°C to 70°C
-55°C to 125°C
-55°C to 125°C
2
3
4
5
6
7
8
+V
IN
OUTPUT B
VC
SYNC
OSC. OUTPUT
GROUND
CT
RT
OUTPUT A
SHUTDOWN
COMPENSATION
SG1527AJ/DESC -55°C to 125°C
DISCHARGE
SOFT-START
SG1527AJ
SG2527AJ
SG3527AJ
-55°C to 125°C
-25°C to 85°C
0°C to 70°C
16-PIN PLASTIC DIP
N - PACKAGE
SG2525AN
SG3525AN
SG2527AN
SG3527AN
-25°C to 85°C
0°C to 70°C
-25°C to 85°C
0°C to 70°C
N Package: RoHS Compliant / Pb-free Transition DC: 0503
N Package: RoHS / Pb-free 100% Matte Tin Lead Finish
16-PIN WIDE BODY
PLASTIC S.O.I.C.
DW - PACKAGE
SG2525ADW
SG3525ADW
SG2527ADW
SG3527ADW
-25°C to 85°C
0°C to 70°C
-25°C to 85°C
0°C to 70°C
1
2
3
16
INV. INPUT
N.I. INPUT
VREF
15
14
13
12
11
10
+VIN
SYNC
OUTPUT B
VC
OSC. OUTPUT
4
5
6
7
GROUND
OUTPUT A
SHUTDOWN
COMPENSATION
CT
RT
DISCHARGE
8
9
SOFT-START
DW Package: RoHS Compliant / Pb-free Transition DC: 0516
DW Package: RoHS / Pb-free 100% Matte Tin Lead Finish
3
2
1
20 19
20-PIN CERAMIC
LEADLESS CHIP CARRIER
L- PACKAGE
SG1525AL/883B -55°C to 125°C
SG1525AL -55°C to 125°C
SG1527AL/883B -55°C to 125°C
SG1527AL -55°C to 125°C
1. N.C.
11. N.C.
2. INV. INPUT
3. N.I. INPUT
4. SYNC
5. OSC. OUTPUT
6. N.C.
7. CT
8. RT
9. DISCHARGE
10. SOFT-START
12. COMP.
13. SHUTDOWN
14. OUTPUT A
15. GROUND
16. N.C.
17. VC
18. OUTPUT B
19. +VIN
4
5
18
17
16
15
14
6
7
8
20. VREF
9
10 11 12 13
Note 1. Contact factory for JAN and DESC product availablity.
2. All packages are viewed from the top.
Rev 1.4a
Copyright 1996
11861 Western Avenue ∞ Garden Grove, CA 92841
(714) 898-8121 FAX: (714) 893-2570
7
∞
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