USB50415C [MICROSEMI]
Bidirectional TVSarray ™; 双向TVSarray ™型号: | USB50415C |
厂家: | Microsemi |
描述: | Bidirectional TVSarray ™ |
文件: | 总2页 (文件大小:94K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
USB50403C thru USB50424C, e3
Bidirectional TVSarray ™
S C O T T S D A L E D I V I S I O N
DESCRIPTION
APPEARANCE
This TRANSIENT VOLTAGE SUPPRESSOR (TVS) is packaged in an SOT-143
configuration giving protection to 1 Bidirectional data or interface line. It is designed
for use in applications where protection is required at the board level from voltage
transients caused by electrostatic discharge (ESD) as defined in IEC 61000–4-2,
electrical fast transients (EFT) per IEC 61000-4-4 and effects of secondary lightning.
It is also available with either Tin-Lead plated terminations or as RoHS Compliant
with annealed matte-Tin finish by adding an “e3” suffix to the part number*.
These TVS arrays have a peak power rating of 500 watts for an 8/20 μsec pulse.
This array is suitable for protection of sensitive circuitry consisting of TTL, CMOS
DRAM’s, SRAM’s, HCMOS, HSIC microprocessors, UNIVERSAL SERIAL BUS
(USB) and I/O transceivers. The USB504xxC product provides board level
protection from static electricity and other induced voltage surges that can damage
or upset sensitive circuitry.
SOT–143
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
FEATURES
APPLICATIONS / BENEFITS
•
•
•
•
•
•
•
Protects 1 bidirectional line
•
•
•
•
•
EIA-RS485 data rates:
5 Mbs
10 Base T Ethernet
Surge protection per IEC 61000-4-2, IEC 61000-4-4
Provides electrically isolated protection
UL 94V-0 Flamability Classification
RoHS Compliant devices available by adding e3 suffix
ULTRA LOW CAPACITANCE 3 pF per line pair
ULTRA LOW LEAKAGE
USB date rate: 900 Mbs
Tape & Reel per EIA Standard 481-1-A
7 inch reel; 3,000 pieces per reel
MAXIMUM RATINGS
MECHANICAL AND PACKAGING
•
•
•
•
Operating Temperature: -55°C to +150°C
Storage Temperature: -55°C to +150°C
Peak Pulse Power: 500 watts (8/20 µs, Figure 1)
Pulse Repetition Rate: < .01%
•
•
•
•
Molded SOT-143 Surface Mount
Weight: 0.035 grams (approximate)
Body marked with device marking code* (see below)
Pin #1 defined by dot on top of package
ELECTRICAL CHARACTERISTICS
STAND OFF
VOLTAGE
VWM
BREAKDOWN
VOLTAGE
VBR
CLAMPING
VOLTAGE
VC
@ 1 Amp
(Figure 2)
VOLTS
CLAMPING
VOLTAGE
VC
@ 5 Amp
(Figure 2)
VOLTS
STANDBY
CURRENT
ID
CAPACITANCE
(f=1 MHz)
C
TEMPERATURE
COEFFICIENT
OF VBR
DEVICE
MARKING*
PART
NUMBER
@1 mA
@ VWM
@0V
αVBR
VOLTS
MAX
3.3
VOLTS
MIN
4
µA
MAX
200
40
1
pF
MAX
3
mV/°C
MAX
-5
MAX
8
MAX
11
USB50403C
USB50405C
USB50412C
USB50415C
USB50424C
53
55
5.0
6.0
10.8
19
13
3
3
1
512
515
524
12.0
15.0
24.0
13.3
16.7
26.7
26
8
24
32
1
3
3
11
43
57
1
28
*Device marking has an e3 suffix added for the RoHS Compliant option, e.g. 53e3, 55e3, 512e3, 515e3, and 524e3.
Copyright © 2005
6-28-2005 REV K
Microsemi
Scottsdale Division
Page 1
8700 E. Thomas Rd. PO Box 1390, Scottsdale, AZ 85252 USA, (480) 941-6300, Fax: (480) 947-1503
USB50403C thru USB50424C, e3
Bidirectional TVSarray ™
S C O T T S D A L E D I V I S I O N
SYMBOLS & DEFINITIONS
Symbol
VWM
Definition
Stand Off Voltage: Maximum dc voltage that can be applied over the operating temperature range.
Vwm must be selected to be equal or be greater than the operating voltage of the line to be protected.
Minimum Breakdown Voltage: The minimum voltage the device will exhibit at a specified current
Clamping Voltage: Maximum clamping voltage across the TVS device when subjected to a given current at a
pulse time of 20 µs.
VBR
VC
ID
C
Standby Current: Leakage current at VWM.
Capacitance: Capacitance of the TVS as defined @ 0 volts at a frequency of 1 MHz and stated in picofarads.
GRAPHS
8/20µs 500W Pulse
Figure 1
Peak Pulse Power Vs Pulse Time t = µsec
Figure 2
Pulse Wave Form
OUTLINE AND SCHEMATIC
INCHES
MILLIMETERS
MIN MAX
DIM
MIN
MAX
0.080
0.053
0.033
0.018
0.113
0.045
0.079
0.008
0.009
0.023
0.093
A
B
C
C1
D
E
F
G
H
I
0.070
0.047
0.027
0.012
0.107
0.042
0.067
0.002
0.003
0.018
0.083
1.78
1.20
0.69
0.30
2.72
1.07
1.70
0.051
0.076
0.46
2.11
2.03
1.40
0.84
0.46
2.87
1.14
2.01
0.20
0.23
0.58
2.36
PAD LAYOUT
SCHEMATIC
J
OUTLINE
Copyright © 2005
6-28-2005 REV K
Microsemi
Page 2
Scottsdale Division
8700 E. Thomas Rd. PO Box 1390, Scottsdale, AZ 85252 USA, (480) 941-6300, Fax: (480) 947-1503
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