WEDPS512K32-35BM [MICROSEMI]
SRAM Module, 512KX32, 35ns, CMOS, PBGA143, 16 X 18 MM, PLASTIC, BGA-143;
| 型号： | WEDPS512K32-35BM |
| 厂家： | 
Microsemi |
| 描述： | SRAM Module, 512KX32, 35ns, CMOS, PBGA143, 16 X 18 MM, PLASTIC, BGA-143 静态存储器 |
| 文件： | 总6页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ADVANCED*
n Commercial, Industrial and Military Temperature Ranges
n TTL Compatible Inputs and Outputs
n 5 Volt Power Supply
n Access Times of 12, 15, 17, 20, ns
n Packaging
• 16mm x 18mm, 143 PBGA
n Low Power CMOS
n Organized as 512Kx32, User Configurable as 1Mx16 or
*This data sheet describles a product that is developmental, is not qualified and
is subject to change or cancellation without notice.
2Mx8
FIG. 1
-
A2
A3
A1
A4
A0
D14
D12
GND
GND
GND
VCC
GND
D15
D13
GND
GND
GND
VCC
GND
NC
VCC
CS4
VCC
VCC
D24
D26
VCC
A18
D25
D27
VCC
A17
O E
A16
A15
D31
D28
VCC
GND
NC
CS2
D 9
D 8
NC
GND
GND
GND
GND
VCC
WE4
VCC
D30
D29
NC
D10
WE2
GND
VCC
D11
GND
GND
VCC
VCC
D 0
GND
GND
GND
VCC
VCC
VCC
NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
WE3
GND
GND
GND
GND
D17
D19
GND
GND
GND
GND
D16
D18
A10
GND
GND
GND
CS3
A14
A11
GND
GND
D23
D20
A13
A12
GND
NC
CS1
D 1
VCC
VCC
VCC
VCC
VCC
VCC
D22
D21
NC
D 2
D 3
D 7
D 5
VCC
WE1
GND
A6
A5
D 6
D 4
NC
A7
A8
A9
VCC
VCC
VCC
I/O0-31 DataInputs/Outputs
A0-18
WE1-4
CS1-4
OE
AddressInputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
VCC
GND
NC
Not Connected
May 2002 Rev. 3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
H
L
X
L
X
H
H
L
Standby
Read
High Z
Data Out
High Z
Standby
Active
Active
Active
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
TA
TSTG
VG
-55
-65
-0.5
+125
+150
Vcc+0.5
150
°C
°C
V
L
H
X
Out Disable
Write
L
Data In
TJ
°C
V
VCC
-0.5
7.0
Supply Voltage
VCC
VIH
VIL
4.5
5.5
VCC + 0.3
+0.8
V
V
Input High Voltage
Input Low Voltage
Operating Temp (Mil)
2.2
-0.5
-55
OEcapacitance
COE
CWE
CCS
V
V
IN = 0 V, f = 1.0 MHz
IN = 0 V, f = 1.0 MHz
30
pF
pF
pF
V
WE1-4 capacitance
CS1-4 capacitance
DataI/Ocapacitance
10
10
TA
+125
°C
V
IN = 0 V, f = 1.0 MHz
CI/O
CAD
V
I/O = 0 V, f = 1.0 MHz
10
30
pF
pF
Addressinputcapacitance
VIN = 0 V, f = 1.0 MHz
This parameter is guaranteed by design but not tested.
InputLeakageCurrent
OutputLeakageCurrent
ILI
ILO
VCC = 5.5, VIN =GND to VCC
10
10
µA
µA
CS=VIH, OE=VIH,VOUT =GNDtoVCC
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
CS=VIH, OE = VIH, f = 5MHz, Vcc = 5.5
OperatingSupplyCurrentx32Mode
StandbyCurrent
ICC x 32
ISB
660
80
mA
mA
V
OutputLowVoltage
VOL
IOL = 8mA for 15 - 35ns,
0.4
IOL = 2.1mA for 45 - 55ns, Vcc = 4.5
OutputHighVoltage
VOH
IOH = -4.0mA for 15 - 35ns,
IOH = -1.0mA for 45 - 55ns, Vcc = 4.5
2.4
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
Read Cycle Time
tRC
tAA
12
0
15
0
17
0
20
0
25
0
35
0
45
0
55
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
AddressAccessTime
12
15
17
20
25
35
45
55
OutputHoldfromAddressChange
Chip Select Access Time
tOH
tACS
tOE
12
7
15
8
17
9
20
10
25
12
35
25
45
25
55
25
OutputEnabletoOutputValid
ChipSelecttoOutputinLowZ
OutputEnabletoOutputinLowZ
ChipDisabletoOutputinHighZ
OutputDisabletoOutputinHighZ
tCLZ1
tOLZ1
tCHZ1
tOHZ1
1
0
2
0
2
0
2
0
2
0
4
0
4
0
4
0
7
7
12
12
12
12
12
12
12
12
15
15
20
20
20
20
1. This parameter is guaranteed by design but not tested.
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
12
10
10
8
15
13
13
10
13
2
17
15
15
11
15
2
20
15
15
12
15
2
25
17
17
13
17
2
35
25
25
20
25
2
45
35
35
25
35
2
55
50
50
25
40
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ChipSelecttoEndofWrite
AddressValidtoEndofWrite
DataValidtoEndofWrite
WritePulseWidth
10
0
AddressSetupTime
tAS
AddressHoldTime
tAH
0
0
0
0
0
0
5
5
OutputActivefromEndofWrite
tOW1
2
2
2
3
4
4
5
5
Write Enable to Output in High Z tWHZ1
7
8
9
11
13
15
20
20
Data Hold Time tDH
0
0
0
0
0
0
0
0
1. This parameter is guaranteed by design but not tested.
Input Pulse Levels
Input Rise and Fall
VIL = 0, VIH = 3.0
V
ns
V
5
InputandOutputReferenceLevel
Output Timing Reference Level
1.5
1.5
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 W.
VZ is typically the midpoint of VOH and VOL.
IOL & IOHare adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS32K32-XHX
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
BOTTOM VIEW
12 11 10
9
8
7
6
5
4
3
2
1
A
B
C
16.25 (0.640)
MAX
D
E
13.97 (0.550)
BSC
1.27
(0.050)
BSC
F
G
H
J
K
L
M
0.61 (0.024)
BSC
13.97 (0.550)
BSC
2.21 (0.087)
MAX
18.25 (0.719)
MAX
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
M =MILITARY SCREENED
-55°C TO +125°C
-40°C TO 85°C
I
=INDUSTRIAL
C =COMMERCIAL
0°C TO +70°C
B = 143 PBGA, 16mm x 18mm, 288mm2
User configurable as 1Mx16 or 2Mx8
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
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