首页 |元器件品牌

WS512K32NV-70HQ [MICROSEMI]

Standard SRAM, 512KX32, 70ns, CMOS, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66;
WS512K32NV-70HQ
型号： WS512K32NV-70HQ
厂家： Microsemi    Microsemi
描述：

Standard SRAM, 512KX32, 70ns, CMOS, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66

静态存储器 内存集成电路
文件： 总8页 (文件大小：212K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
WS512K32V-XXX  
HI-RELIABILITY PRODUCT  
512Kx32 SRAM 3.3V MODULE ADVANCED*  
FEATURES  
■ Access Times of 70, 85, 100, 120ns  
■ Low Voltage  
■ Packaging  
• 3.3V ±10% Power Supply  
■ Low Power CMOS  
• 66-pin, PGA Type, 1.185 inch square, Hermetic  
Ceramic HIP (Package 401)  
■ Built-in Decoupling Caps and Multiple Ground Pins for Low  
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880 inch) square  
4.57mm (0.180 inch) high (Package 509). Designed to fit  
JEDEC 68 lead 0.990" CQFJ footprint.  
Noise Operation  
■ Weight  
WS512K32V-XG2TX - 8 grams typical  
WS512K32V-XHX - 13 grams typical  
■ Organized as 512Kx32, User Configurable as 1024Kx16 or  
2Mx8  
*
This data sheet describes a product that may or may not be under development  
and is subject to change or cancellation without notice.  
■ Commercial, Industrial and Military Temperature Ranges  
■ TTL Compatible Inputs and Outputs  
FIG. 1 PIN CONFIGURATION FOR WS512K32V-XHX  
PIN DESCRIPTION  
TOP VIEW  
1
12  
23  
34  
45  
56  
I/O0-31 Data Inputs/Outputs  
A0-18  
WE1-4  
CS1-4  
OE  
VCC  
GND  
NC  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
Ground  
I/O  
I/O  
8
9
WE  
2
I/O15  
I/O14  
I/O13  
I/O12  
OE  
I/O24  
I/O25  
I/O26  
V
CC  
I/O31  
I/O30  
I/O29  
I/O28  
CS2  
CS  
4
I/O10  
GND  
I/O11  
WE  
4
A
A
A
A
A
13  
14  
15  
16  
17  
A
6
7
I/O27  
Not Connected  
A10  
A11  
A12  
VCC  
A
A
3
4
5
3
3
A0  
A1  
A2  
A18  
NC  
A
WE1  
A
8
9
A
BLOCK DIAGRAM  
I/O  
I/O  
I/O  
I/O  
7
A
WE  
CS  
I/O23  
I/O22  
I/O21  
I/O20  
WE3 CS3  
WE4 CS4  
WE1 CS1  
WE2 CS2  
OE  
A0-18  
I/O  
I/O  
I/O  
0
1
2
CS  
NC  
I/O  
1
6
I/O16  
I/O17  
I/O18  
512K x 8  
512K x 8  
5
4
GND  
I/O19  
512K x 8  
512K x 8  
3
8
8
8
8
11  
22  
33  
44  
55  
66  
I/O16-23  
I/O24-31  
I/O0-7  
I/O8-15  
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
February 2000 Rev. 2  
WS512K32V-XXX  
FIG. 2 PIN CONFIGURATION FOR WS512K32V-XG2TX  
PIN DESCRIPTION  
TOP VIEW  
I/O0-31 Data Inputs/Outputs  
A0-18  
WE1-4  
CS1-4  
OE  
VCC  
GND  
NC  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
Ground  
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61  
60  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
0
1
2
3
4
5
6
7
I/O16  
I/O17  
I/O18  
I/O19  
I/O20  
I/O21  
I/O22  
I/O23  
GND  
I/O24  
I/O25  
I/O26  
I/O27  
I/O28  
I/O29  
I/O30  
I/O31  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
Not Connected  
0.940"  
The WEDC 68 lead G2T CQFP  
fills the same fit and function as  
the JEDEC 68 lead CQFJ or 68  
PLCC. But the G2T has the TCE  
and lead inspection advantage of  
the CQFP form.  
GND  
I/O  
I/O  
8
9
I/O10  
I/O11  
I/O12  
I/O13  
I/O14  
I/O15  
BLOCK DIAGRAM  
WE3 CS3  
WE4 CS4  
WE1 CS1  
WE2 CS2  
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43  
OE  
A0-18  
512K x 8  
512K x 8  
512K x 8  
512K x 8  
8
8
8
8
I/O16-23  
I/O24-31  
I/O0-7  
I/O8-15  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
2
WS512K32V-XXX  
TRUTH TABLE  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Symbol  
TA  
Min  
-55  
-65  
-0.5  
Max  
+125  
+150  
Vcc+0.5  
150  
Unit  
°C  
°C  
V
CS  
H
L
L
L
OE  
X
L
H
X
WE  
X
H
H
L
Mode  
Standby  
Read  
Out Disable  
Write  
Data I/O  
High Z  
Data Out  
High Z  
Power  
Standby  
Active  
Active  
Active  
Operating Temperature  
Storage Temperature  
Signal Voltage Relative to GND  
Junction Temperature  
Supply Voltage  
TSTG  
VG  
Data In  
TJ  
°C  
V
VCC  
-0.5  
4.0  
CAPACITANCE  
(TA = +25°C)  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Symbol  
Conditions  
Max Unit  
Parameter  
Symbol  
VCC  
Min  
3.0  
Max  
3.6  
Unit  
V
OE Capacitance  
COE  
V
V
IN = 0 V, f = 1.0 MHz  
IN = 0 V, f = 1.0 MHz  
50  
pF  
pF  
Supply Voltage  
WE Capacitance  
HIP (PGA)  
CWE  
20  
15  
Input High Voltage  
Input Low Voltage  
Operating Temp (Mil)  
VIH  
2.2  
VCC + 0.3  
+0.8  
V
CQFP G2T  
VIL  
-0.5  
-55  
V
CS Capacitance  
CCS  
CI/O  
CAD  
V
IN = 0 V, f = 1.0 MHz  
I/O = 0 V, f = 1.0 MHz  
VIN = 0 V, f = 1.0 MHz  
20  
20  
50  
pF  
pF  
pF  
TA  
+125  
°C  
Data I/O Capacitance  
V
Address Input Capacitance  
This parameter is guaranteed by design but not tested.  
DC CHARACTERISTICS  
(VCC = 3.3V, VSS = 0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
Conditions  
Units  
Min  
Max  
Input Leakage Current  
Output Leakage Current  
ILI  
ILO  
VCC = 3.6, VIN = GND to VCC  
10  
µA  
µA  
mA  
mA  
V
CS = VIH, OE = VIH, VOUT = GND to VCC  
CS = VIL, OE = VIH, f = 5MHz, Vcc = 3.6  
CS = VIH, OE = VIH, f = 5MHz, Vcc = 3.6  
IOL = 2.1mA, VCC = 3.0  
10  
100  
2.0  
0.4  
Operating Supply Current x 32 Mode  
Standby Current  
ICC x 32  
ISB  
Output Low Voltage  
VOL  
Output High Voltage  
VOH  
IOH = -1.0mA, VCC = 3.0  
2.4  
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V  
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K32V-XXX  
AC CHARACTERISTICS  
(VCC = 3.3V, VSS =0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
-70  
-85  
-100  
-120  
Units  
Read Cycle  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Read Cycle Time  
tRC  
tAA  
70  
85  
100  
120  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
70  
85  
100  
120  
Output Hold from Address Change  
Chip Select Access Time  
tOH  
5
5
5
5
tACS  
tOE  
70  
35  
85  
40  
100  
50  
120  
60  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
tCLZ1  
tOLZ1  
tCHZ1  
tOHZ1  
10  
5
10  
5
10  
5
10  
5
25  
25  
25  
25  
35  
35  
35  
35  
1. This parameter is guaranteed by design but not tested.  
AC CHARACTERISTICS  
(VCC = 3.3V, VSS =0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
-70  
-85  
-100  
-120  
Units  
Write Cycle  
Min  
70  
60  
60  
30  
50  
0
Max  
Min  
85  
75  
75  
30  
50  
0
Max  
Min  
100  
80  
80  
40  
60  
0
Max  
Min  
120  
100  
100  
40  
60  
0
Max  
Write Cycle Time  
tWC  
tCW  
tAW  
tDW  
tWP  
tAS  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Select to End of Write  
Address Valid to End of Write  
Data Valid to End of Write  
Write Pulse Width  
Address Setup Time  
Address Hold Time  
tAH  
5
5
5
5
Output Active from End of Write  
Write Enable to Output in High Z  
Data Hold from Write Time  
tOW1  
tWHZ1  
tDH  
5
5
5
5
25  
25  
35  
35  
0
0
0
0
1. This parameter is guaranteed by design but not tested.  
FIG. 3  
AC TEST CONDITIONS  
AC TEST CIRCUIT  
IOL  
Parameter  
Typ  
Unit  
V
Current Source  
Input Pulse Levels  
VIL = 0, VIH = 2.5  
Input Rise and Fall  
5
ns  
V
Input and Output Reference Level  
Output Timing Reference Level  
1.5  
1.5  
V
VZ  
≈ 1.5V  
D.U.T.  
(Bipolar Supply)  
Ceff = 50 pf  
NOTES:  
VZ is programmable from -2V to +7V.  
IOL & IOH programmable from 0 to 16mA.  
Tester Impedance Z0 = 75 Ω.  
VZ is typically the midpoint of VOH and VOL.  
IOL & IOH are adjusted to simulate a typical resistive load circuit.  
ATE tester includes jig capacitance.  
IOH  
Current Source  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
4
WS512K32V-XXX  
FIG. 4  
tRC  
TIMING WAVEFORM - READ CYCLE  
ADDRESS  
CS  
tAA  
tRC  
tCHZ  
tACS  
tCLZ  
ADDRESS  
tAA  
OE  
tOE  
tOLZ  
tOH  
tOHZ  
DATA I/O  
DATA I/O  
PREVIOUS DATA VALID  
DATA VALID  
DATA VALID  
HIGH IMPEDANCE  
READ CYCLE 1 (CS = OE = V , WE = V  
)
READ CYCLE 2 (WE = V )  
IH  
IL IH  
FIG. 5  
WRITE CYCLE - WE CONTROLLED  
tWC  
ADDRESS  
tAW  
tAH  
tCW  
CS  
WE  
tAS  
tWP  
tOW  
tDH  
tWHZ  
tDW  
DATA I/O  
DATA VALID  
WRITE CYCLE 1, WE CONTROLLED  
FIG. 6  
WRITE CYCLE - CS CONTROLLED  
tWC  
ADDRESS  
WS32K32-XHX  
tAW  
tAH  
tAS  
tCW  
CS  
tWP  
WE  
tDW  
tDH  
DATA I/O  
DATA VALID  
WRITE CYCLE 2, CS CONTROLLED  
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K32V-XXX  
PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)  
30.1 (1.185) ± 0.38 (0.015) SQ  
PIN 1 IDENTIFIER  
SQUARE PAD  
ON BOTTOM  
25.4 (1.0) TYP  
6.22 (0.245)  
MAX  
3.81 (0.150)  
± 0.1 (0.005)  
1.27 (0.050) ± 0.1 (0.005)  
0.76 (0.030) ± 0.1 (0.005)  
2.54 (0.100)  
TYP  
1.27 (0.050) TYP DIA  
15.24 (0.600) TYP  
25.4 (1.0) TYP  
0.46 (0.018) ± 0.05 (0.002) DIA  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
6
WS512K32V-XXX  
PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)  
25.15 (0.990) ± 0.26 (0.010) SQ  
4.57 (0.180) MAX  
22.36 (0.880) ± 0.26 (0.010) SQ  
0.27 (0.011) ± 0.04 (0.002)  
Pin 1  
0.25 (0.010) REF  
R 0.25  
(0.010)  
24.03 (0.946)  
± 0.26 (0.010)  
0.19 (0.007)  
± 0.06 (0.002)  
1° / 7°  
1.0 (0.040)  
± 0.127 (0.005)  
23.87  
(0.940) REF  
DETAIL A  
1.27 (0.050) TYP  
SEE DETAIL "A"  
0.38 (0.015) ± 0.05 (0.002)  
20.3 (0.800) REF  
The WEDC 68 lead G2T CQFP  
fills the same fit and function as  
the JEDEC 68 lead CQFJ or 68  
PLCC. But the G2T has the TCE  
and lead inspection advantage of  
the CQFP form.  
0.940"  
TYP  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K32V-XXX  
ORDERING INFORMATION  
W S 512K 32 X V - XXX X X X  
LEAD FINISH:  
Blank = Gold plated leads  
A = Solder dip leads  
DEVICE GRADE:  
Q = MIL-STD-883 Compliant  
M = Military Screened  
= Industrial  
-55°C to +125°C  
I
-40°C to 85°C  
0°C to +70°C  
C = Commercial  
PACKAGE TYPE:  
H = Ceramic Hex-In-line Package, HIP (Package 401)  
G2T = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 509)  
ACCESS TIME (ns)  
Low Voltage Supply 3.3V ± 10%  
IMPROVEMENT MARK:  
N = No Connect at pin 21 and 39 in HIP for Upgrades  
ORGANIZATION, 512Kx32  
User configurable as 1Mx16 or 2Mx8  
SRAM  
WHITE ELECTRONIC DESIGNS CORP.  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
8

相关型号：

WS512K32NV-70HQA

 Standard SRAM, 512KX32, 70ns, CMOS, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66
WEDC

WS512K32NV-85G2TC

 SRAM Module, 512KX32, 85ns, CMOS, CQMA68, HERMETIC SEALED, CERAMIC, QFP-68
WEDC

WS512K32NV-85G2TCA

 SRAM Module, 512KX32, 85ns, CMOS, CQFP68, QFP-68
MICROSEMI

WS512K32NV-85G2TIA

 SRAM Module, 512KX32, 85ns, CMOS, CQFP68, QFP-68
MICROSEMI

WS512K32NV-85G2TM

 SRAM Module, 512KX32, 85ns, CMOS, CQMA68, HERMETIC SEALED, CERAMIC, QFP-68
WEDC

WS512K32NV-85G2TMA

 SRAM Module, 512KX32, 85ns, CMOS, CQMA68, HERMETIC SEALED, CERAMIC, QFP-68
WEDC

WS512K32NV-85G2TQ

 SRAM Module, 512KX32, 85ns, CMOS, CQMA68, HERMETIC SEALED, CERAMIC, QFP-68
WEDC

WS512K32NV-85G2TQA

 SRAM Module, 512KX32, 85ns, CMOS, CQMA68, HERMETIC SEALED, CERAMIC, QFP-68
WEDC

WS512K32NV-85HC

 SRAM Module, 512KX32, 85ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66
MICROSEMI

WS512K32NV-85HCA

 SRAM Module, 512KX32, 85ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66
MICROSEMI

WS512K32NV-85HI

 SRAM Module, 512KX32, 85ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66
MICROSEMI

WS512K32NV-85HMA

 SRAM Module, 512KX32, 85ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66
MICROSEMI
©2020 ICPDF网 联系我们和版权申明