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WS512K8L-20Q [MICROSEMI]

SRAM;
WS512K8L-20Q
型号： WS512K8L-20Q
厂家： Microsemi    Microsemi
描述：

SRAM

静态存储器
文件： 总6页 (文件大小：222K)
中文：  中文翻译
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WS512K8-XCX  
White Electronic Designs  
512Kx8 SRAM MODULE, SMD 5962-92078  
FEATURES  
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Access Times 20, 25, 35, 45ns  
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„
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Organized as 512K x 8  
5V Power Supply  
Standard Microcircuit Drawing, 5962-92078  
MIL-STD-883 Compliant Devices Available  
Low Power CMOS  
JEDEC Standard 32 pin, Hermetic Ceramic DIP  
(Package 300)  
TTL Compatible Inputs and Outputs  
Battery Back-Up Operation  
„
Commercial, Industrial and Military Temperature  
Range (-55°C to +125°C)  
FIGURE 1 – PIN CONFIGURATION  
TOP VIEW  
PIN DESCRIPTION  
A0-18 Address Inputs  
I/O 0-7 Data Input/Output  
CS#  
OE#  
Chip Select  
Output Enable  
A18  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
1
2
3
4
5
6
7
8
9
32 VCC  
31 A15  
30 A17  
29 WE#  
28 A13  
27 A8  
WE# Write Enable  
VCC +5.0V Power  
GND Ground  
26 A9  
25 A11  
24 OE#  
23 A10  
22 CS#  
21 I/O7  
20 I/O6  
19 I/O5  
18 I/O4  
17 I/O3  
BLOCK DIAGRAM  
A0-16  
I/O0-7  
WE#  
OE#  
A2 10  
A1 11  
A0 12  
I/O0 13  
I/O1 14  
I/O2 15  
GND 16  
128K x 8  
128K x 8  
128K x 8  
128K x 8  
A17  
A18  
Decoder  
CS#  
December 2004  
Rev. 5  
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K8-XCX  
White Electronic Designs  
ABSOLUTE MAXIMUM RATINGS  
TRUTH TABLE  
Parameter  
Symbol  
TA  
Min  
-55  
-65  
-0.5  
Max  
+125  
+150  
VCC+0.5  
150  
Unit  
°C  
°C  
V
CS#  
H
OE#  
X
WE#  
X
Mode  
Standby  
Read  
Data I/O  
High Z  
Power  
Standby  
Active  
Operating Temperature  
Storage Temperature  
Signal Voltage Relative to GND  
Junction Temperature  
Supply Voltage  
TSTG  
VG  
L
L
H
Data Out  
Data In  
High Z  
L
X
L
Write  
Active  
TJ  
°C  
V
L
H
H
Out Disable  
Active  
VCC  
-0.5  
7.0  
CAPACITANCE  
RECOMMENDED OPERATING CONDITIONS  
(TA = +25°C)  
Parameter  
Symbol  
VCC  
VIH  
Min  
4.5  
Max  
5.5  
Unit  
V
Parameter  
Symbol  
CIN  
COUT  
Condition  
Max  
Unit  
pF  
Supply Voltage  
Input capacitance  
Output capicitance  
VIN = 0V, f = 1.0MHZ  
VOUT = 0V, f = 1.0MHZ  
45  
45  
Input High Voltage  
Input Low Voltage  
Operating Temp. (Mil.)  
2.2  
VCC + 0.3  
+0.8  
V
pF  
This parameter is guaranteed by design but not tested.  
VIL  
-0.5  
-55  
V
TA  
+125  
°C  
DC CHARACTERISTICS  
(VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ 125°C)  
-20  
-25  
-35  
-45  
Parameter  
Symbol Conditions  
Units  
Min Max Min Max Min Max Min Max  
Input Leakage Current  
Output Leakage Current  
Operating Supply Current  
Standby Current  
ILI  
ILO  
VCC = 5.5, VIN = GND to VCC  
10  
10  
10  
10  
10  
10  
10  
10  
μA  
μA  
mA  
mA  
V
CS# = VIH, OE# = VIH, VOUT = GND to VCC  
CS# = VIL, OE# = VIH, f = 5MHZ, VCC = 5.5  
CS# = VIH, OE# = VIH, f = 5MHZ  
IOL = 8mA, VCC = 4.5  
ICC  
ISB  
210  
80  
210  
60  
210  
60  
210  
55  
Output Low Voltage  
Output High Voltage  
VOL  
VOH  
0.4  
0.4  
0.4  
0.4  
IOH = -4.0mA, VCC = 4.5  
2.4  
2.4  
2.4  
2.4  
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V  
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION  
(-55°C ≤ TA ≤ 125°C)  
-20  
Min Typ Max Min Typ Max Min Typ Max Min Typ Max  
2.0 5.5 2.0 5.5 2.0 5.5 2.0 5.5  
8.0 12.8 8.0 12.8 8.0 12.8  
-25  
-35  
-45  
Parameter  
Symbol Conditions  
Units  
Data Retention Supply Voltage  
Data Retention Current  
VDR  
CS# • VCC -0.2V  
VCC = 3V  
V
ICCDR  
1
8.0 12.8 mA  
FIGURE 2 – AC TEST CIRCUIT  
AC TEST CONDITIONS  
Parameter  
Typ  
Unit  
IOL  
Input Pulse Levels  
V
IL = 0, VIH = 3.0  
V
ns  
V
Current Source  
Input Rise and Fall  
5
Input and Output Reference Level  
Output Timing Reference Level  
1.5  
1.5  
V
D.U.T.  
VZ 1.5V  
(Bipolar Supply)  
NOTES:  
CEFF = 50 pf  
V
I
Z is programmable from -2V to +7V.  
OL & IOH programmable from 0 to 16mA.  
Tester Impedance Z0 = 75 Ω  
Z is typically the midpoint of VOH and VOL  
OL & IOH are adjusted to simulate a typical resistive load circuit.  
ATE tester includes jig capacitance.  
V
I
.
IOH  
Current Source  
December 2004  
Rev. 5  
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K8-XCX  
White Electronic Designs  
AC CHARACTERISTICS  
(VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ 125°C)  
-20  
-25  
-35  
-45  
Parameter  
Read Cycle  
Symbol  
Units  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Read Cycle Time  
tRC  
tAA  
20  
25  
35  
45  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
20  
25  
35  
45  
Output Hold from Address Change  
Chip Select Access Time  
tOH  
tACS  
tOE  
3
3
3
3
20  
10  
25  
10  
35  
25  
45  
35  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
1. This parameter is guaranteed by design but not tested.  
1
tCLZ  
3
0
3
0
3
0
3
0
1
tOLZ  
1
tCHZ  
15  
12  
17  
15  
20  
20  
30  
25  
1
tOHZ  
AC CHARACTERISTICS  
(VCC = 5.0V, GND =0V, -55°C ≤ TA ≤ 125°C)  
-20  
-25  
-35  
-45  
Parameter  
Write Cycle  
Symbol  
Units  
Min  
20  
16  
16  
15  
16  
2
Max  
Min  
25  
20  
20  
15  
20  
2
Max  
Min  
35  
25  
25  
20  
25  
2
Max  
Min  
45  
30  
30  
25  
30  
2
Max  
Write Cycle Time  
tWC  
tCW  
tAW  
tDW  
tWP  
tAS  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Select to End of Write  
Address Valid to End of Write  
Data Valid to End of Write  
Write Pulse Width  
Address Setup Time  
Address Hold Time  
tAH  
2
2
2
2
1
Output Active from End of Write  
Write Enable to Output in High Z  
Data Hold Time  
tOW  
4
5
5
5
1
tWHZ  
10  
0
15  
0
20  
0
25  
tDH  
1
1
1
1
1. This parameter is guaranteed by design but not tested.  
December 2004  
Rev. 5  
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K8-XCX  
White Electronic Designs  
FIGURE 3 – TIMING WAVEFORM - READ CYCLE  
tRC  
ADDRESS  
tAA  
CS#  
tRC  
tACS  
tCLZ  
tCHZ  
ADDRESS  
tAA  
OE#  
tOE  
tOLZ  
tOHZ  
DATA VALID  
tOH  
DATA I/O  
PREVIOUS DATA VALID  
DATA I/O  
DATA VALID  
)
HIGH IMPEDANCE  
READ CYCLE 2 (WE# = VIH  
)
READ CYCLE 1 (CS# = OE# = VIL, WE# = VIH  
FIGURE 4 – WRITE CYCLE - WE# CONTROLLED  
tWC  
ADDRESS  
tAW  
tAH  
tCW  
CS#  
tAS  
tWP  
WE#  
tOW  
tDH  
tDW  
DATA VALID  
tWHZ  
DATA I/O  
WRITE CYCLE 1, WE# CONTROLLED  
FIGURE 5 – WRITE CYCLE - CS# CONTROLLED  
tWC  
ADDRESS  
CS#  
tAW  
tAH  
tAS  
tCW  
tWP  
WE#  
tDW  
tDH  
DATA I/O  
DATA VALID  
WRITE CYCLE 2, CS# CONTROLLED  
December 2004  
Rev. 5  
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K8-XCX  
White Electronic Designs  
PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED  
42.4 (1.670) 0.4 (0.016)  
15.04 (0.592)  
0.25 (0.012)  
4.34 (0.171) 0.79 (0.031)  
3.2 (0.125) MIN  
PIN 1 IDENTIFIER  
0.25 (0.010)  
0.05 (0.002)  
0.84 (0.033)  
0.4 (0.014)  
15.25 (0.600)  
0.25 (0.010)  
2.5 (0.100)  
TYP  
1.27 (0.050)  
0.1 (0.005)  
0.46 (0.018)  
0.05 (0.002)  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
December 2004  
Rev. 5  
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WS512K8-XCX  
White Electronic Designs  
ORDERING INFORMATION  
W S 512K 8 X - XXX C X X  
LEAD FINISH:  
Blank = Gold plated leads  
A = Solder dip leads  
DEVICE GRADE:  
Q = MIL-STD-883 Compliant  
M = Military Screened  
I = Industrial  
-55°C to +125°C  
-40°C to +85°C  
0°C to +70°C  
C = Commercial  
PACKAGE:  
C = Ceramic 0.600" DIP (Package 300)  
ACCESS TIME (ns)  
OPTIONS  
Blank = Standard Power  
L = Low Power  
ORGANIZATION, 512K x 8  
SRAM  
WHITE EDC  
DEVICE TYPE  
512K x 8 SRAM  
512K x 8 SRAM  
512K x 8 SRAM  
512K x 8 SRAM  
SPEED  
PACKAGE  
32 pin DIP  
32 pin DIP  
32 pin DIP  
32 pin DIP  
SMD NO.  
45ns  
35ns  
25ns  
20ns  
5962-92078 06HTX  
5962-92078 07HTX  
5962-92078 08HTX  
5962-92078 09HTX  
December 2004  
Rev. 5  
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  

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