AS8S128K32PN-35/IT [MICROSS]
SRAM Module, 128KX32, 35ns, CMOS, PGA-66;型号: | AS8S128K32PN-35/IT |
厂家: | MICROSS COMPONENTS |
描述: | SRAM Module, 128KX32, 35ns, CMOS, PGA-66 静态存储器 内存集成电路 |
文件: | 总11页 (文件大小:259K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SRAM
AS8S128K32
Austin Semiconductor, Inc.
128K x 32 SRAM
PIN ASSIGNMENT
(Top View)
SRAM MEMORY ARRAY
68 Lead CQFP (Q)
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-95595: -Q
• SMD 5962-93187: -P or -PN
• MIL-STD-883
FEATURES
• Access times of 15, 17, 20, 25, 35, and 45 ns
• Built in decoupling caps for low noise operation
• Organized as 128K x32; User configured as
256Kx16 or 512K x8
• Operation with single 5 volt supply
• Low power CMOS
• TTL Compatible Inputs and Outputs
• 2V Data Retention, Low power standby
66 Lead PGA- Pins 8, 21, 28, 39 are grounds (P)
OPTIONS
MARKINGS
•
Timing
15ns
-15
-17
-20
-25
-35
-45
17ns
20ns
25ns
35ns
45ns
•
Package
Ceramic Quad Flatpack
Pin Grid Array -8 Series
Pin Grid Array -8 Series
Q
P
PN
No. 702
No. 802
No. 802
66 Lead PGA- Pins 8, 21, 28, 39 are no connects (PN)
NOTE: PN indicates a no connect on pins 8, 21, 28, 39
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8S128K32 is a 4 Mega-
bit CMOS SRAM Module organized as 128Kx32-bits and user
configurable to 256Kx16 or 512Kx8. The AS8S128K32 achieves
high speed access, low power consumption and high reliability
by employing advanced CMOS memory technology.
The military temperature grade product is suited for mili-
tary applications.
CE4
The AS8S128K32 is offered in a ceramic quad flatpack mod-
ule per SMD-5962-95595 with a maximum height of 0.140 inches.
This module makes use of a low profile, mutlichip module de-
sign.
WE4
M3
CE3
WE3
M2
I/O 24 - I/O 31
This device is also offered in a 1.075 inch square ceramic
pin grid array per SMD 5692-93187, which has a maximum height
of 0.195 inches. This package is also a low profile, multi-chip
module design reducing height requirements to a minimum.
CE2
M1
WE2
I/O 16 - I/O 23
CE1
M0
WE1
I/O 8 - I/O 23
OE
A0 - 16
For more products and information
please visit our web site at
I/O 0 - I/O 7
www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
1
SRAM
AS8S128K32
Austin Semiconductor, Inc.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See the Application
Information section at the end of this datasheet for more infor-
mation.
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss.....................-1V to +7V
Storage Temperature..........................................-65°C to +150°C
Short Circuit Output Current(per I/O)...............................20mA
Voltage on Any Pin Relative to Vss..................-.5V to Vcc+1V
Maximum Junction Temperature**.................................+175°C
*Stresses greater than those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55°C<TA<125°C; Vcc = 5v ±10%)
µΑ
µΑ
µΑ
MAX
PARAMETER
CONDITIONS
CE\<VIL; VCC=MAX
SYM
-15
-17
-20
-25
-35
-45 UNITS NOTES
Power Supply Current:
Operating
3, 13 (1)
f = MAX = 1/tRC (MIN)
Outputs Open
700
650
600
560
520
500
150
60
mA
mA
mA
mA
I
cc
CE\>VIH; VCC=MAX
f = MAX = 1/tRC (MIN)
Outputs Open
280
100
40
220
80
200
80
180
60
160
60
(1)
ISBT1
ISBT2
ISBC1
CE\ = OE\ = VIH;
CMOS Compatible; VCC = MAX
f = 5 MHz
(1)
(2)
Power Supply Current:
Standby
CE\ > Vcc -0.2V; Vcc = MAX
VIL < Vss +0.2V;
40
40
40
40
40
VIH > VCC -0.2V; f = 0 Hz
CE\ > Vcc -0.2V; Vcc = MAX
VIL < Vss +0.2V;
24
24
24
24
24
24
mA
(2)
ISBC2
VIH > Vcc -0.2V; f = 0 Hz
"L" Version Only
NOTE: 1) Address switching sequence A, A+1, A+2, etc.
2) 1/2 input at HIGH, 1/2 input at LOW.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
2
SRAM
AS8S128K32
Austin Semiconductor, Inc.
CAPACITANCE TABLE (VIN = 0V, f = 1 MHz, TA = 25oC)
SYMBOL
CADD
PARAMETER
A0 - A18 Capacitance
MAX
UNITS
NOTES
40
pF
pF
pF
pF
4
COE
OE\ Capacitance
40
20
20
4
4
4
C
WE, CCE
WE\ and CE\ Capacitance
I/O 0- I/O 31 Capacitance
CIO
TRUTH TABLE
MODE
Read
Write
Standby
Not Selected
OE\
L
X
X
H
CE\
L
L
H
L
WE\
H
L
X
H
I/O
Q
D
POWER
ACTIVE
ACTIVE
STANDBY
ACTIVE
HIGH Z
HIGH Z
ACTEST CONDITIONS
TEST SPECIFICATIONS
Input pulse levels........................................VSS to 3V
Input rise and fall times..........................................5ns
Input timing reference levels.................................1.5V
Output reference levels........................................1.5V
Output load.............................................See Figures 1
I
OL
Current Source
Device
Under
Test
-
+
Vz = 1.5V
(Bipolar
Supply)
+
Ceff = 50pf
NOTES:
I
Current Source
OH
Vz is programable from -2V to + 7V.
IOL and IOH programmable from 0 to 16 mA.
Vz is typically the midpoint of VOH and VOL.
IOL and IOH are adjusted to simulate a typical resistive load
circuit.
Figure 1
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
3
SRAM
AS8S128K32
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55°C≤TA≤125°C; Vcc = 5v ±10%)
-15
-17
-20
-25
-35
-45
DESCRIPTION
READ CYCLE
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
tRC
READ cycle time
15
17
20
25
35
45
ns
ns
ns
ns
ns
ns
tAA
tACE
tOH
Address access time
15
15
17
17
20
20
25
25
35
35
45
45
Chip enable access time
Output hold from address change
Chip enable to output in Low-Z
Chip disable to output in High-Z
Chip enable to power-up time
Chip disable to power-down time
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
2
2
2
2
2
2
2
2
2
2
2
2
tLZCE
tHZCE
tPU
4, 6, 7
7
8
9
10
14
15
4, 6, 7
0
0
0
0
0
0
0
0
0
0
0
0
4
4
tPD
15
6
17
7
20
7
25
8
35
12
45
12
tAOE
tLZOE
tHZOE
ns
ns
ns
4, 6
6
7
7
9
12
12
4, 6, 7
tWC
tCW
tAW
tAS
WRITE cycle time
15
12
12
0
17
12
12
0
20
15
15
0
25
17
17
0
35
20
20
0
45
22
22
0
ns
ns
ns
ns
ns
Chip enable to end of write
Address valid to end of write
Address setup time
tAH
Address hold from end of write
1
1
1
1
1
1
1
1
tWP1
WRITE pulse width
12
12
15
17
20
20
ns
1
1
tWP2
WRITE pulse width
12
8
12
9
15
10
1
17
12
1
20
15
1
20
15
1
ns
ns
ns
ns
ns
tDS
Data setup time
tDH
Data hold time
1
1
tLZWE
tHZWE
Write disable to output in Low-z
Write enable to output in High-Z
2
2
2
2
2
2
4, 6, 7
4, 6, 7
7
9
10
11
14
15
NOTES:
t
1) For OE\ = HIGH condition. For OE\ = LOW condition WP1 = tWP2 = 15 ns MIN.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
4
SRAM
AS8S128K32
Austin Semiconductor, Inc.
NOTES
1. All voltages referenced to VSS (GND).
2. -3v for pulse width <20ns.
3. ICC is dependent on output loading and cycle rates.
The specified value applies with the outputs
7. At any given temperature and voltage condition,
tHZCE, is less than tLZCE, and tHZWE is less than tLZWE
8. WE is HIGH for READ cycle.
.
9. Device is continuously selected. Chip enables and output
enable are held in their active state.
10. Address valid prior to or coincident with latest occurring
chip enable.
11. tRC= READ cycle time.
12. Chip enable (CE) and write enable (WE) can initiate and
terminate a WRITE cycle.
1
open, and f=
HZ.
tRC(MIN)
4. This parameter is sampled.
5. Test conditions as specified with output loading as
shown in Fig. 1 unless otherwise noted.
6. tHZCE, tHZOE and tHZWE are specified with CL= 5pF
as in Fig. 2. Transition is measured +/- 200 mV
typical from steady state coltage, allowing for actual
tester RC time constant.
13. 32 bit operation
DATA RETENTION ELECTRICAL CHARACTERISTICS
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
VCC for Retention Data
VDR
2
--
V
CE\ > VCC - 0.2V
IN > VCC - 0.2V
VCC = 2.0V
VCC = 3V
ICCDR
ICCDR
--
--
6
mA
mA
Data Retention Current
V
11.6
Chip Deselect to Data
Retention Time
tCDR
tR
0
--
ns
ns
4
tRC
4, 11
Operation Recovery Time
LOWVCC DATA RETENTIONWAVEFORM
DATA RETENTION MODE
>2V
VDR
4.5V
4.5V
Vcc
tCDR
tR
VIH
CE\
VDR
V
IL
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
5
SRAM
AS8S128K32
Austin Semiconductor, Inc.
READ CYCLE NO. 1(8,9)
tRC
VALID
ADDRESS
DQ
tAA
tOH
PREVIOUS DATA VALID
DATA VALID
READ CYCLE NO. 2(7,8,10)
tRC
CE\
tAOE
tHZOE
tLZOE
OE\
DQ
Icc
tLZCE
tACE
tHZCE
DATA VALID
tPU
tPD
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
6
SRAM
AS8S128K32
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1
(Chip Enable Controlled)
tWC
ADDRESS
tAW
tAH
tAS
tCW
CE\
tWP1
WE\
tDS
tDH
DATA VAILD
D
Q
HIGH Z
WRITE CYCLE NO. 2
(Write Enable Controlled)
tWC
ADDRESS VALID
ADDRESS
tAW
tCW
tAH
CE\
WE\
D
tAS
tWP2
tDS
tDH
DATA VALID
tLZWE
tHZWE
Q
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
7
SRAM
AS8S128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #702 (Package Designator Q)
SMD 5962-95595, Case Outline M
D2
D1
DETAIL A
D
R
1o - 7o
B
b
L1
e
SEE DETAIL A
A
A2
E3
SMD SPECIFICATIONS
SYMBOL
MIN
MAX
0.200
0.186
0.015
A
A1
A2
B
b
D
0.123
0.118
0.005
0.010 REF
0.800 BSC
0.013
0.017
D1
D2
E
0.870
0.980
0.936
0.890
1.000
0.956
e
R
0.050 BSC
0.010 TYP
L1
0.035
0.045
*All measurements are in inches.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
8
SRAM
AS8S128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #904 (Package Designator P & PN)
SMD 5962-93187, Case Outline 4 and 5
4 x D
A
D1
D2
A1
Pin 56
Pin 1
(identified by
0.060 square pad)
φb1
E1
e
φb
Pin 66
e
φb2
Pin 11
L
SMD SPECIFICATIONS
SYMBOL
MIN
MAX
A
A1
φb
φb1
φb2
D
0.135
0.025
0.016
0.045
0.065
1.064
0.195
0.035
0.020
0.055
0.075
1.086
D1/E1
D2
e
1.000 BSC
0.600 BSC
0.100 BSC
L
0.145
0.155
*All measurements are in inches.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
9
SRAM
AS8S128K32
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: AS8S128K32Q-25/XT
Package
Type
Q
Speed
ns
-15
-17
-20
-25
-35
-45
Device Number
Process
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
/*
/*
/*
/*
/*
/*
Q
Q
Q
Q
Q
EXAMPLE: AS8S128K32PN-20/883C
Package
Type
P
Speed
Device Number
Process
ns
-15
-15
-17
-17
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
/*
/*
/*
/*
PN
P
PN
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
AS8S128K32
P
PN
P
PN
P
PN
P
PN
-20
-20
-25
-25
-35
-35
-45
-45
/*
/*
/*
/*
/*
/*
/*
/*
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
PACKAGE NOTES
P = Pins 8, 21, 28, and 39 are grounds.
PN = Pins 8, 21, 28, and 39 are no connects.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
10
SRAM
AS8S128K32
Austin Semiconductor, Inc.
ASI TO DSCC PART NUMBER
CROSS REFERENCE
ASI Package Designator Q
ASI Part #
SMD Part #
AS8S128K32Q-55/883C
AS8S128K32Q-55/883C
AS8S128K32Q-45/883C
AS8S128K32Q-45/883C
AS8S128K32Q-35/883C
AS8S128K32Q-35/883C
AS8S128K32Q-25/883C
AS8S128K32Q-25/883C
AS8S128K32Q-20/883C
AS8S128K32Q-20/883C
AS8S128K32Q-17/883C
AS8S128K32Q-17/883C
5962-9559505HMA
5962-9559505HMC
5962-9559506HMA
5962-9559506HMC
5962-9559507HMA
5962-9559507HMC
5962-9559508HMA
5962-9559508HMC
5962-9559509HMA
5962-9559509HMC
5962-9559510HMA
5962-9559510HMC
ASI Package Designator P & PN
ASI Part #
SMD Part #
ASI Part #
SMD Part #
AS8S128K32P-55/883C
AS8S128K32P-55/883C
AS8S128K32P-45/883C
AS8S128K32P-45/883C
AS8S128K32P-35/883C
AS8S128K32P-35/883C
AS8S128K32P-25/883C
AS8S128K32P-25/883C
AS8S128K32P-20/883C
AS8S128K32P-20/883C
AS8S128K32P-17/883C
AS8S128K32P-17/883C
5962-9318705H5A
5962-9318705H5C
5962-9318706H5A
5962-9318706H5C
5962-9318707H5A
5962-9318707H5C
5962-9318708H5A
5962-9318708H5C
5962-9318709H5A
5962-9318709H5C
5962-9318710H5A
5962-9318710H5C
AS8S128K32PN-55/883C
AS8S128K32PN-55/883C
AS8S128K32PN-45/883C
AS8S128K32PN-45/883C
AS8S128K32PN-35/883C
AS8S128K32PN-35/883C
AS8S128K32PN-25/883C
AS8S128K32PN-25/883C
AS8S128K32PN-20/883C
AS8S128K32PN-20/883C
AS8S128K32PN-17/883C
AS8S128K32PN-17/883C
5962-9318705H4A
5962-9318705H4C
5962-9318706H4A
5962-9318706H4C
5962-9318707H4A
5962-9318707H4C
5962-9318708H4A
5962-9318708H4C
5962-9318709H4A
5962-9318709H4C
5962-9318710H4A
5962-9318710H4C
Please note, -15 not currently available on the SMD's.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8S128K32
Rev. 3.5 7/00
11
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