DAT-15R5A-SP [MINI]
Digital Step Attenuator;型号: | DAT-15R5A-SP |
厂家: | MINI-CIRCUITS |
描述: | Digital Step Attenuator |
文件: | 总8页 (文件大小:540K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DSuirfgacietaMlouSnttep Attenuator
DAT-15R5A+ Series
50Ω 0 to 15.5 dB, 0.5 dB Step DC to 4.0 GHz
The Big Deal
• Wideband, operates up to 4 GHz
• Immune to latchup
CASE STYLE: DG983-2
• High IP3, 52 dBm
Product Overview
The DAT-15R5A+ series of 50Ω digital step attenuators provides adjustable attenuation from 0 to 15.5 dB
in 0.5 dB steps. The control is a 5-bit serial/parallel interface, and the attenuators operate with either single
positive or dual (positive and negative) supply voltage. DAT-15R5A+ series models are produced by a
unique CMOS process on silicon, offering the performance of GaAs with the advantages of conventional
CMOS devices.
Key Features
Feature
Advantages
Wideband operation, specified from DC
to 4.0 GHz
Can be used in multiple applications such as communications, satellite and defense,
reducing part count.
Serial or parallel interface
Good VSWR, 1.2:1 typ.
Models available with serial or parallel interface mode to suit customer demand.
Eases interfacing with adjacent components and results in low amplitude ripple.
Single positive supply models:
(Model suffixes: -SP+ and –PP+)
+2.3 to +3.6V
Use of single positive supply simplifies power supply design. An internal negative voltage
generator supplies the desired negative voltage. Single positive supply results in excellent
spurious performance, -140 dBm typical.
Dual supply models:
(Model suffixes: -SN+ and –PN+)
+2.7 to +3.6V (Positive) and
-3.6 to -3.2V (Negative)
Dual supply provides spurious-free operation. It also allows fast switching up to 1 MHz (vs.
25 kHz for single supply).
Wide range fo positive operating voltages allows the DAT-15R5A+ Series of models to be
used in a wide range of applications. See Application Note AN-70-006 for operation above
+3.6V
Useable over a wide range of supply
voltages, +2.3/2.7 to 5.2V
Footprint compatible to DAT-15R5-XX+
Series (XX=SN/SP/PN/PP)
Can fit into existing footprint and provide improved performance.
®
Mini-Circuits
www.minicircuits.com P.O. Box 350166, Brooklyn, NY 11235-0003 (718) 934-4500 sales@minicircuits.com
Page 1 of 8
Digital Step Attenuator
50Ω DC-4000 MHz
15.5 dB, 0.5 dB Step
5 Bit, Serial control interface, Single Supply Voltage
Product Features
• Immune to latch up
• Excellent accuracy, 0.1 dB Typ
• Serial control interface
• Low Insertion Loss
• High IP3, +52 dBm Typ
• Very low DC power consumption
• Excellent return loss, 20 dB Typ
• Small size 4.0 x 4.0 mm
DAT-15R5A-SP+
CASE STYLE: DG983-2
+RoHS Compliant
The +Suffix identifies RoHS Compliance. See our web site
for RoHS Compliance methodologies and qualifications
Typical Applications
• Base Station Infrastructure
• Portable Wireless
• CATV & DBS
• MMDS & Wireless LAN
• Wireless Local Loop
• UNII & Hiper LAN
• Power amplifier distortion canceling loops
General Description
The DAT-15R5A-SP+ is a 50Ω digital step attenuator that provides adjustable attenuation of 0 to 15.5 dB in
0.5 dB steps. The control is a 5-bit serial interface, operating with a single (positive) supply voltage. DAT-
15R5A-SP+ is produced by a unique CMOS process on silicon, offering the performance of GaAs with the
advantages of conventional CMOS devices.
Simplified Schematic
RF Input
RF Out
8dB
4dB
2dB
1dB
0.5dB
Digital Serial Control
REV. C
M164761
DAT-15R5A-SP+
RS/TH/CP
150707
®
Mini-Circuits
www.minicircuits.com P.O. Box 350166, Brooklyn, NY 11235-0003 (718) 934-4500 sales@minicircuits.com
Page 2 of 8
Digital Step Attenuator
RF Electrical Specifications(Note1), DC-4000 MHz, TAMB=25°C, VDD=+3V
DAT-15R5A-SP+
Freq. Range
Parameter
Min.
Typ.
Max.
Units
(GHz)
DC-1
1-2.4
2.4-4
DC-1
1-2.4
2.4-4
DC-1
1-2.4
2.4-4
DC-1
1-2.4
2.4-4
DC-1
1-2.4
2.4-4
DC-1
1-2.4
2.4-4
—
—
—
—
—
0.03
0.05
0.07
0.02
0.05
0.1
0.1
0.15
0.2
Accuracy @ 0.5 dB Attenuation Setting
dB
0.1
Accuracy @ 1 dB Attenuation Setting
Accuracy @ 2 dB Attenuation Setting
Accuracy @ 4 dB Attenuation Setting
Accuracy @ 8 dB Attenuation Setting
0.15
0.25
0.15
0.25
0.35
0.2
dB
dB
dB
dB
dB
—
—
0.05
0.15
0.15
0.07
0.15
0.23
0.03
0.15
0.6
—
—
0.25
0.5
—
—
0.2
0.5
0.8
—
—
—
1.3
1.9
Insertion Loss (note 2) @ all attenuator set to 0dB
Input IP3 (note 3) (at Min. and Max. Attenuation)
1.6
2.4
2.1
3.0
DC-4
DC-4
—
—
—
+52
+24
—
—
—
dBm
dBm
Input Power @ 0.2dB Compression (Note 3)
(at Min. and Max. Attenuation)
10 kHz to 50 MHz
See Fig. 1
Input Operating Power
VSWR
dBm
:1
>50 MHz
DC-1
—
—
—
—
+24
1.5
1.6
1.9
1.2
1.2
1.4
1-2.4
2.4-4
Notes:
1. Tested on Evaluation Board TB-334, See Figure 3.
2. Insertion loss values are de-embedded from test board Loss (test board’s Insertion Loss: 0.10dB @100MHz, 0.35dB @1000MHz, 0.60dB @2400MHz, 0.75dB @4000MHz).
3. Input IP3 and 1dB compression degrade below 1 MHz. Input power not to exceed max operating specification for continuous operation.
DC Electrical Specifications
Switching Specifications
Parameter
dd, Supply Voltage
dd Supply Current
Min.
Typ.
Max.
Units
Parameter
Min.
Typ.
Max.
Units
Sec
V
2.3
—
3
3.6(Note 4)
200
V
µA
V
Switching Speed, 50% Control to
0.5dB of Attenuation Value
—
—
1.0
—
—
µ
I
—
—
—
—
Switching Control Frequency
25
kHz
Control Input Low
Control Input High
Control Current
-0.3
1.17
—
+0.6
3.6
20(Note 5)
V
µA
4. For operation above +3.6V, see Application Note AN-70-006
5. Except, 30µA typ for C0.5 at +3.6V
Absolute Maximum Ratings(Note6,7)
Parameter
Ratings
Operating Temperature
Storage Temperature
Vdd
Voltage on any control input
Input Power
-40°C to 105°C
-65°C to 150°C
-0.3V Min., 5.5V Max.
-0.3V Min., 3.6V Max.
+30dBm
Thermal Resistance
37°C/W
6. Permanent damage may occur if any of these limits are exceeded.
7. Operation between max operating and absolute max input power will result in reduced reliability.
Figure 1. Max Input Operating Power vs Frequency
®
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Page 3 of 8
Digital Step Attenuator
DAT-15R5A-SP+
Pin Configuration (Top View)
Pin Description
Pin
Function
Description
Not connected (Notes 9)
Number
N/C
RF in
Data
Clock
LE
1
2
RF in port (Note 1)
3
Serial Interface data input (Note 3)
Serial Interface clock input
Latch Enable Input (Note 2)
Positive Supply Voltage
1
2
3
4
5
15
14
13
12
11
N/C
RFin
Data
Clock
C8
4
RFout
VDD
GND
GND
2x2mm
Paddle
ground
5
VDD
6
N/C
7
Not connected
LE
N/C
8
Not connected
VDD
9
Positive Supply Voltage
GND
GND
GND
VDD
10
11
12
13
14
15
16
17
18
19
20
Paddle
Ground connection
Ground connection
Ground connection (Note 7)
Positive Supply Voltage (Note 8)
RF out port (Note 1)
RF out
C8
Control for attenuation bit, 8 dB (Note 4)
Control for attenuation bit, 4 dB (Note 4)
Control for attenuation bit, 2 dB (Note 4)
Ground Connection
Device Marking
C4
C2
GND
C1
Pin 1
Index
Control for attenuation bit, 1 dB (Note 4)
Control for attenuation bit, 0.5 dB (Note 4,6)
Paddle ground (Note 5)
C0.5
GND
MCL
DS50
Notes:
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.
2. Latch Enable (LE) has an internal 2MΩ to internal positive supply voltage.
3. Place a 10KΩ resistor in series, as close to pin as possible to avoid freq. resonance.
4. Refer to Power-up Control Settings.
5. The exposed solder pad on the bottom of the package (See Pin configuration) must be
grounded for proper device operation.
6. This pin has an internal 200 kΩ resistor to ground.
7. Ground must be less than 80 mil (0.08”) from pin 12 proper device operation.
8. When VDD<=3.6V this pin may be connected directly to VDD, when 3.6V< VDD <=5.2V
need to use a voltage divider to reduce voltage on this pin to a voltage in the range +1.17
to 3.6V. See Application note AN-70-006.
9. Place a shunt 10kΩ resistor to ground.
®
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Page 4 of 8
Digital Step Attenuator
Simplified Schematic
DAT-15R5A-SP+
RF Input
RF Out
8dB
4dB
2dB
1dB
0.5dB
Digital Serial Control
The DAT-15R5A-SP+ serial interface consists of 5 control bits that select the desired attenuation state, as
shown in Table 1: Truth Table
Table 1. Truth Table
Attenuation
C8
C4
C2
C1
C0.5
State
Reference
0.5 (dB)
1 (dB)
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
1
2 (dB)
4 (dB)
8 (dB)
15.5 (dB)
Note: Not all 32 possible combinations of C0.5 - C8 are shown
in table
The serial interface is a 5-bit serial in, parallel-out shift register buffered by a transparent latch.
It is controlled by three CMOS-compatible signals: Data, Clock, and Latch Enable (LE).The Data and Clock
inputs allow data to be serially entered into the shift register, a process that is independent of the state of
the LE input.
The LE input controls the latch.When LE is HIGH, the latch is transparent and the contents of the serial shift
register control the attenuator. When LE is brought LOW, data in the shift register is latched.
The shift register should be loaded while LE is held LOW to prevent the attenuator value from changing as
data is entered. The LE input should then be toggled HIGH and brought LOW again, latching the new data.
The timing for this operation is defined by Figure 2 (Serial Interface Timing Diagram) and Table 2 (Serial
Interface AC Characteristics).
Figure 2: Serial interface Timing Diagram
Table 2. Serial Interface AC Characteristics
LE
Symbol
Parameter
Min.
Max.
Units
Serial data clock
frequency (Note 1)
10
MHz
ns
fclk
Clock
Data
Serial clock HIGH time
Serial clock LOW time
30
30
10
30
10
10
tclkH
ns
MSB
LSB
tclkL
LE set-up time after last
clock falling edge
ns
tLESUP
tLEPW
tSDSUP
tSDHLD
tLEPW
tLESUP
tSDSUP
tSDHLD
LE minimum pulse
width
ns
Serial data set-up time
before clock rising edge
ns
Serial data hold time
after clock falling edge
Note 1. fclk verified during the functional pattern test. Serial programming
sections of the functional pattern are clocked at 10MHz to verify fclk speci-
fication.
ns
®
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Page 5 of 8
Digital Step Attenuator
DAT-15R5A-SP+
The DAT-15R5A-SP+, uses a common 5-bit serial word format, as shown in Table 3: 5-Bit attenuator Serial
Programming Register Map.
The second bit B4 corresponds to the 8 dB Step and the last bit B0 corresponds to the 0.5 dB step.
Table 3. 5-Bit attenuator Serial Programming Register Map
B5
0
B4
C8
B3
C4
B2
C2
B1
C1
B0
C0.5
MSB
LSB
(first in)
(last in)
Note: The stop bit (B5) must always be low to prevent the attenuator from entering an unknown state.
Power-up Control Settings
The DAT-15R5A-SP+ always assumes a specifiable attenuation setting on power-up, allowing a known
attenuation state to be established before an initial serial control word is provided.
When the attenuator powers up, the five control bits are set to whatever data is present on the five data
inputs (C0.5 to C8).
This allows any one of the 32 attenuation settings to be specified as the power-up state.
®
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Page 6 of 8
Digital Step Attenuator
DAT-15R5A-SP+
TB-334
Bill of Materials
N8, N11, N13, N14, N16-N21 Resistor 0603 10 KOhm +/- 1%
N5, N9, N10 & N12
NPO Capacitor 0603 100pF +/- 5%
Tantalum Capacitor 0805 100nF +/- 10%
Hex Invert Schmitt Trigger MSL1
N6
N7
Notes
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.
2. Test Board TB-334 is designed for operation for VDD=2.3 to 3.6V. For operation over 3.6V to 5.2V, See Application Note AN-70-006
3. VDD=Vdd
Fig 3. Evaluation Board Schematic,TB-334, used for characterization (DUT not soldered on TB-334)
Test Equipment
Measurement Conditions
For Insertion Loss, Isolation and Return Loss:
Agilent’s E5071C Network Analyzer & E3631A Power Supply.
For Compression:
For Insertion Loss, Isolation and Return Loss:
VDD=+2.3/+3/+5.5V &Pin=0dBm
Agilent’s N9020A Signal Analyzer, E8247C RF Generator,
E3631A Power Supply & U2004A Power Sensor.
For Input IP3:
For Compression: Pin=0/+24dBm. VDD=+3V
For Input IP3: Pin=+10dBm/tone.
Agilent’s N9020A Signal Analyzer, N5181A
Signal Generators, E3631A Power Supply, U2004A Power Sensor.
For Spurs:
Tone spacing: 0.1 MHz to 1 MHz RF Freq and 1 MHz to 4200 MHz RF Freq,
VDD=+3V
Agilent N5181A Signal Generator, E4440A Spectrum Analyzer.
For Spurs: RF IN at 1000MHz and -20dBm. VDD=+3V
For Switching Time:
Agilent’s N5181A Signal Generator, 81110A Pulse Generator,
54832B Oscilloscope, E3631A Power Supply.
For Max Control Frequency:
For Switching Time:
RF Freq=501MHz/0dBm, Pulse for LE=1Hz/0/+3.4V, Delay=500ms,
Width=500ms. VDD=+3V
Agilent’s N5181A Signal Generator, N9020A Signal Analyzer,
E3631A Power Supply, 81110A Pulse Generator.
For Max Control Frequency:
RF Freq=501MHz, 0dBm. VDD=+3V
®
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Page 7 of 8
Digital Step Attenuator
DAT-15R5A-SP+
Additional Detailed Technical Information
additional information is available on our dash board. To access this information click here
Data Table
Performance Data
Case Style
Swept Graphs
S-Parameter (S2P Files) Data Set (.zip file)
DG983-2 Plastic package, exposed paddle, lead finish: NiPdAu
Tape & Reel
F87
Standard quantities available on reel
7” reels with 20, 50, 100 or 200 devices
13” reels with 3K devices
Suggested Layout for PCB Design
Evaluation Board
PL-199
TB-334
Environmental Ratings
ENV33T1
ESD Rating
Human Body Model (HBM): Class 1C (1000 to <2000V) in accordance with MIL-STD-883 method 3015
MSL Rating
Moisture Sensitivity: MSL1 in accordance with IPC/JEDEC J-STD-020D
MSL Test Flow Chart
Start
Visual
Inspection
Electrical Test
SAM Analysis
Soak
85°C/85RH
168 hours
Reflow 3 cycles,
260°C
Bake at 125°C,
24 hours
Finish
Visual
Inspection
Electrical Test
SAM Analysis
Additional Notes
A. Performance and quality attributes and conditions not expressly stated in this specification document are intended
to be excluded and do not form a part of this specification document.
B. Electrical specifications and performance data contained in this specification document are based on Mini-Circuit’s
applicable established test performance criteria and measurement instructions.
C. The parts covered by this specification document are subject to Mini-Circuits standard limited warranty and terms
and conditions (collectively, “Standard Terms”); Purchasers of this part are entitled to the rights and benefits
contained therein. For a full statement of the Standard Terms and the exclusive rights and remedies thereunder,
please visit Mini-Circuits’ website at www.minicircuits.com/MCLStore/terms.jsp
®
Mini-Circuits
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Page 8 of 8
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