M37905F8CSP中文资料_数据手册_规格书

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

DESCRIPTION

These are single-chip 16-bit microcomputers designed with high-per-

formance CMOS silicon gate technology, including the internal flash

memory and, being packaged in 64-pin plastic molded QFP or shrink

plastic molded DIP. These microcomputers support the 7900 Series

instruction set, which are enhanced and expanded instruction set

and are upper-compatible with the 7700/7751 Series instruction set.

The CPU of these microcomputers is a 16-bit parallel processor that

can also be switched to perform 8-bit parallel processing. Also, the

bus interface unit of these microcomputers enhances the memory

access efficiency to execute instructions fast. Therefore, these mi-

crocomputers are suitable for office, business, and industrial equip-

ment controller that require high-speed processing of large data.

Also, they are suitable for motor-control equipment since each of

them includes the motor control circuit.

Power supply voltage .................................................. 5 V ± 0.5 V

•

Programming/Erase voltage ........................................ 5 V ± 0.5 V

•

Programming method .................... Programming in a unit of word

•

Erase method ............................................Block erase or Total erase

M37905F8CFP, M37905F8CSP

............... 4 blocks (8 Kbytes ✕ 2, 16 Kbytes ✕ 1, 28 Kbytes ✕ 1)

Programming/Erase control by software command

•

Maximum number of reprograms ............................................ 100

APPLICATION

Control devices for office equipment such as copiers and facsimiles

•

Control devices for industrial equipment such as communication

and measuring instruments

For the internal flash memory, single-power-supply programming

and erasure, using a PROM programmer or the control by the cen-

tral processing unit (CPU), is supported. Also, each of these micro-

computers has the memory area dedicated for storing a certain

software which controls programming and erasure (reprogramming

control software). Therefore, on these microcomputers, the program

can easily be changed even after they are mounted on the board.

Control devices for equipment, requiring motor control, such as

•

inverter air conditioners and general-purpose inverters

DISTINCTIVE FEATURES

Number of basic machine instructions .................................... 203

•

Memory

Flash memory (User ROM area) ................................... 60 Kbytes

RAM .............................................................................3072 bytes

Flash memory (Boot ROM area) ..................................... 8 Kbytes

Instruction execution time

•

The fastest instruction at 20 MHz frequency ........................ 50 ns

Single power supply .................................................... 5 V ± 0.5 V

•

Interrupts ........... 8 external sources, 23 internal sources, 7 levels

•

Multi-functional 16-bit timer ................................................. 10 + 3

•

(Three-phase motor drive waveform or Pulse motor drive waveform

output is available.)

Serial I/O (UART or Clock synchronous)..................................... 3

•

10-bit A-D converter .......................................... 12-channel inputs

•

8-bit D-A converter ............................................2-channel outputs

•

12-bit watchdog timer

•

Programmable input/output (ports P1, P2, P4, P5, P6, P7, P8)......50

•

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

M37905F8CFP PIN CONFIGURATION (TOP VIEW)

P1

/CTS

2

/R

/CLK

/RTS

X

D

0

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

P4

2

3

4

5

6

7

/TA6OUT/RTP2

/TA6IN/RTP2

/TA7OUT/RTP3

/TA7IN/RTP3

/TA8OUT/RTP3

/TA8IN/RTP3

2

0

2

P1

1

0

3

P10

0

V

CC

AVCC

REF

AVSS

1

V

3

P4OUTCUT/INT

0

P51

P52

P53

/INT

1

2

3

V

X

SS

2

M37905F8CFP

P8

/AN

/CTS

P7

3

/AN11/T

/AN10/R

/CTS

/RTS

D

/RTPTRG1

/RTPTRG0

2

X

D

2

1

0

6

5

4

P8

1

9

2

/CLK

V

X

SS

P80/AN

8

2

2/DA

7/DA

6/AN

5/AN

4/AN

CONT

OUT

IN

7

/AN

P7

RESET

MD0

Note: Allocation of pins TB0IN to TB2IN

Outline 64P6N-A

can be switched by software.

2

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

M37905F8CSP PIN CONFIGURATION (TOP VIEW)

P8

/AN

P80/AN8/CTS

P77/AN7

3

/AN¹¹/TxD

2

1

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

VSS

AVSS

VREF

AVCC

2

2/AN¹⁰/RxD

P81

9/CTS

2

/CLK

2

DA1

DA0

3

4

2

/RTS2/

5

/

VCC

6

P76/AN6

P75/AN5

P74/AN4

P73/AN3

P72/AN2

P71/AN1

P10/CTS0/RTS0

P11/CTS0/CLK0

P12/RxD0

P13/TxD0

P14/CTS1/RTS1

P15/CTS1/CLK1

P16/RxD1

P17/TxD1

P20/TA4OUT

P21/TA4IN

P22/TA9OUT

P23/TA9IN

P24(/TB0IN)

P25(/TB1IN)

P26(/TB2IN)

P27

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

P70/AN0

P67/TA3IN/RTP13

P66/TA3OUT/RTP12

P65/TA2IN/U/RTP11

P64/TA2OUT/V/RTP10

P63/TA1IN/W/RTP03

P62/TA1OUT/U/RTP02

P61/TA0IN/V/RTP01

P60/TA0OUT/W/RTP00

P57/INT7/TB2IN/IDU

P56/INT6/TB1IN/IDV

P55/INT5/TB0IN/IDW

P6OUTCUT/INT4

MD0

Note

MD1

P40/TA5OUT/RTP20

P41/TA5IN/RTP21

P42/TA6OUT/RTP22

P43/TA6IN/RTP23

P44/TA7OUT/RTP30

P45/TA7IN/RTP31

P46/TA8OUT/RTP32

P47/TA8IN/RTP33

P4OUTCUT/INT0

P51/INT1

RESET

XIN

XOUT

VCONT

VSS

P53/INT3/RTPTRG0

P52/INT2/RTPTRG1

Note: Allocation of pins TB0IN to TB2IN

can be switched by software.

Outline 64P4B

3

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Data Bus (Even)

Data Bus (Odd)

Data Buffer DQ

0

1

2

3

(8)

Address Bus

Instruction Queue Buffer Q

0

1

2

(8)

Instruction Queue Buffer Q

3

4

5

(8)

Instruction Queue Buffer Q

6

7

8

9

(8)

0

1

Incrementer (24)

Program Address Register PA (24)

Data Address Register DA (24)

Incrementer/Decrementer (24)

Program Counter PC (16)

Program Bank Register PG (8)

Data Bank Register DT (8)

Input Buffer Register IB (16)

Processor Status Register PS (11)

Direct Page Register DPR0 (16)

Direct Page Register DPR1 (16)

Direct Page Register DPR2 (16)

Direct Page Register DPR3 (16)

Stack Pointer S (16)

Index Register Y (16)

Index Register X (16)

Accumulator B (16)

Accumulator A (16)

Arithmetic Logic

Unit (16)

4

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

FUNCTIONS (Microcomputer mode)

Parameter

Functions

203

Number of basic machine instructions

50 ns (the fastest instruction at f(fsys) = 20 MHz)

Instruction execution time

20 MHz (Max.)

External clock input frequency f(XIN)

System clock frequency f(fsys)

20 MHz (Max.)

Flash memory (User ROM area)

60 Kbytes

Memory size

RAM

3072 bytes

8 Kbytes

Flash memory (Boot ROM area)

8-bit ✕ 5

Programmable input/output

ports

P1, P2, P4, P6, P7

6-bit ✕ 1

P5

4-bit ✕ 1

P8

16-bit ✕ 10

Multi-functional timers

TA0–TA9

16-bit ✕ 3

TB0–TB2

(UART or Clock synchronous serial I/O) ✕ 3

Serial I/O

UART0, UART1, and UART2

10-bit successive approximation method ✕ 1 (12 channels)

A-D converter

D-A converter

Dead-time timer

Watchdog timer

Interrupts

8-bit ✕ 2

8-bit ✕ 3

12-bit ✕ 1

8 external sources, 20 internal sources. Each interrupt can be set

to a priority level within the range of 0–7 by software.

Maskable interrups

3 internal sources.

Non-maskable interrups

Incorporated (externally connected to a ceramic resonator or

quartz crystal resonator).

Clock generating circuit

The following multiplication ratios are available: ✕2,✕✕3,✕✕4.

PLL frequency multiplier

Power supply voltage

Power dissipation

5 V±0.5 V

125 mW (at f(fsys) = 20 MHz, Typ., ; the PLL frequency multiplier

is inactive.)

Input/Output withstand voltage

Output current

5 V

Ports’ input/output

characteristics

5 mA

Not available (single-chip mode only).

–20 to 85 °C

Memory expansion

Operating ambient temperature range

Device structure

CMOS high-performance silicon gate process

(Note)

Package

Note:

Packages

M37905F8CFP

M37905F8CSP

64-pin plastic molded QFP (64P6N-A)

64-pin shrink plastic moldeds DIP (64P4B)

5

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

FUNCTIONS (Flash memory mode)

Parameter

Functions

5 V±0.5 V

Power supply voltage

Programming/Erase voltage

Flash memory mode

5 V±0.5 V

3 modes: parallel I/O, serial I/O, and CPU reprogramming modes

Block division for erasure

User ROM area

Boot ROM area

4 blocks (8 Kbytes ✕ 2, 16 Kbytes ✕ 1, 28 Kbytes ✕ 1); total of

60 Kbytes

1 block (8 Kbytes ✕ 1) (Note)

Programmed per word

User ROM area + Boot ROM area

User ROM area

Programming method

Flash memory parallel I/O mode

Flash memory serial I/O mode

User ROM area

Flash memory CPU reprogramming mode

Total erase/Block erase

User ROM area + Boot ROM area

User ROM area

Erase method

Flash memory parallel I/O mode

Flash memory serial I/O mode

User ROM area

Flash memory CPU reprogramming mode

Programming/Erase control

Number of commands

Programming/Erase control by software commands

6 commands

100

Maximum number of reprograms

Note: On shipment, our reprogramming control firmware for the flash memory serial I/O mode has been stored into the boot ROM area.

6

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

PIN DESCRIPTION (MICROCOMPUTER MODE)

Input/

Output

Vcc, Vss

MD0

Name

Power supply input

MD0

Functions

Apply 5 V±0.5 V to Vcc, and 0 V to Vss.

—

Input

Connect this pin to VSS.

MD1

Connect this pin to Vss.

RESET

XIN

Reset input

Clock input

Clock output

Input

The microcomputer is reset when “L” level is applies to this pin.

Input

These are input and output pins of the internal clock generating circuit. Connect a

ceramic resonator or quartz-crystal oscillator between pins XIN and XOUT. When an

external clock is used, the clock source should be connected to pin XIN, and pin

XOUT should be left open.

XOUT

Output

—

VCONT

Filter circuit connection

When using the PLL frequency multiplier, connect this pin to the filter circuit. When

not using the PLL frequency multiplier, this pin should be left open.

AVcc,

AVss

Analog power supply input

Power supply input pins for the A-D and D-A converters. Connect AVcc to Vcc, and

AVss to Vss externally.

VREF

Reference voltage input

I/O port P1

Input

I/O

This is the reference voltage input pin for the A-D and D-A converters.

P10–P17

Port P1 is an 8-bit I/O port. This port has an I/O direction register, and each pin can

be programmed for input or output. These pins enter the input mode ar reset. These

pins also function as I/O pins of UART0, 1.

P20–P27

P40–P47

I/O port P2

I/O

In addition to having the same functions as port P1, these pins function as I/O pins

for timers A4 and A9. Also, they can be programmed to function as input pins for tim-

ers B0 to B2.

I/O port P4

I/O port P5

I/O

In addition to having the same functions as port P1, these pins function as I/O pins

for timers A5 to A8. Also, they function as output pins for motor drive waveform.

P51–P53,

P55–P57

In addition to having the same functions as port P1, these pins function as input pins

for INT1 to INT3 and INT5 to INT7. Also, pins P55 to P57 function as input pins for tim-

ers B0 to B2 and as input pins for position data in the three-phase waveform mode;

and pins P52 and P53 function as trigger-input pins in the pulse output port mode.

P60–P67

P70–P77

P80–P83

I/O port P6

I/O port P7

I/O port P8

I/O

In addition to having the same functions as port P1, these pins function as I/O pins

for timers A0 to A3. Also, they function as motor drive waveform output pins.

In addition to having the same functions as port P1, these pins function as input pins

for the A-D converter. Also, P77 functions as an output pin for the D-A converter.

In addition to having the same functions as port P1, these pins function as input pins

for the A-D converter. Also, these pins function as I/O pins for UART2, and pin P80

functions as an output pin for the D-A converter.

P4OUTCUT P4OUTCUT input

P6OUTCUT P6OUTCUT input

Input

This pin has the function to forcibly place port P4 pins in the input mode. Also, this

pin functions as an input pin for INT0; and this pin is used to input a signal, which

forcibly cuts off a motor drive waveform output.

This pin has the function to forcibly place port P6 pins in the input mode. Also, this

pin functions as an input pin for INT4; and this pin is used to input a signal, which

forcibly cuts off a motor drive waveform output.

7

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

PIN DESCRIPTION (FLASH MEMORY SERIAL I/O MODE)

Input

/Output

Name

Functions

—

Input

Output

—

Power supply input

MD0

VCC, VSS

MD0

Apply 5 V ± 0.5 V to Vcc, and 0 V to Vss.

Connect this pin to Vss.

MD1

Connect this pin to Vss via a resistor of 10 kΩ to 100 kΩ.

The reset input pin.

_____

RESET

XIN

Reset input

Clock input

Connect a ceramic oscillator between the XIN and XOUT pins, or input an external

clock from the XIN pin with the XOUT pin left open.

Clock output

Analog supply input

Reference voltage input

Input port P1

Input port P2

SCLK input

XOUT

AVcc, AVss

VREF

Connect AVcc to Vcc, and AVss to Vss.

Input

I/O

Input an arbitrary level within the range of VSS–VCC. (This is not used in the flash memory serial I/O mode.)

Input “H” or “L”, or leave them open. (This is not used in the flash memory serial I/O mode.)

This is an input pin for a serial clock.

P10–P17

P20–P23, P27

P24

P25

P26

SDA I/O

This is an I/O pin for serial data. Connect this pin to VCC via a resistor (about 1 kΩ).

This is an output pin for the BUSY signal.

Output

Input

BUSY output

P4OUTCUT input

P6OUTCUT input

Input port P4

Input port P5

P4OUTCUT

P6OUTCUT

P40–P47

P55–P53,

P55–P57

P60–P67

P70–P74

P80–P83

VCONT

Input “H”.

Input “H” or “L”, or leave them open. (This is not used in the flash memory serial I/O mode.)

Input

—

Input port P6

Input “H” or “L”, or leave them open. (This is not used in the flash memory serial I/O mode.)

Input port P7

Input port P8

Filter circuit connection

Connect this pin to the filter circuit, or leave this pin open. (This is not used in the flash

memory serial I/O mode.)

8

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

BASIC FUNCTION BLOCKS

Each of the M37905F8CFP and M37905F8CSP has the same func-

tion as that of the M37905M4C-XXXFP except for the following.

Therefore, for details except for the following, refer to the datasheet

of the M37905M4C-XXXFP.

• Internal ROM: type (flash memory) and size

• RAM size

MEMORY

Figure 1 shows the memory map.

00000016

0000FF

0001001¹6⁶

Peripheral devices

control registers

00000016

0000FF16

00FFB416

Peripheral devices

control registers

(See Figures 2 and 3.)

Unused area

0003FF16

00040016

Bank 016

Internal RAM

3072 bytes

000FFF16

00100016

Interrupt vector table

UART2 transmit

UART2 receive

Timer A9

00FFFF16

Timer A8

Timer A7

Timer A6

Internal ROM

60 Kbytes

Timer A5

INT

7

6

5

Reserved area

Address matching detect

Reserved area

00FFB416

00FFFF16

INT

4

3

A-D conversion

UART1 transmit

UART1 receive

UART0 transmit

UART0 receive

Timer B2

Timer B1

Timer B0

Timer A4

Timer A3

Timer A2

Timer A1

Timer A0

INT

2

1

0

Reserved area

Watchdog timer

DBC

BRK instruction

Zero divide

00FFFE16

RESET

Fig. 1 Memory map of M37905F8CFP, M37905F8CSP (Single-chip mode)

9

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Address (Hexadecimel notation)

Reserved area (Note)

Port P1 register

00000016

00000116

00000216

00000316

00004016 Count start register 0

00004116 Count start register 1

00004216 One-shot start register 0

One-shot start register 1

Up-down register 0

Timer A clock division select register

00004316

00004416

00004516

00004616

00004716

00004816

00004916

00004A16

00004B16

00004C16

00004D16

00004E16

00004F16

00005016

00005116

00005216

00005316

00005416

00005516

00005616

00000416 Reserved area (Note)

00000516 Port P1 direction register

00000616 Port P2 register

00000716 Reserved area (Note)

00000816 Port P2 direction register

00000916 Reserved area (Note)

00000A16 Port P4 register

00000B16 Port P5 register

00000C16 Port P4 direction register

00000D16 Port P5 direction register

00000E16 Port P6 register

00000F16 Port P7 register

00001016 Port P6 direction register

00001116 Port P7 direction register

00001216 Port P8 register

00001316

Timer A0 register

Timer A1 register

Timer A2 register

Timer A3 register

Timer A4 register

Timer B0 register

Timer B1 register

00001416 Port P8 direction register

00001516

Timer B2 register

Reserved area (Note)

Timer A0 mode register

00001616

00001716

00001816

00001916

00001A16

00001B16

00001C16

00001D16

00005716 Timer A1 mode register

00005816 Timer A2 mode register

00005916 Timer A3 mode register

00005A16 Timer A4 mode register

00005B16 Timer B0 mode register

00005C16 Timer B1 mode register

00005D16 Timer B2 mode register

Processor mode register 0

Processor mode register 1

00001E16 A-D control register 0

00001F16 A-D control register 1

00005E16

00005F16

00002016

00006016 Watchdog timer register

A-D register 0

00002116

Watchdog timer frequency select register

00006116

00002216

00006216 Particular function select register 0

00006316 Particular function select register 1

A-D register 1

00002316

00002416

00006416

00006516

Particular function select register 2

Reserved area (Note)

A-D register 2

00002516

00002616

00006616 Debug control register 0

00006716 Debug control register 1

00006816

00006916 Address comparison register 0

00006A16

A-D register 3

00002716

00002816

A-D register 4

00002916

00002A16

00002B16

A-D register 5

00006B16

Address comparison register 1

00002C16

00002D16

00002E16

00002F16

00006C16

00006D16

00006E16

00006F16

A-D register 6

₃interrupt control register

₄interrupt control register

INT

A-D register 7

00003016 UART0 transmit/receive mode register

00003116 UART0 band rate register (BRG0)

00007016 A-D conversion interrupt control register

00007116 UART0 transmit interrupt control register

00007216 UART0 receive interrupt control register

00007316 UART1 transmit interrupt control register

00007416 UART1 receive interrupt control register

00007516 Timer A0 interrupt control register

00007616 Timer A1 interrupt control register

00007716 Timer A2 interrupt control register

00007816 Timer A3 interrupt control register

00007916 Timer A4 interrupt control register

00007A16 Timer B0 interrupt control register

00007B16 Timer B1 interrupt control register

00007C16 Timer B2 interrupt control register

00003216

UART0 transmit buffer register

00003316

00003416 UART0 transmit/receive control register 0

00003516 UART0 transmit/receive control register 1

00003616

UART0 receive buffer register

00003716

00003816 UART1 transmit/receive mode register

00003916 UART1 baud rate register (BRG1)

00003A16

UART1 transmit buffer register

00003B16

00003C16 UART1 transmit/receive control register 0

00003D16 UART1 transmit/receive control register 1

00007D16

00007E16

00007F16 INT

₀interrupt control register

₁interrupt control register

₂interrupt control register

INT

00003E16

UART1 receive buffer register

00003F16

Note: Do not write to this address.

Fig. 2 Location of SFRs (1)

10

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Address (Hexadecimel notation)

Reserved area (Note)

00008016

00008116

00008216

00008316

0000C016

0000C116

0000C216

0000C316

00008416 Reserved area (Note)

0000C416 Up-down register

0000C516

1

Reserved area (Note)

00008516

00008616

00008716

00008816

00008916

0000C616

0000C716

Timer A5 register

0000C816

0000C916

Timer A6 register

00008A16 Reserved area (Note)

00008B16

0000CA16

0000CB16

Timer A7 register

Reserved area (Note)

00008C16

00008D16

00008E16

00008F16

00009016

00009116

00009216

00009316

00009416

00009516

0000CC16

0000CD16

0000CE16

0000CF16

Timer A8 register

Timer A9 register

0000D016

Timer A0

Timer A1

Timer A2

1

register

0000D116

0000D216

0000D316

0000D416

0000D516

register

External interrupt input read-out register

00009616 D-A control register

00009716

0000D616 Timer A5 mode register

0000D716

Timer A6 mode register

D-A register 0

D-A register 1

00009816

00009916

00009A16

00009B16

00009C16

00009D16

00009E16

00009F16

0000D816 Timer A7 mode register

0000D916 Timer A8 mode register

0000DA16 Timer A9 mode register

A-D control register 2

0000DB16

0000DC16 Comparator function select register 0

0000DD16 Comparator function select register 1

Reserved area (Note)

Flash memory control register

Comparator result register 0

0000DE16

Comparator result register 1

A-D register 8

0000DF16

0000E016

0000E116

0000E216

0000E316

0000E416

0000E516

0000E616

0000E716

0000A016 Pulse output control register

0000A116

0000A216 Pulse output data register 0

0000A316

0000A416 Pulse output data register 1

0000A516

0000A616 Waveform output mode register

0000A716 Dead-time timer

A-D register 9

A-D register 10

A-D register 11

0000A816 Three-phase output data register 0

0000A916 Three-phase output data register 1

0000E816 Reserved area (Note)

0000E916 Reserved area (Note)

0000EA16 Reserved area (Note)

0000EB16 Reserved area (Note)

0000EC16 Reserved area (Note)

0000ED16 Reserved area (Note)

0000EE16 Reserved area (Note)

Position-data-retain function control register

0000AA16

0000AB16

0000AC16

0000AD16

0000AE16

0000AF16

0000B016

0000B116

0000B216

0000B316

0000B416

Serial I/O pin control register

function control register

Port P2 pin

0000EF16

0000F016

Reserved area (Note)

UART2 transmit/receive mode register

UART2 band rate register (BRG2)

0000F116 UART2 transmit interrupt control register

0000F216 UART2 receive interrupt control register

0000F316

UART2 transmit buffer register

UART2 transmit/receive control register 0

0000F416

0000B516 UART2 transmit/receive control register 1

0000F516 Timer A5 interrupt control register

0000F616 Timer A6 interrupt control register

0000B616

UART2 receive buffer register

0000B716

0000F716

Timer A7 interrupt control register

Reserved area (Note)

0000B816

0000B916

0000BA16

0000BB16

0000BC16

0000BD16

0000BE16

0000BF16

0000F816 Timer A8 interrupt control register

0000F916 Timer A9 interrupt control register

0000FA16

0000FB16

0000FC16

Reserved area (Note)

Clock control register 0

Reserved area (Note)

0000FD16

0000FE16

0000FF16 INT

INT

5

6

7

interrupt control register

Note: Do not write to this address.

Fig. 3 Location of SFRs (2)

11

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

FLASH MEMORY MODE

This internal flash memory has the boot ROM area storing the repro-

gramming control software for reprogramming in the CPU repro-

gramming mode and flash memory serial I/O mode, as well as the

user ROM area storing a certain control software for the normal op-

eration in the microcomputer mode.

These microcomputers contain the flash memory; and single-power-

supply reprogramming is available to this. These microcomputers

have the following three modes, enabling reading/programming/era-

sure for the flash memory:

• Flash memory parallel I/O mode and Flash memory serial I/O

mode, where the flash memory is handled by using an external pro-

grammer.

Although our reprogramming control firmware for the flash memory

serial I/O mode has been stored into this boot ROM area on ship-

ment, the user-original reprogramming control software which is

more appropriate for the user’s system is reprogrammable into this

area, instead. Note that the reprogramming for the boot ROM area is

enabled only in the flash memory parallel I/O mode.

• CPU reprogramming mode, where the flash memory is handled by

the central processing unit (CPU).

As shown in Figure 4, the flash memory is divided into several

blocks, and erasure per block is possible.

00100016

00FFFF16

00100016

28 Kbytes

16 Kbytes

007FFF16

00800016

00BFFF

00C000¹1⁶6

8 Kbytes

00DFFF16

00E00016

00FFFF16

Fig. 4 M37905F8CFP, M37905F8CSP: block configuration of internal flash memory

12

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Flash Memory Parallel I/O Mode

User ROM Area and Boot ROM Area

The user ROM area and boot ROM area can be reprogrammed in

the flash memory parallel I/O mode.

The flash memory parallel I/O mode is used to manipulate the inter-

nal flash memory with a parallel programmer. This parallel program-

mer uses the software commands listed in Table 1 to do the flash

memory manipulations, such as read/programming/erase opera-

tions.

The programming and block erase operations can be performed only

to these areas.

The boot ROM area, 8 Kbytes in size, is assigned to addresses

000016–1FFF16, so that programming and block erase operations

can be performed only to this area. (Access to any address out of

this area is prohibited).

Table 1. Software commands (flash memory parallel I/O mode

Software Command

Read Array

The erasable block in the boot ROM area is only one block, consist-

ing of 8 Kbytes. The reprogramming control firmware to be used in

the flash memory serial I/O mode has been stored to this boot ROM

area on our shipment. Therefore, do not reprogram the boot ROM

area if the user uses the flash memory serial I/O mode.

Do not program to addresses FF9016 to FF9F16 because this area is

the reserved area for the programmer.

Read Status Register

Clear Status Register

Programming

Block Erase

Erase All Block

Note that, when the boot ROM area is read out from the CPU in the

CPU reprogramming mode, described later, its addresses will be

shifted to E00016—FFFF16.

Addresses FF9016 to FF9F16 are the reserved area for the parallel

programmer. Therefore, when the user uses the flash memory paral-

lel I/O mode, do not program to this area.

13

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Flash Memory Serial I/O Mode

In the flash memory serial I/O mode, addresses, data, and software

commands, which are required to read/program/erase the internal

flash memory, are serially input and output with a fewer pins and the

dedicated serial programmer.

In this mode, being different from the flash memory parallel I/O

mode, the CPU controls reprogramming of the flash memory (using

the CPU reprogramming mode), serial input of the reprogramming

data, etc.

The reprogramming control firmware for the flash memory serial I/O

mode has been stored in the boot ROM area on shipment of the

product from us. Note that, then, the flash memory serial I/O mode

will become unavailable if the boot ROM area has been repro-

grammed in the flash memory parallel I/O mode.

Note that, also, this reprogramming control firmware for the flash

memory serial I/O mode is subject to change.

Figures 5 and 6 show the pin connections in the flash memory serial

I/O mode.

The three pins, SCLK, SDA, and BUSY, are used to input and output

serial data.

The SCLK pin is the input pin of external transfer clocks. The SDA

pin is the I/O pin of transmit and receive data, and its output acts as

the N-channel open-drain output. To the SDA pin, connect an exter-

nal pullup resistor (about 1 kΩ). The BUSY pin is the output pin of the

BUSY flag (CMOS output) and goes “H” during BUSY periods owing

to a certain operation, such as transmit, receive, erase, program-

ming, etc.

Transmit and receive data are serially transferred 8 bits at a time.

In the flash memory serial I/O mode, only the user ROM area can be

reprogrammed; the boot ROM area is not accessible.

Addresses FF9016 to FF9F16 are the reserved area for the serial

programmer. Therefore, when the user uses the flash memory serial

I/O mode, do not program to this area.

14

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

P1

/CTS

2

/RxD

/CLK

/RTS

0

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

32

P4

P4OUT^C^U^T/INT

P5 /INT

/INT

2

/TA6^OUT/RTP2

/TA6^IN/RTP2

/TA7^OUT/RTP3

/TA7^IN/RTP3

/TA8^OUT/RTP3

/TA8^IN/RTP3

2

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

P1

1

0

3

P10

0

4

0

Vcc

5

1

AVcc

6

2

V

REF

7

3

AVss

Vss

0

(Note 3)

(Note 2)

1

P8

/AN

/CTS

P7

3

/AN¹¹/TxD

/AN¹⁰/RxD

/CTS /CLK

/RTS

/AN

P7

2

2/RTP^TR^G¹

2

P5

3

3/RTP^TR^G⁰

Vss

P8

1

9

2

P80

/AN

8

2

/DA

1

0

6

5

4

V

CONT

7

7/DA

X

OUT

6/AN

IN

5/AN

RESET

MD0

RESET

4/AN

Notes 1: Allocation of pins TB0IN to TB2IN

can be switched by software.

2: Connected to the oscillation circuit.

3: Recommended to be connected with

V

CC via a resistor.

: Connected to a serial programmer.

Outline 64P6N-A

Fig. 5 Pin connection of M37905F8CFP in flash memory serial I/O mode (outline: 64P6N-A)

15

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

V

CC

1

2

64

63

62

P8

/AN

/CTS

P7

3

/AN11 /T

/AN10 /R

/CTS /CLK

/RTS /DA

/AN /DA

P7

XD2

Vss

AVss

2

XD2

3

4

P8

1

9

2

VREF

61

60

AVcc

Vcc

P80

/AN

8

2

1

5

6

7

0

59

58

57

6

/AN

6

5

P1

P2

MD1

P4 /TA5OUT/RTP2

P4 /TA5IN/RTP2

P4 /TA6OUT/RTP2

P4 /TA6IN/RTP2

P4 /TA7OUT/RTP3

P4 /TA7IN/RTP3

P4 /TA8OUT/RTP3

P4 /TA8IN/RTP3

P4OUTCUT/INT

P5 /INT

0/CTS

0

/RTS

0

7

8

5

1

/CTS

/R

/T

/CTS

0

/CLK

0

2

X

D

0

4

/AN

4

3

9

56

3

XD

0

10

11

55

54

2

/AN

2

1

0

4

1

/RTS

1

5

/CTS

/R

/T

1/CLK

1

12

13

53

52

51

6

XD

1

0

P6

P6 /TA3OUT/RTP1

P6 /TA2IN/U/RTP1

P6 /TA2OUT/V/RTP1

P6 /TA1IN/W/RTP0

P6 /TA1OUT/U/RTP0

P6 /TA0IN/V/RTP0

P6 /TA0OUT/W/RTP0

P5 /INT /TB2IN/IDU

P5 /INT /TB1IN/IDV

P5 /INT /TB0IN/IDW

P6OUTCUT/INT

7/TA3IN/RTP1

3

7

XD

1

14

15

0

/TA4OUT

6

2

50

49

5

1

/TA4IN

16

17

4

0

2/TA9OUT

48

47

3/TA9IN

3

18

19

2

SCLK

SDA

4

(/ TB0IN

(/ TB1IN

(/ TB2IN

)

46

45

44

43

5

1

(Note 1)

20

21

0

6

BUSY

7

22

23

(Note 1)

(Note 3)

MD1

6

42

41

40

0

5

24

4

1

25

26

MD0

RESET

2

39

38

3

RESET

27

28

X

IN

OUT

CONT

4

0

(Note 2)

37

36

X

5

1

29

30

6

2

V

Vs

35

34

s

7

3

P53/INT

3

/RTPTRG0

/RTPTRG1

31

32

(Note 3)

0

33

P52/INT

2

1

V

SS

Notes 1: Allocation of pins TB0IN to TB2IN

can be switched by software.

2: Connected to the oscillation circuit.

3: Recommended to be connected with

VCC via a resistor.

: Connected to a serial programmer.

Outline 64P4B

Fig. 6 Pin connection of M37905F8CSP in flash memory serial I/O mode (outline: 64P4B)

16

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

CPU Reprogramming Mode

Note that addresses of the boot ROM area depend on the accessing

ways to the boot ROM area, When accessing in the flash memory

parallel I/O mode, these addresses will be shifted to 000016 to

1FFF16. On the other hand, when accessing with the CPU, these ad-

dresses will be shifted to E00016 to FFFF16.

The CPU reprogramming mode is used to perform the operations for

the internal flash memory (reading, programming, erasing) under

control of the CPU.

In this mode, only the user ROM area can be reprogrammed; the

boot ROM area cannot be reprogrammed.

Reset removal with both of the MD0 and MD1 pins held “L” invokes

the normal microcomputer mode, and the CPU operates using the

control software stored in the user ROM area. In this case, the boot

ROM area is not accessible.

The user-original reprogramming control software for the CPU repro-

gramming mode can be stored in either the user ROM area or the

boot ROM area.

Because the CPU cannot read out the flash memory in the CPU re-

programming mode, the above software must be transferred to the

internal RAM in advance to be executed.

Removing reset with the MD0 pin held “L” and the MD1 pin “H”, the

CPU starts its operation using the reprogramming control software

stored in the boot ROM area. This mode is called the boot mode. The

reprogramming control software in the boot ROM area can also re-

program the user ROM area.

Boot Mode

After reset removal, be sure not to change the status at pins MD0

and MD1.

The user-original reprogramming control software for the CPU repro-

gramming mode must be stored into the user ROM area or the boot

ROM area in the flash memory parallel I/O mode in advance. (If this

program has been stored into the boot ROM area, the flash memory

serial I/O mode will become unavailable).

7

6

5

4

3

2

1

0

Address

Flash memory control register

RY/BY status bit

9E¹⁶

0: Busy (Programming or erasing is active.)

1: Ready

CPU reprogramming mode select bit (Note 2)

0: Normal mode (Software commands are ignored.)

1: CPU reprogramming mode (Software commands are acceptable.)

Flash memory reset bit (Note 3)

0: Normal operation

1: Reset

User ROM area select bit (Note 4)

(Valid only in the boot mode.)

0: Boot ROM area access

1: User ROM area access

Notes 1: The contents of the flash memory control register after reset is removed are “XX000001”.

2: To set “1”, writing of “0” to bit 1 and subsequent writing of “1” to bit 1 are necessary. Writing to bit 1 must be

performed by the user-original reprogramming control software in the internal RAM.

3: This bit is valid only when bit 1 = “1”. Before setting this bit to “0”, be sure to confirm that bit 0 = “1” after

setting this bit to “1” (reset). This bit 3 must be controlled with bit 1 = “1”.

4: Writing to bit 5 must be performed by the user-original reprogramming control software in the internal RAM.

Fig. 7 Bit configuration of flash memory control register

17

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Function overview (CPU reprogramming mode)

The CPU reprogramming mode is available in the single-chip mode,

memory expansion mode, and boot mode to reprogram the user

ROM area only.

chart, and be sure to follow this flowchart. As shown in Note 1 of Fig-

ure 8, before selecting the CPU reprogramming mode, set “0” to the

processor mode register 1’s bit 7 (the internal ROM bus cycle select

bit) and set flag I to “1” to avoid an interrupt request input.

When a watchdog timer interrupt request is generated in the CPU

reprogramming mode, when an input to the RESET pin is “L”, or

when the software reset is performed, the flash memory control cir-

cuit and flash memory control register will be reset.

In the CPU reprogramming mode, the CPU erases, programs, and

reads the internal flash memory by writing software commands. Note

that the user-original reprogramming control software must be trans-

ferred to the internal RAM in advance to be executed.

The CPU reprogramming mode becomes active when “1” is written

into the flash memory control register’s bit 1 (the CPU reprogram-

ming mode select bit) shown in Figure 7, and software commands

become acceptable.

When the flash memory is reset during the erase or programming

operation, this operation is cancelled and the target block’s data will

be invalid. Just before writing a software command related to the

erase/programming operation, be sure to write to the watchdog

timer. In the CPU reprogramming mode, be sure not to use the STP

and WIT instructions.

In the CPU reprogramming mode, software commands and data are

all written to and read from even addresses (Note that address A0 in

byte addresses = “0”.) 16 bits at a time. Therefore, a software com-

mand consisting of 8 bits must be written to an even address; there-

fore, any command written to an odd address will be invalid. Since

the write data at the 2nd cycle of a programming command consists

of 16 bits, this data must be written to even and odd addresses.

The seaquencer in the flash memory controls the erase and pro-

gramming operations. What the status of the seaquencer operation

is and whether the programming or erase operation has been com-

pleted normally or terminated by an error can be examined by read-

ing the flash memory control register.

Figure 7 shows the bit configuration of the flash memory control reg-

ister.

Bit 0 (the RY/BY status bit) is a read-only bit for indicating the sea-

quencer operation. This bit goes to “0” (BUSY) while the automatic

programming/erase operation is active and goes to “1” (READY) dur-

ing the other operations.

Bit 1 serves as the CPU reprogramming mode select bit. Writing of

“1” to this bit selects the CPU reprogramming mode, and software

commands will be acceptable. Because the CPU cannot directly ac-

cess the internal flash memory in the CPU reprogramming mode,

writing to this bit 1 must be performed by the user-original repro-

gramming control software which has been transferred to the inter-

nal RAM in advance. To set bit 1 to “1”, it is necessary to write “0” and

“1” to this bit 1 successively. On the other hand, to clear this bit to “0”,

it is sufficient only to write “0”.

Bit 3 (the flash memory reset bit) resets the control circuit of the in-

ternal flash memory and is used when the CPU reprogramming

mode is terminated or when an abnormal access to the flash

memory happens. Writing of “1” to bit 3 with the CPU reprogramming

mode select bit = “1” preforms the reset operation. To remove the

reset, write “0” to bit 3 after confirming bit 0 (the RY/BY status bit) be-

comes “1”.

Bit 5 serves as the user ROM area select bit and is valid only in the

boot mode. Setting this bit to “1” in the boot mode switches an acces-

sible area from the boot ROM area to the user ROM area. To use the

CPU reprogramming mode in the boot mode, set this bit to “1”. Note

that when the microcomputer is booted up in the user ROM area,

only the user ROM area is accessible and bit 5 is invalid; on the other

hand, when the microcomputer is in the boot mode, bit 5 is valid in-

dependent of the CPU reprogramming mode. To rewrite bit 5, ex-

ecute the user-original reprogramming control software transferred

to the internal RAM in advance.

Figure 8 shows the CPU reprogramming mode set/termination flow-

18

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Software Commands

Table 2 lists the software commands.

Start

By writing a software command after the CPU reprogramming mode

select bit has been set to “1”, erasing, programming, etc. can be

specified. Note that, at software commands’ input, the high-order

byte (D8–D15) is ignored. (Except for the write data at the 2nd cycle

of a programming command.)

Single-chip mode,

Memory expansion mode,

or Boot mode

Software commands are explained as below.

Read Array Command (FF16)

The processor mode register 1 is set (Note 1).

Flag I is set to “1”.

By writing command code “FF16” at the 1st bus cycle, the microcom-

puter enters the read array mode. If an address to be read is input in

the next or the following bus cycles, the contents at the specified ad-

dress are output to the data bus (D0 to D15) in a unit of 16 bits.

The read array mode is maintained until writing of another software

command.

The user-original reprogramming control software

for the CPU reprogramming mode is transferred to

the internal RAM.

Jump to the above software in the internal RAM.

(The operations shown below will be executed by

the above software in this RAM.)

Read Status Register Command (7016)

Writing command code “7016” at the 1st bus cycle outputs the con-

tents of the status register to the data bus (D0-D7) by a read at the

2nd bus cycle.

(Only in the boot mode.)

The user ROM area select bit is set to “1”.

The status register is explained later.

Clear Status Register Command (5016)

This command clears two status bits (SR.4, 5) each of which is set

to “1” to indicate that the operation has been terminated by an error.

To clear these bits, write command code “5016” at the 1st bus cycle.

Writing of “1” to the CPU reprogramming mode select bit.

(Writing of “0” → Writing of “1”)

Programming Command (4016)

Operations such as erasing, programming are

executed by using software commands.

This command facilitates programming of 1 word (2 bytes) at a time.

To initiate programming, write command code “4016” at the 1st bus

cycle; when write data is written in a unit of 16 bits at the 2nd bus

cycle, the address is specified at the same time. Upon completion of

data writing, automatic programming (data programming and verifi-

cation) operation is started.

Read array command is executed, or reset is

performed by setting the flash memory reset bit.

(Writing of “1” → Writing of “0”) (Note 2)

The completion of the automatic programming operation is con-

firmed by a read of the flash memory control register. The RY/BY sta-

tus bit of the flash memory control register goes “0” during the

automatic programming operation; and also, it goes “1” after the

end of it.

Writing of “0” to the CPU reprogramming mode

select bit.

(Only in the boot mode.)

Writing of “0” to user ROM area select bit (Note 3).

Before execution of the next command, be sure to confirm that the

RY/BY status bit is set to “1” (READY). During the automatic pro-

gramming operation, writing of commands and access to the flash

memory must not be performed.

Completed

When programming continuously, the programming command can

be executed with the read status register mode kept if there is no

programming error. Simultaneously with start of the automatic pro-

gramming, the read status register mode is automatically active. In

this case, the read status register mode is retained until the next read

array command (FF16) is written or until the reset is performed by

using the flash memory reset bit.

Notes 1: The processor mode register 1’s bit 7 (address 5F16, the

internal ROM bus cycle select bit) must be “0” (bus cycle

= 3φ).

2: To terminate the CPU reprogramming mode after the

erase and programming operations have been

completed, be sure to execute the read array command

or perform the flash memory reset operation.

3: This bit may remain “1”. However, if this bit is “1”, the

user ROM area access is specified.

Reading out the status register after the automatic programming op-

eration is completed reports the result of it. For details, refer to the

section on the status register.

Figure 9 shows an example of the programming flowchart.

Additional programming to any word that has already been pro-

grammed is prohibited.

Fig. 8 CPU reprogramming mode set/termination flowchart

19

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Table 2. Software commands (CPU reprogramming mode)

1st cycle

2nd cycle

Command

Data

(D0 to D7)

Mode

Address

Data

Mode

Address

Read Array

FF16

7016

5016

4016

2016

Write

X (Note 2)

—

Read

—

X

—

SRD (Note 3)

—

Read Status Register

Clear Status Register

Programming

X

—

Write

WA (Note 4) WD (Note 4)

Block Erase

Write BA (Note 5)

Write

D016

2016

Erase All Block

X

Notes 1: At software commands’ input, the high-order byte of data (D8–D15) is ignored.

2: X = An arbitrary address in the user ROM area. (Note that A0 = “0”.)

3: SRD = Status Register Data

4: WA = Write Address, WD = Write Data (16 bits).

5: Block address: the maximum address of each block must be input. Note that address A0 = “0”.

Block Erase Command (2016/D016)

Writing command code “2016” at the 1st bus cycle and writing confir-

mation command code “D016” and the maximum address of the

block (Note that address A0 = “0”.) at the subsequent 2nd bus cycle

initiate the automatic erase (erasing and erase verification) operation

for the specified block.

The completion of the automatic erase operation is confirmed by a

read of the flash memory control register. The RY/BY status bit of the

flash memory control register goes “0” simultaneously with start of

the automatic erase operation; and also, it goes “1” simultaneously

with completion of it.

Before execution of the next command, be sure to confirm that the

RY/BY status bit is set to “1” (READY). During the automatic erase

operation, writing of commands and access to the flash memory

must not be performed.

Simultaneously with start of the automatic erase, the read status reg-

ister mode is automatically active. In this case, the read status regis-

ter mode is retained until the next read array command (FF16) is

written or until the reset is performed by using the flash memory re-

set bit.

Reading out the status register after the automatic erase operation

is completed reports the result of it. For details, refer to the section

on the status register.

Figure 10 shows an example of the block erase flowchart.

20

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Erase All Block Command (2016/2016)

Writing command code “2016” at the 1st bus cycle and writing com-

mand code “2016” at the subsequent 2nd bus cycle initiate the con-

tinuous block erase (chip erase) operations for all the blocks.

The completion of the chip erase operation, as well as of the block

erase operation, is confirmed by a read of the flash memory control

register. The result of the automatic erase operation is also reported

by a read of the status register.

Start

Write 40¹⁶

Write,

Address, Data

During the automatic erase operation (when the RY/BY status bit =

“0”), writing of commands and access to the flash memory must not

be performed.

Flash memory control

register Read

NO

RY/BY Status

Status Register

Bit = 1?

The status register is used to indicate whether the programming/

erase operation has been completed normally or terminated by an

error. By writing the read status register command (7016), the con-

tents of the status register can be read out; by writing the clear sta-

tus register command (5016), the contents of the status register can

be cleared.

YES

Full status check

Programming

Completed

Table 3 lists the definition of each bit of the status register.

The status register outputs “8016” after reset is removed.

The status of each bit is described below.

Fig. 9 Programming flowchart

Start

Write 2016

Write D016

,

Block address

Flash memory control

register Read

NO

RY/BY Status

Bit = 1?

YES

Full status check

Block erase Completed

Fig. 10 Block erase flowchart

21

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

(1) when data other than “D016” and “FF16” is written to the data in

the 2nd bus cycle of the block erase command (2016/D016)

(2) when data other than “2016” and “FF16” is written to the data in

the 2nd bus cycle of the erase all block command

(2016/2016)

Erase Status Bit (SR.5)

This bit reports the status of the automatic erase operation. This bit

is set to “1” if an erase error occurs and returns to “0” if the clear sta-

tus register command (5016) is written.

Programming Status Bit (SR.4)

Note that, writing of “FF16” forces the microcomputer into the read

array mode. Simultaneously with this, the command written in the 1st

bus cycle will be canceled.

This bit reports the status of the automatic programming operation.

This bit is set to “1” if a programming error occurs and returns to “0”

if the clear status register command (5016) is written.

Under the condition that any of SR.5, SR.4 = “1”, none of the pro-

gramming, block erase, and erase all block commands can be ac-

cepted. Before execution of these commands, execute the clear

status register command (5016), in advance, to clear these status

bits.

Full Status Check

The full status check reports the results of the erase or programming

operation.

Figure 11 shows the full status check flowchart and actions to be

taken if an error has occurred.

Both of SR.4, SR.5 are set to “1” under the following conditions

(Command Sequence Error):

Table 3. Bit definition of status register

Definition

Status

Symbol

“0”

“1”

Reserved

SR.7 (D7)

SR.6 (D6)

SR.5 (D5)

SR.4 (D4)

SR.3 (D3)

SR.2 (D2)

SR.1 (D1)

SR.0 (D0)

Reserved

Erase Status

Terminated by error.

Terminated normally.

Programming Status

Reserved

22

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Status Register Read

YES

SR.4 = 1

and

Command Sequence

Error

✕ Execute the clear status register command (5016) to clear the status register.

✕ Confirm whether the command has correctly been input or not; and then,

start the operation again.

SR.5 = 1

?

NO

SR.5 = 0?

YES

NO

Perform the block erase operation again.

If an error occurs even after the above operation is performed, the block cannot be used.

Block Erase Error

Programming Error

Perform the programming operation again.

If an error occurs even after the above operation is performed, the word cannot be used.

SR.4 = 0?

YES

End

(Block erase, Programming)

Note: Under the condition that any of SR.5 and SR.4 = 1 , none of the programming,

block erase, and erase all block commands can be accepted. Before execution

of these commands, execute the clear status register command (5016) in advance.

Fig. 11 Full status check flowchart and actions to be taken if an error has ocurred

DC Electrical Characteristics (VCC = 5 V ± 0.5 V, Ta = 0 to 60 °C, f(fsys) = 20 MHz (Note))

Limits

Unit

Symbol

Parameter

Min.

Typ.

30

Max.

Icc1

Icc2

Icc3

Icc4

VCC power source current (at read)

VCC power source current (at write)

VCC power source current (at programming)

VCC power source current (at erasing)

mA

48

54

Limits of VIH, VIL, VOH, VOL, IIH, and IIL for each pin are the same as those in the microcomputer mode.

Note: f(fsys) indicates the system clcok (fsys) frequency.

AC Electrical Characteristics (VCC = 5 V ± 0.5 V, Ta = 0 to 60 °C, f(fsys) = 20 MHz (Note))

Limits

Parameter

Unit

Min.

Typ.

4

0.6

Max.

40

8

256-byte programming time

Block erase time

ms

s

Erase all block time

s

8 ✕ n

0.6 ✕ n

n = Number of blocks to be erased

The limits of parameters other than the above are same as those in the microcomputer mode.

Note: f(fsys) indicates the system clock (fsys) frequency.

23

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

ABSOLUTE MAXIMUM RATINGS

Ratings

–0.3 to 6.5

Parameter

Unit

V

Symbol

Power source voltage

VCC

AVCC

VI

–0.3 to 6.5

Analog power source voltage

V

–0.3 to VCC+0.3

Input voltage P10–P17, P20–P27, P40–P47, P51–P53, P55–P57, P60–P67,

P70–P77, P80–P83, P4OUTCUT, P6OUTCUT, VCONT, VREF,

XIN, RESET, MD0, MD1

V

–0.3 to VCC+0.3

Output voltage P10–P17, P20–P27, P40–P47, P51–P53, P55–P57, P60–P67,

P70–P77, P80–P83, XOUT

V

VO

300

Power dissipation

mW

°C

Pd

–20 to 85

–40 to 150

Operating ambient temperature

Storage temperature

Topr

Tstg

°C

RECOMMENDED OPERATING CONDITIONS ^{(Vcc = 5 V, Ta = –20 to 85 °C, unless otherwise noted)}

Limits

Symbol

Parameter

Unit

Typ.

5.0

VCC

0

Min.

4.5

Max.

5.5

VCC

AVCC

VSS

Power source voltage

V

Analog power source voltage

Power source voltage

AVSS

VIH

Analog power source voltage

0

High-level Input voltage P10–P17, P20–P27, P40–P47, P51–P53, P55–P57, P60–P67,

P70–P77, P80–P83, P4OUTCUT, P6OUTCUT, XIN, RESET,

MD0, MD1

0.8 Vcc

0

Vcc

VIL

Low-level Input voltage P10–P17, P20–P27, P40–P47, P51–P53, P55–P57, P60–P67,

P70–P77, P80–P83, P4OUTCUT, P6OUTCUT, XIN, RESET,

MD0, MD1

0.2 VCC

V

IOH(peak)

IOH(avg)

IOL(peak)

IOL(avg)

f(XIN)

High-level peak output current

P10–P17, P20–P27, P55–P57, P60–P67, P70–P77

–10

–5

10

20

5

mA

High-level average output current P10–P17, P20–P27, P55–P57, P60–P67, P70–P77

Low-level peak output current

P10–P17, P20–P27, P51–P53, P55–P57, P70–P77

P40–P47, P60–P67

mA

Low-level average output current P10–P17, P20–P27, P51–P53, P55–P57, P70–P77

Low-level average output current P40–P47, P60–P67

External clock input frequency (Note 1)

mA

15

20

mA

MHz

f(fsys)

System clock frequency

Notes 1: When using the PLL frequency multiplier, be sure that f(fsys) = 20 MHz or less.

2: Average output current is the average value of an interval of 100 ms.

3: The sum of IOL(peak) must be 110 mA or less, the sum of IOH(peak) must be 80 mA or less.

24

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

DC ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to 85 °C, f(fsys) = 20 MHz)

Limits

Typ.

Symbol

Parameter

Test conditions

IOH = –10 mA

Unit

V

Max.

Min.

3

VOH

High-level output voltage P1

0

1

0

–P1

7

3

7

, P2

, P5

, P8

0

5

0

–P2

–P5

–P8

7

3

, P4

, P6

0

–P4

–P6

7

,

P5

P7

–P5

–P7

0

7

VOL

Low-level output voltage P1

0

1

0

–P1

–P5

–P7

7

3

7

, P2

, P5

, P8

0

5

0

–P2

–P5

–P8

7

3

, P4

, P6

0

–P4

–P6

7

,

IOL = 10 mA

2

1

V

P5

P7

0

7

VT+ —VT–

Hysteresis

TA0IN–TA9IN, TA0OUT–TA9OUT,

0.4

TB0IN–TB2IN, INT0–INT7, CTS0, CTS1,

CTS2, CLK0, CLK1, CLK2, RxD0, RxD1,

RxD2, RTPTRG0, RTPTRG1, P4OUTCUT,

P6OUTCUT

VT+ —VT–

IIH

Hysteresis RESET

Hysteresis XIN

1.5

0.3

5

V

0.5

0.1

High-level input current P1

0

1

0

–P1

–P5

–P7

7

, P2

, P5

0

–P2

–P5

7

, P4

0

–P4

–P6

7

,

VI = 5.0 V

µA

P5

P7

3

5

7, P6

7, P8

0

–P8

3, P4OUTCUT,

P6OUTCUT, XIN, RESET, MD0,

MD1

IIL

Low-level input current P1

0

1

0

–P1

–P5

–P7

7

, P2

, P5

0

–P2

–P5

7

, P4

0

–P4

–P6

7

,

VI = 0 V

–5

50

µA

P5

P7

3

5

7, P6

7, P8

0

–P8

3, P4OUTCUT,

P6OUTCUT

MD1

, XIN, RESET, MD0,

When clock is stoped.

V

VRAM

ICC

2

RAM hold voltage

25

mA

Power source current

Output-only pins

are open, and the

other pins are con-

nected to Vss or

Vcc. An external

square-waveform

clock is input. (Pin

f(fsys) = 20 MHz.

CPU is active.

1

µA

Ta = 25 °C when

clock is inactive.

XOUT is open.) The

PLL frequency

multiplier is inac-

tive.

20

Ta = 85 °C when

clock is inactive.

25

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

A-D CONVERTER CHARACTERISTICS

(VCC = AVCC = 5 V ± 0.5 V, VSS = AVSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)

Limits

Typ.

Symbol

Parameter

Resolution

Test conditions

A-D converter

Unit

Bits

Min.

Max.

10

—————

VREF = VCC

Comparator

1

256

V

VREF

± 3

± 2

LSB

mV

kΩ

10-bit resolution mode

8-bit resolution mode

Comparater

—————

RLADDER

tCONV

Absolute accuracy

Ladder resistance

Conversion time

VREF = VCC

± 40

VREF = VCC

5

5.9

10-bit resolution mode

8-bit resolution mode

Comparater

µs

f(fsys) ≤ 20 MHz

2.45 (Note)

0.7 (Note)

2.7

VREF

VIA

Reference voltage

VCC

V

Analog input voltage

VREF

0

Note: This is applied when A-D conversion freguency (φAD) = f1 (φ).

D-A CONVERTER CHARACTERISTICS

(VCC = 5 V, VSS = AVSS = 0 V, VREF = 5 V, Ta = –20 to 85 °C, unless otherwise noted)

Limits

Typ.

Test conditions

Symbol

——

Parameter

Unit

Min.

2

Max.

8

Resolution

Bits

%

——

tsu

Absolute accuracy

Set time

± 1.0

3

µs

RO

Output resistance

4.5

3.2

kΩ

mA

3.5

IVREF

Reference power source input current

(Note)

Note: The test conditions are as follows:

• One D-A converter is used.

• The D-A register value of the unused D-A converter is “0016.”

• The reference power source input current for the ladder resistance of the A-D converter is excluded.

RESET INPUT

Reset input timing requirements ^(VCC = 5 V ± 0.5 V, VSS = 0V, Ta = –20 to 85 °C, unless otherwise noted)

Limits

Symbol

Parameter

RESET input low-level pulse width

Unit

Typ.

Max.

Min.

10

µs

tw(RESETL)

RESET input

tw(RESETL)

26

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

PERIPHERAL DEVICE INPUT/OUTPUT TIMING

(VCC = 5 V±0.5 V, VSS = 0 V, Ta = –20 to 85 °C, f(fsys) = 20 MHz unless otherwise noted)

For limits depending on f(fsys), their calculation formulas are shown below. Also, the values at f(fsys) = 20 MHz are shown in ( ).

Timer A input (Count input in event counter mode)

Limits

Symbol

Parameter

Unit

Min.

80

Max.

tc(TA)

TAiIN input cycle time

ns

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

40

Timer A input (Gating input in timer mode)

Limits

Symbol

Parameter

Unit

ns

Min.

16 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

Max.

(800)

f(fsys)

≤

20 MHz

tc(TA)

TAiIN input cycle time

(400)

ns

f(fsys)

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

ns

Note :The TAiIN input cycle time requires 4 or more cycles of a count source. The TAiIN input high-level pulse width and the TAiIN input low-level pulse width

respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys)

≤ 20 MHz.

Timer A input (External trigger input in one-shot pulse mode)

Limits

Symbol

Parameter

Unit

ns

Min.

8 × 10⁹

f(fsys)

Max.

tc(TA)

TAiIN input cycle time

f(fsys) ≤ 20 MHz

(400)

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

80

ns

Timer A input (External trigger input in pulse width modulation mode)

Symbol Parameter

Limits

Unit

Min.

80

Max.

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

ns

80

Timer A input (Up-down input and Count input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

2000

1000

400

Max.

tc(UP)

TAiOUT input cycle time

ns

tw(UPH)

TAiOUT input high-level pulse width

TAiOUT input low-level pulse width

TAiOUT input setup time

tw(UPL)

tsu(UP-TIN)

th(TIN-UP)

TAiOUT input hold time

400

27

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Timer A input (Two-phase pulse input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

800

200

Max.

TAjIN input cycle time

TAjIN input setup time

TAjOUT input setup time

tc(TA)

ns

tsu(TAjIN-TAjOUT)

tsu(TAjOUT-TAjIN)

• Gating input in timer mode

• Count input in event counter mode

• External trigger input in one-shot pulse mode

• External trigger input in pulse width modulation mode

tc(TA)

tw(TAH)

TAiIN input

tw(TAL)

• Up-down and Count input in event counter mode

tc(UP)

tw(UPH)

TAiOUT input

(Up-down input)

tw(UPL)

TAiOUT input

(Up-down input)

TAiIN input

(When count by falling)

th(TIN-UP)

t

su(UP-TIN

)

TAiIN input

(When count by rising)

• Two-phase pulse input in event counter mode

tc(TA)

TAjIN input

tsu(TAjIN-TAjOUT

)

tsu(TAjIN-TAjOUT)

tsu(TAjOUT-TAjIN)

TAjOUT input

tsu(TAjOUT-TAjIN)

Test conditions

• VCC = 5 V ± 0.5 V, Ta = –20 to 85 °C

• Input timing voltage : VIL = 1.0 V, VIH = 4.0 V

28

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Timer B input (Count input in event counter mode)

Limits

Unit

Symbol

Parameter

Min.

80

Max.

tc(TB)

TBiIN input cycle time (one edge count)

ns

tw(TBH)

tw(TBL)

tc(TB)

TBiIN input high-level pulse width (one edge count)

TBiIN input low-level pulse width (one edge count)

TBiIN input cycle time (both edge count)

40

160

80

tw(TBH)

tw(TBL)

TBiIN input high-level pulse width (both edge count)

TBiIN input low-level pulse width (both edge count)

80

Timer B input (Pulse period measurement mode)

Symbol Parameter

Limits

Unit

ns

Min.

16 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

Max.

tc(TB)

TBiIN input cycle time

f(fsys) ≤ 20 MHz

(800)

tw(TBH)

tw(TBL)

TBiIN input high-level pulse width

TBiIN input low-level pulse width

(400)

ns

Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width

respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys) ≤ 20 MHz.

Timer B input (Pulse width measurement mode)

Limits

Symbol

Parameter

Unit

ns

Min.

16 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

8 × 10⁹

f(fsys)

Max.

tc(TB)

TBiIN input cycle time

f(fsys) ≤ 20 MHz

(800)

(400)

tw(TBH)

tw(TBL)

TBiIN input high-level pulse width

TBiIN input low-level pulse width

ns

Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width

respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys) ≤ 20 MHz.

Serial I/O

Limits

Symbol

Parameter

Unit

Min.

200

100

Max.

80

tc(CK)

CLKi input cycle time

ns

tw(CKH)

tw(CKL)

td(C-Q)

th(C-Q)

tsu(D-C)

th(C-D)

CLKi input high-level pulse width

CLKi input low-level pulse width

TXDi output delay time

TXDi hold time

0

20

90

RXDi input setup time

RXDi input hold time

29

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

External interrupt (INTi) input

Limits

Unit

Symbol

Parameter

Min.

250

Max.

tw(INH)

tw(INL)

INTi input high-level pulse width

INTi input low-level pulse width

ns

tc(TB)

t

w(TBH)

TBiIN input

t

w(TBL)

tc(CK)

t

w(CKH)

CLK

i

input

t

w(CKL)

t

h(C-Q)

TxD

i

output

input

td(C-Q)

t

h(C-D)

t

su(D-C)

RxD

i

tw(INL)

INT

i

input

tw(INH)

Test conditions

• Vcc = 5 V ± 0.5 V, Ta = –20 to 85 °C

• Input timing voltage : VIL = 1.0 V, VIH = 4.0 V

• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V, C

L

= 50 pF

30

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

External clock input

Timing Requirements (VCC = 5 V±0.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)

Symbol Parameter

Limits

Unit

Min.

50

Max.

tc

External clock input cycle time

ns

tw(half)

tw(H)

tw(L)

tr

External clock input pulse width with half input-voltage

External clock input high-level pulse width

External clock input low-level pulse width

External clock input rise time

0.45 tc

0.5 tc – 8

0.55 tc

8

tf

External clock input fall time

External clock input

t

c

tr

tf

t

w(L)

t

w(H)

tw(half)

XIN

Test conditions

• Vcc = 5 V ± 0.5 V, Ta = –20 to 85 °C

• Input timing voltage : VIL = 1.0 V, VIH = 4.0 V (tw(H), tw(L), t

• Output timing voltage : 2.5 V (t

r

, t )

f

c, tw(half))

31

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

PACKAGE OUTLINE

64P6N-A

Plastic 64pin 14✕14mm body QFP

EIAJ Package Code

QFP64-P-1414-0.80

JEDEC Code

Weight(g)

1.11

Lead Material

Alloy 42

MD

–

HD

D

64

49

1

48

I

2

Recommended Mount Pad

Dimension in Millimeters

Symbol

Min

–

0

–

0.3

0.13

13.8

–

16.5

0.4

–

0°

–

1.3

–

Nom

–

Max

3.05

0.2

–

0.45

0.2

14.2

–

17.1

0.8

–

0.2

0.1

10°

–

A

1

2

0.1

2.8

0.35

0.15

14.0

0.8

16.8

0.6

1.4

–

0.5

–

14.6

b

c

D

E

e

16

33

A

17

32

L1

HD

HE

L

L1

x

y

F

e

b

b2

x

M

L

I

2

–

y

M

D

E

Detail F

–

MMP

64P4B

Plastic 64pin 750mil SDIP

EIAJ Package Code

JEDEC Code

Weight(g)

7.9

Lead Material

Alloy 42/Cu Alloy

SDIP64-P-750-1.78

–

64

33

1

32

Dimension in Millimeters

Symbol

A

Min

–

0.38

–

Nom

–

Max

5.08

–

D

A

1

2

3.8

–

b

0.4

0.9

0.65

0.2

56.2

16.85

–

2.8

0°

0.5

1.0

0.59

1.3

1.05

0.32

56.6

17.15

–

15°

b1

b2

0.75

0.25

56.4

17.0

1.778

19.05

–

c

e

b1

b

b2

D

E

e

SEATING PLANE

e1

L

–

32

MITSUBISHI MICROCOMPUTERS

M37905F8CFP, M37905F8CSP

16-BIT CMOS MICROCOMPUTER

Keep safety first in your circuit designs!

•

Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with

semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of

substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.

Notes regarding these materials

•

These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any

intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.

Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit

application examples contained in these materials.

All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to

change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized

Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein.

The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these

inaccuracies or errors.

Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com).

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a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein.

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Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for

transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.

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Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.

New publication, effective May., 2001.

Specifications subject to change without notice.

REVISION HISTORY

M37905F8CFP, M37905F8CSP DATASHEET

Rev.

1.0

Date

Description

Summary

Page

5/28/01

—

First Edition

(1/1)

生命周期：	Transferred	零件包装代码：	DIP
包装说明：	SDIP,	针数：	64
Reach Compliance Code：	unknown	HTS代码：	8542.31.00.01
风险等级：	5.49	Is Samacsys：	N
具有ADC：	YES	地址总线宽度：
位大小：	16	最大时钟频率：	20 MHz
DAC 通道：	YES	DMA 通道：	NO
外部数据总线宽度：		JESD-30 代码：	R-PDIP-T64
长度：	56.4 mm	I/O 线路数量：	52
端子数量：	64	最高工作温度：	85 °C
最低工作温度：	-20 °C	PWM 通道：	NO
封装主体材料：	PLASTIC/EPOXY	封装代码：	SDIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE, SHRINK PITCH
认证状态：	Not Qualified	ROM可编程性：	FLASH
座面最大高度：	5.08 mm	速度：	20 MHz
最大供电电压：	5.5 V	最小供电电压：	4.5 V
标称供电电压：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	OTHER
端子形式：	THROUGH-HOLE	端子节距：	1.778 mm
端子位置：	DUAL	宽度：	19.05 mm
uPs/uCs/外围集成电路类型：	MICROCONTROLLER	Base Number Matches：	1

型号	制造商	描述	价格	文档
M37905M4C	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格
M37905M4C-XXXFP	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格
M37905M4C-XXXFP	RENESAS	16-BIT CMOS MICROCOMPUTER	获取价格
M37905M4C-XXXSP	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格
M37905M4C-XXXSP	RENESAS	16-BIT CMOS MICROCOMPUTER	获取价格
M37905M6C-XXXFP	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格
M37905M6C-XXXFP	RENESAS	16-BIT CMOS MICROCOMPUTER	获取价格
M37905M6C-XXXSP	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格
M37905M6C-XXXSP	RENESAS	16-BIT CMOS MICROCOMPUTER	获取价格
M37905M8C-XXXFP	MITSUBISHI	16 BIT CMOS MICROCOMPUTER	获取价格

M37905F8CSP

M37905F8CSP 概述

M37905F8CSP 规格参数

M37905F8CSP 数据手册

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