PUMA84SV32000A-70 [MOSAIC]

SRAM Module, 1MX32, 70ns, CMOS, PQCC84, PLASTIC, LCC-84;
PUMA84SV32000A-70
型号: PUMA84SV32000A-70
厂家: MOSAIC    MOSAIC
描述:

SRAM Module, 1MX32, 70ns, CMOS, PQCC84, PLASTIC, LCC-84

静态存储器 内存集成电路
文件: 总2页 (文件大小:105K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
1M x 32 SRAM MODULE  
PUMA 84SV32000A - 70/85/10  
11403 West Bernado Court, Suite 100, San Diego, CA 92127.  
Tel No: (619) 674 2233, Fax No: (619) 674 2230  
Issue 1.0 : March 1999  
Description  
Features  
The PUMA 84SV32000A is a 32Mbit CMOS Static RAM  
Access times of 70/85/100 ns.  
organised as 1M x 32 in a JEDEC 84 pin surface mount  
J-leaded PLCC, available with access times of 70, 85,  
and 100ns. The output width is user configurable as 8,  
16 or 32 bits using eight Chip Selects (CS1~8).  
High Density Package  
JEDEC 84 'J' leaded plastic Surface Mount  
Package.  
Single 3.3 V±10% Power supply.  
User Configurable as 8 / 16 / 32 bit wide output.  
ThePUMA84SV32000Aoffersadramaticspacesaving  
advantage over eight standard 512Kx8 devices. The -L  
version has data retention capability and can be used in  
battery backup applications.  
Operating Power  
(32-BIT)  
2.51 W (max)  
Low Power Standby (-L)  
Fully Static operation.  
8.25 mW (max)  
The PUMA 84SV32000A has Eight Write Enable Inputs.  
(WE1~8)  
Data Retention Capability (-L version only).  
Multiple ground pins for maximum noise immunity.  
Block Diagram  
Pin Definition  
A0 - A18  
OE  
11 10  
9
8
7
6
5
4
3
2
1 84 83 82 81 80 79 78 77 76 75  
WE6  
NC  
WE3  
NC  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
74  
73  
72  
512K x 8  
SRAM  
512K x 8  
SRAM  
D14  
D13  
D12  
GND  
D11  
D10  
D9  
D8  
VCC  
D7  
D17  
D18  
D19  
GND  
D20  
D21  
D22  
D23  
VCC  
D24  
D25  
D26  
D27  
GND  
D28  
D29  
D30  
NC  
D0 - D7  
D0 - D7  
WE5  
CS5  
WE1  
CS1  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
512K x 8  
SRAM  
512K x 8  
SRAM  
D8 - D15  
D8 - D15  
WE6  
CS6  
WE2  
CS2  
PUMA 84S32000A  
VIEW  
FROM  
ABOVE  
512K x 8  
SRAM  
512K x 8  
SRAM  
D16 - D23  
D16 - D23  
WE7  
CS7  
WE3  
CS3  
D6  
D5  
D4  
GND  
D3  
D2  
512K x 8  
SRAM  
512K x 8  
SRAM  
D24 - D31  
D24 - D31  
WE8  
CS8  
WE4  
CS4  
D1  
NC  
WE5  
WE4  
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51  
52 53  
Pin Functions  
Address Inputs  
Data Input/Output  
Chip Select  
A0 ~ A18  
D0 ~ D31  
CS1 ~ 8  
WE1 ~ 8  
OE  
Package Details  
Write Enable  
Output Enable  
No Connect  
Plastic 84 J-Leaded JEDEC PLCC  
NC  
Power (+5V)  
Ground  
VCC  
GND  
PUMA 84SV32000A - 70/85/10  
ISSUE 1.0 : March 1999  
Package Information  
Dimensions in mm(inches)  
Plastic 84 Pin JEDEC Surface mount PLCC  
0.10 (0.004)  
30.35 (1.195) sq.  
30.10 (1.185) sq.  
8.50  
(0.335) max  
1.27  
(0.050) typ.  
0.46  
(0.018) typ.  
0.90 (0.035) typ.  
Ordering Information  
PUMA 84SV32000ALI - 70  
Speed  
70  
85  
10  
=
=
=
70 ns  
85 ns  
100 ns  
Temperature Range  
Power Consumption  
Blank  
I
=
=
Commercial Temperature  
Industrial Temperature  
Blank  
L
=
=
Standard  
Low Power  
Write Enable Option  
Organisation  
A
=
=
WE1~8 (Eight WE inputs)  
32000  
1M x 32 SRAM  
configurable as 2M x 16  
and 4M x 8  
Memory Type  
Package  
S
=
=
Asynchronous SRAM  
3.3V  
PUMA 84  
Memory Stack 84 pin 'J'  
Leaded  
Note :  
Although this data is believed to be accurate, the information contained herein, is not intended to and does not create  
any warranty of merchantibility or fitness for a particular purpose.  
Our products are subject to a constant process of development. Data may be changed at any time without notice.  
Products are not authorised for use as critical components in life support devices without the express approval of a  
company director.  

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