V62C5181024LL-70W [MOSEL]
128K X 8 STATIC RAM; 128K ×8静态RAM
| 型号： | V62C5181024LL-70W |
| 厂家： | 
MOSEL VITELIC, CORP |
| 描述： | 128K X 8 STATIC RAM |
| 文件： | 总12页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
V62C5181024
MOSEL VITELIC
128K X 8 STATIC RAM
■ Packages
Features
– 32-pin TSOP (Standard)
– 32-pin 600 mil PDIP
– 32-pin 440 mil SOP (525 mil pin-to-pin)
■ High-speed: 35, 70 ns
■ Ultra low DC operating current of 5mA (max.)
TTL Standby: 5 mA (Max.)
CMOS Standby: 60 µA (Max.)
■ Fully static operation
Description
■ All inputs and outputs directly compatible
■ Three state outputs
The V62C5181024 is a 1,048,576-bit static
random-access memory organized as 131,072
words by 8 bits. It is built with MOSEL VITELIC’s
high performance CMOS process. Inputs and
three-state outputs are TTL compatible and allow
for direct interfacing with common system bus
structures.
■ Ultra low data retention current (V = 2V)
CC
■ Single 5V ± 10% Power Supply
Functional Block Diagram
A0
VCC
GND
Row
1024 x 1024
Decoder
Memory Array
A9
I/O0
Column I/O
Input
Data
Circuit
Column Decoder
I/O7
A10
A16
CE1
CE2
OE
Control
Circuit
5181024 01
WE
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
T
•
W
•
P
•
35
•
70
•
L
•
LL
•
0°C to 70 °C
Blank
I
–40°C to +85°C
•
•
•
•
•
•
•
V62C5181024 Rev. 2.2 February 2000
1
MOSEL VITELIC
V62C5181024
WE
Write Enable Input
Pin Descriptions
An active LOW input, WE input controls read and
write operations. When CE and WE inputs are both
LOW, the data present on the I/O pins will be
written into the selected memory location.
A –A
Address Inputs
0
16
These 17 address inputs select one of the 128K x 8
bit segments in the RAM.
CE , CE Chip Enable Inputs
1
2
I/O –I/O Data Input and Data Output Ports
These 8 bidirectional ports are used to read data
from and write data into the RAM.
0
7
CE is active LOW and CE is active HIGH. Both
1
2
chip enables must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
V
Power Supply
Ground
CC
GND
OE
Output Enable Input
The Output Enable input is active LOW. When OE
is LOW with CE LOW and WE HIGH, data of the
selected memory location will be available on the
I/O pins. When OE is HIGH, the I/O pins will be in
the high impedance state.
Pin Configurations (Top View)
32-Pin DIP/SOP
32-Pin TSOP (Standard)
A11
A9
A8
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
NC
A16
A14
A12
A7
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
2
3
4
9
10
11
12
13
14
15
16
5
6
A6
A6
A5
A4
A1
A2
A3
7
A5
A9
8
A4
A11
OE
5181024 03
A3
9
10
11
12
13
14
15
16
A2
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
A1
A0
I/O0
I/O1
I/O2
GND
5181024 02
V62C5181024 Rev. 2.2 February 2000
2
MOSEL VITELIC
V62C5181024
Part Number Information
V
62
C
51
8
1024
–
MOSEL-VITELIC
MANUFACTURED
TEMP.
SRAM
FAMILY
OPERATING
VOLTAGE
DENSITY
1024K
PKG
BLANK = 0°C to 70°C
I = -40°C to +85°C
PWR.
SPEED
62 = STANDARD
35 ns
70 ns
T = TSOP STANDARD
C = CMOS PROCESS
P = 600 mil PDIP
W = 440 mil SOP (525 mil pin-to-pin)
51 = 5V
ORGANIZATION
8 = 8-bit
5181024 05
L = LOW POWER
LL = LOW LOW POWER
Absolute Maximum Ratings (1)
Symbol
Parameter
Commercial
-0.5 to +7
Industrial
-0.5 to +7
-0.5 to +7
Units
V
V
Supply Voltage
CC
V
N
Input Voltage
-0.5 to +7
V
V
Input/Output Voltage Applied
Temperature Under Bias
Storage Temperature
V
+ 0.5
V + 0.5
CC
V
DQ
CC
T
-10 to +125
-55 to +125
-65 to +135
-65 to +150
°C
°C
BIAS
T
STG
NOTE:
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Capacitance*
Truth Table
T = 25°C, f = 1.0MHz
A
I/O
Mode
Standby
Standby
Output Disable
Read
CE
H
X
CE
X
OE
X
WE Operation
Symbol Parameter
Conditions Max. Unit
1
2
C
C
Input Capacitance
Output Capacitance
V
= 0V
= 0V
6
8
pF
pF
X
X
H
H
L
High Z
High Z
High Z
IN
IN
V
OUT
I/O
L
X
NOTE:
L
H
H
1. This parameter is guaranteed and not tested.
L
H
L
D
OUT
Write
L
H
X
D
IN
NOTE:
X = Don’t Care, L = LOW, H = HIGH
V62C5181024 Rev. 2.2 February 2000
3
MOSEL VITELIC
V62C5181024
DC Electrical Characteristics (over all temperature ranges, V = 5V ± 10%)
CC
Symbol Parameter
Test Conditions
Min.
-0.5
2.2
-5
Typ.
—
Max.
0.8
6
Units
V
(1,2)
(1)
V
Input LOW Voltage
IL
IH
IL
V
Input HIGH Voltage
—
V
I
Input Leakage Current
Output Leakage Current
Output LOW Voltage
Output HIGH Voltage
V
V
V
V
= Max, V = 0V to V
—
5
µA
µA
V
CC
CC
CC
CC
IN
CC
I
= Max, CE = V , V
= 0V to V
CC
-5
—
5
OL
1
IH
OUT
V
= Min, I = 2.1mA
—
—
0.4
—
OL
OL
V
= Min, I = -1mA
2.4
—
V
OH
OH
Symbol Parameter
Power Com.(4) Ind.(4)
Units
I
Operating Power Supply Current, CE = V , CE = V ,
IH
Read
L
LL
L
4
3
6
5
mA
CC
1
IL
2
Output Open, V = Max., f = 0
CC
Write
30
25
80
75
4
35
30
90
85
6
LL
I
Average Operating Current, CE = V , CE = V , Output Open,
35ns
70ns
mA
mA
µA
CC1
1
IL
2
IH
(3)
= Max., f = f
MAX
V
CC
I
TTL Standby Current
CE ≥ V , CE ≤ V , V = Max.
L
LL
L
SB
1
IH
2
IL
CC
3
5
I
CMOS Standby Current, CE ≥ V – 0.2V, CE ≤ 0.2V,
60
50
80
60
SB1
1
CC
2
V
≥ V – 0.2V or V ≤ 0.2V, V = Max.
CC IN CC
IN
LL
NOTES:
1. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
2. (Min.) = -3.0V for pulse width < 20ns.
3. fMAX = 1/tRC
V
IL
.
4. Maximum values.
AC Test Conditions
Key to Switching Waveforms
Input Pulse Levels
0 to 3V
5 ns
WAVEFORM
INPUTS
OUTPUTS
Input Rise and Fall Times
Timing Reference Levels
Output Load
MUST BE
STEADY
WILL BE
STEADY
1.5V
see below
MAY CHANGE
FROM H TO L
WILL BE
CHANGING
FROM H TO L
AC Test Loads and Waveforms
MAY CHANGE
FROM L TO H
WILL BE
CHANGING
FROM L TO H
+5V
1800 Ω
DON'T CARE:
ANY CHANGE
PERMITTED
CHANGING:
STATE
UNKNOWN
I/O Pins
CL = 30 pF*
990 Ω
CENTER
DOES NOT
APPLY
LINE IS HIGH
IMPEDANCE
“OFF” STATE
* Includes scope and jig capacitance
5181024 06
V62C5181024 Rev. 2.2 February 2000
4
MOSEL VITELIC
V62C5181024
Data Retention Characteristics
Symbol
Parameter
Power
Min.
Typ.(2)
Max.
Units
V
V
for Data Retention
CE ≥ V – 0.2V, CE ≤ 0.2V,
2.0
—
5.5
V
DR
CC
1
CC
2
V
≥ V – 0.2V, or V ≤ 0.2V
CC IN
IN
I
Data Retention Current
CE ≥ V –0.2V, CE ≤ 0.2V,
Com’l
Ind.
L
LL
L
—
—
—
—
2
2
50
40
100
60
—
µA
CCDR
1
DR
2
V
≥ V – 0.2V, or V ≤ 0.2V
CC IN
IN
—
4
LL
t
Chip Deselect to Data Retention Time
Operation Recovery Time (see Retention Waveform)
0
—
—
ns
ns
CDR
(1)
t
t
—
R
RC
NOTES:
1.
2.
t
T
= Read Cycle Time
= +25°C.
RC
A
Low V Data Retention Waveform (1) (CE Controlled)
CC
1
Data Retention Mode
DR ≥ 2V
VCC
CE1
4.5V
tCDR
4.5V
2.2V
V
tR
CE1 ≥ VCC – 0.2V
2.2V
5181024 07
Low V Data Retention Waveform (2) (CE Controlled)
CC
2
Data Retention Mode
DR ≥ 2V
VCC
CE2
4.5V
tCDR
4.5V
V
tR
2.2V
2.2V
CE2 ≤ 0.2V
5181024 08
V62C5181024 Rev. 2.2 February 2000
5
MOSEL VITELIC
V62C5181024
AC Electrical Characteristics
(over all temperature ranges)
Read Cycle
-35
-45
-55
-70
Parameter
Name
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
t
Read Cycle Time
35
—
—
—
—
3
—
35
35
35
10
—
—
—
10
10
—
45
—
—
—
—
5
—
45
45
45
20
—
—
—
15
15
—
55
—
—
—
—
7
—
55
55
55
25
—
—
—
20
20
—
70
—
—
—
—
10
10
5
—
70
70
70
35
—
—
—
25
25
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RC
t
Address Access Time
AA
t
Chip Enable Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
ACS1
t
ACS2
t
OE
t
CLZ1
t
3
5
7
CLZ2
t
5
5
5
OLZ
t
0
0
0
0
CHZ
t
0
0
0
0
OHZ
t
3
3
3
3
OH
Write Cycle
-35
-45
-55
-70
Parameter
Name
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
t
Write Cycle Time
35
25
25
0
—
—
—
—
—
—
—
10
—
—
—
45
35
35
0
—
—
—
—
—
—
—
15
—
—
—
55
50
50
0
—
—
—
—
—
—
—
20
—
—
—
70
60
60
0
—
—
—
—
—
—
—
25
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
t
Chip Enable to End of Write
Chip Enable to End of Write
Address Setup Time
CW1
t
CW2
t
AS
t
Address Valid to End of Write
Write Pulse Width
25
25
0
35
35
0
45
40
0
60
50
0
AW
t
WP
t
Write Recovery Time
Write to Output High-Z
Write to Output Low Z
Data Setup to End of Write
Data Hold from End of Write
WR
t
0
0
0
0
WHZ
t
3
5
5
5
WLZ
t
20
0
25
0
25
0
30
0
DW
t
DH
V62C5181024 Rev. 2.2 February 2000
6
MOSEL VITELIC
V62C5181024
Switching Waveforms (Read Cycle)
(1, 2)
Read Cycle 1
tRC
ADDRESS
OE
tAA
tOE
tOH
(5)
tOHZ
tOLZ
I/O
5181024 09
(1, 2, 4)
Read Cycle 2
tRC
ADDRESS
tAA
tOH
tOH
I/O
5181024 10
(1, 3, 4)
Read Cycle 3
ADDRESS
CE1
CE2
I/O
tACS1
tACS2
(5)
tCHZ
(5)
tCLZ1
(5)
tCLZ2
5181024 11
NOTES:
1. WE = V
.
IH
2. CE = V and CE = V .
1
IL
2
IH
3. Address valid prior to or coincident with CE transition LOW and/or CE transition HIGH.
1
2
4. OE = V .
IL
5. Transition is measured ±500mV from steady state with C = 5pF. This parameter is guaranteed and not 100% tested.
L
V62C5181024 Rev. 2.2 February 2000
7
MOSEL VITELIC
V62C5181024
Switching Waveforms (Write Cycle)
(4)
Write Cycle 1 (WE Controlled)
tWC
ADDRESS
(2)
tWR
(6)
tCW
CE1
CE2
tAW
(6)
tCW
tAS
WE
(1)
tWP
OUTPUT
tDW
tDH
tWHZ
INPUT
5181024 12
(4)
Write Cycle 2 (CE Controlled)
tWC
ADDRESS
(2)
tWR
(6)
tCW
(4)
CE1
CE2
WE
tAW
(6)
tCW
tAS
High-Z
OUTPUT
INPUT
tDW
tDH
(5)
5181024 13
NOTES:
1. The internal write time of the memory is defined by the overlap of CE and CE active and WE low. All signals must be active to
1
2
initiate and any one signal can terminate a write by going inactive. The data input setup and hold timing should be referenced to
the second transition edge of the signal that terminates the write.
2.
3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the outputs must not be applied.
4. OE = V or V . However it is recommended to keep OE at V during write cycle to avoid bus contention.
t
is measured from the earlier of CE or WE going high, or CE going LOW at the end of the write cycle.
WR 1 2
IL
IH
IH
5. If CE is LOW and CE is HIGH during this period, I/O pins are in the output state. Then the data input signals of opposite phase
1
2
to the outputs must not be applied to them.
t is measured from CE going low or CE going HIGH to the end of write.
CW
6.
1
2
V62C5181024 Rev. 2.2 February 2000
8
MOSEL VITELIC
V62C5181024
Package Diagrams
32-Pin 600 mil Plastic DIP
1.660 MAX.
[42.16 MAX.]
15° MAX
INDEX-1
EJECTOR MARK
0.545–0.555
[13.84–14.10]
0.600 TYP
[15.24 TYP]
INDEX-2
+0.004
–0.0004
0.010
0.254
0.010 [0.254] MIN
+0.102
–0.010
0.050 [1.27] MAX
0.210 [5.33] MAX
0.120 [3.05] MIN
+0.012
–0
+0.305
–0
Units in inches [mm]
0.100
[2.54]
TYP
+0.012
–0
+0.305
–0
0.032
0.813
.047
1.19
+0.006
–0.002
0.018
0.457
+0.152
–0.051
32-Pin 440 mil SOP (525 mil pin-to-pin)
Units in inches [mm]
0.822 [20.88] MAX.
0–8°
0.556 ±0.012
[14.12 ± 0.305]
0.525 [13.34] MAX.
0.450 ±0.008
[11.43 ± 0.203]
0.031 ±0.008
[0.787 ±0.203]
+0.004
–0.002
0.018 ± 0.004
[0.457 ± 0.102]
0.008
0.050 [1.27]
0.108 ±0.008
[2.74 ± 0.203]
0.098 [2.50] MAX
0.806 ±0.008
0.118 [3.00] MAX.
[20.47 ± 0.203]
0.10 [2.54] MAX.
0.004 [0.102] MAX.
0.002 [0.051] MAX.
0.028 [0.711]
V62C5181024 Rev. 2.2 February 2000
9
MOSEL VITELIC
V62C5181024
Package Diagrams (Cont’d)
32-Pin TSOP (Standard)
Units in inches [mm]
0.787 ± 0.008
[19.99 ± 0.203]
Detail “A”
0.315 TYP.
0.010 [.254]
(0.319 MAX.)
8.00 TYP.
(8.10 MAX.)
0.024 ± 0.004
[0.610 ± 0.102]
0.724 TYP. (0.728 MAX.)
[18.39 TYP. (18.49 MAX)]
0.035 ± 0.002
[0.889 ± 0.051]
SEATING
PLANE
0.047 [1.19] MAX.
0.032 [0.813] TYP.
See Detail “A”
0.020 [0.508] MAX.
0.020 [0.508] SBC
0.005 MIN.
0.007 MAX.
0.003 [0.076] MAX.
0.009 ± 0.002
[0.229 ± 0.051]
0.127 MIN.
0.178 MAX.
V62C5181024 Rev. 2.2 February 2000
10
MOSEL VITELIC
V62C5181024
Notes
V62C5181024 Rev. 2.2 February 2000
11
MOSEL VITELIC WORLDWIDE OFFICES
V62C5181024
U.S.A.
TAIWAN
SINGAPORE
UK & IRELAND
3910 NORTH FIRST STREET
SAN JOSE, CA 95134
PHONE: 408-433-6000
FAX: 408-433-0952
7F, NO. 102
10 ANSON ROAD #23-13
INTERNATIONAL PLAZA
SINGAPORE 079903
PHONE: 65-3231801
FAX: 65-3237013
SUITE 50, GROVEWOOD
BUSINESS CENTRE
STRATHCLYDE BUSINESS
PARK
MIN-CHUAN E. ROAD, SEC. 3
TAIPEI
PHONE: 886-2-2545-1213
FAX: 886-2-2545-1209
BELLSHILL, LANARKSHIRE,
SCOTLAND, ML4 3NQ
PHONE: 01698-748515
FAX: 01698-748516
HONG KONG
19 DAI FU STREET
TAIPO INDUSTRIAL ESTATE
TAIPO, NT, HONG KONG
PHONE: 852-2666-3307
FAX: 852-2770-8011
NO 19 LI HSIN RD.
JAPAN
SCIENCE BASED IND. PARK
HSIN CHU, TAIWAN, R.O.C.
PHONE: 886-3-579-5888
FAX: 886-3-566-5888
WBG MARIVE WEST 25F
6, NAKASE 2-CHOME
MIHAMA-KU, CHIBA-SHI
CHIBA 261-7125
GERMANY
(CONTINENTAL
EUROPE & ISRAEL)
71083 HERRENBERG
BENZSTR. 32
PHONE: 81-43-299-6000
FAX: 81-43-299-6555
GERMANY
PHONE: +49 7032 2796-0
FAX: +49 7032 2796 22
U.S. SALES OFFICES
NORTHWESTERN
3910 NORTH FIRST STREET
SAN JOSE, CA 95134
PHONE: 408-433-6000
FAX: 408-433-0952
SOUTHWESTERN
302 N. EL CAMINO REAL #200
SAN CLEMENTE, CA 92672
PHONE: 949-361-7873
FAX: 949-361-7807
CENTRAL,
NORTHEASTERN &
SOUTHEASTERN
604 FIELDWOOD CIRCLE
RICHARDSON, TX 75081
PHONE: 972-690-1402
FAX: 972-690-0341
2/00
Printed in U.S.A.
© Copyright 2000, MOSEL VITELIC Inc.
The information in this document is subject to change without
notice.
MOSEL VITELIC subjects its products to normal quality control
sampling techniques which are intended to provide an assurance
of high quality products suitable for usual commercial applica-
tions. MOSEL VITELIC does not do testing appropriate to provide
100% product quality assurance and does not assume any liabil-
ity for consequential or incidental arising from any use of its prod-
ucts. If such products are to be used in applications in which
personal injury might occur from failure, purchaser must do its
own quality assurance testing appropriate to such applications.
MOSEL VITELIC makes no commitment to update or keep cur-
rent the information contained in this document. No part of this
document may be copied or reproduced in any form or by any
means without the prior written consent of MOSEL-VITELIC.
MOSEL VITELIC 3910 N. First Street, San Jose, CA 95134-1501 Ph: (408) 433-6000 Fax: (408) 433-0952 Tlx: 371-9461
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