MC10133PS [MOTOROLA]
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| 型号： | MC10133PS |
| 厂家： | 
MOTOROLA |
| 描述： | 暂无描述 |
| 文件： | 总4页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC10133 is a high speed, low power, quad latch consisting of four
bistable latch circuits with D type inputs and gated Q outputs, allowing direct
wiring to a bus. When the clock is high, outputs will follow D inputs. Information
is latched on the negative going transition of the clock.
The outputs are gated when the output enable (G) is low. All four latches may
be clocked at one time with the common clock (C ), or each half may be
C
clocked separately with its clock enable (CE).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P
= 310 mW typ/pkg (No Load)
= 4.0 ns typ
D
t
pd
t , t = 2.0 ns typ (20%–80%)
r f
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
LOGIC DIAGRAM
D0
3
Q0
2
6
Q0
Q1
DIP
PIN ASSIGNMENT
G0
D1
5
7
Q1
CE
4
V
V
CC2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC1
C
C
13
Q3
D3
Q0
CE 12
D
0
D2
9
Q2
Q3
C
C
CE
G0
Q1
11 Q2
15 Q3
G1 10
CE
Q2
G1
D2
D3 14
D1
TRUTH TABLE
V
EE
G
C
D
Q
n+1
L
V
V
V
= PIN 1
= PIN 16
= PIN 8
CC1
CC2
EE
H
L
L
L
X
L
H
H
X
X
L
Q
n
L
H
H
C = C + CE
C
9/96
Motorola, Inc. 1996
REV 6
MC10133
ELECTRICAL CHARACTERISTICS
Test Limits
+25°C
Pin
Under
Test
–30°C
+85°C
Characteristic
Power Supply Drain Current
Input Current
Symbol
Unit
mAdc
µAdc
Min
Max
Min
Typ
Max
Min
Max
I
E
8
82
75
82
I
3
4
5
390
425
560
560
245
265
350
350
245
265
350
350
inH
13
I
3
0.5
0.5
0.3
µAdc
inL
Output Voltage
Output Voltage
Logic 1
V
2
2
–1.060
–1.060
–0.890
–0.890
–0.960
–0.960
–0.810
–0.810
–0.890
–0.890
–0.700
–0.700
Vdc
OH
Logic 0
Logic 1
V
2
2
2
–1.890
–1.890
–1.890
–1.675
–1.675
–1.675
–1.850
–1.850
–1.850
–1.650
–1.650
–1.650
–1.825
–1.825
–1.825
–1.615
–1.615
–1.615
Vdc
Vdc
OL
Threshold Voltage
V
OHA
2
2
2
2
2
2
2
2
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
–1.080
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
–0.910
Threshold Voltage
Logic 0
V
OLA
2
2
2
2
2
2
–1.655
–1.655
–1.655
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.630
–1.630
–1.630
–1.595
–1.595
–1.595
–1.595
–1.595
–1.595
Vdc
Switching Times (50Ω Load)
ns
Propagation Delay
t
t
t
2
2
2
3
3
1.0
1.0
1.0
2.5
1.5
5.6
5.4
3.2
1.0
1.0
1.0
2.5
1.5
4.0
4.0
2.0
0.7
0.7
5.4
5.4
3.1
1.1
1.2
1.0
2.5
1.5
5.9
6.0
3.4
3+2+
4+2+
5–2+
t
t
setup
hold
Rise Time
Fall Time
(20 to 80%)
(20 to 80%)
t
2
2
1.0
1.0
3.6
3.6
1.1
1.1
2.0
2.0
3.5
3.5
1.1
1.1
3.8
3.8
2+
t
2–
V
IHmax
Output level to be measured after a clock pulse has been applied to the clock input (Pin 4)
V
ILmin
Data input at proper high/low level while clock pulse is high so that device latches ar proper high/low level for test. Levels are measured after
device has latched.
* Latch set to zero state before test.
MOTOROLA
3–14
MC10133
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
V
V
ILmin
V
V
V
EE
IHmax
IHAmin
ILAmax
–30°C
+25°C
+85°C
–0.890
–0.810
–0.700
–1.890
–1.850
–1.825
–1.205
–1.105
–1.035
–1.500
–1.475
–1.440
–5.2
–5.2
–5.2
Pin
Under
Test
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(V
CC
)
Characteristic
Power Supply Drain Current
Input Current
Symbol
Gnd
V
V
ILmin
V
V
V
EE
IHmax
IHAmin
ILAmax
I
E
8
13
8
1, 16
I
3
4
5
3
4
5
8
8
8
8
1, 16
1, 16
1, 16
1, 16
inH
13
13
I
3
3
8
1, 16
inL
Output Voltage
Output Voltage
Logic 1
Logic 0
V
2
2
3, 4
3, 13
8
8
1, 16
1, 16
OH
V
2
2
2
13
3, 5, 13
4
3
3
8
8
8
1, 16
1, 16
1, 16
OL
Threshold Voltage
Logic 1
V
OHA
2
2
2
2
2
2
2
2
3, 4
4
3, 4
3
5
4
8
8
8
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
3
3
3
4
13
Threshold Voltage
Logic 0
V
OLA
2
2
2
2
2
2
3, 4
4
4
5
8
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
1, 16
3
3
3
13
Switching Times
(50Ω Load)
+1.11V
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t
t
t
2
2
2
3
3
4
3*
3
4
5
3
3
2
2
2
2
2
8
8
8
8
8
1, 16
1, 16
1, 16
1, 16
1, 16
3+2+
4+2+
5–2+
t
t
setup
hold
Rise Time
Fall Time
(20 to 80%)
(20 to 80%)
t
2
2
4
4
3
3
2
2
8
8
1, 16
1, 16
2+
t
2–
V
V
IHmax
Output level to be measured after a clock pulse has been applied to the clock input (Pin 4)
ILmin
Data input at proper high/low level while clock pulse is high so that device latches ar proper high/low level for test. Levels are measured after
device has latched.
* Latch set to zero state before test.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
3–15
MOTOROLA
MC10133
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
–A–
NOTES:
ISSUE V
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J
16 PL
0.25 (0.010)
G
0.300 BSC
7.62 BSC
M
S
T
B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
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MC10133/D
◊
相关型号：
MC10134FNR2
D Latch, 10K Series, 2-Func, Low Level Triggered, 1-Bit, Complementary Output, ECL, PQCC20, PLASTIC, LCC-20
MOTOROLA
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