MC10H642FN [MOTOROLA]
68030/040 PECL-TTL CLOCK DRIVER; 68030/040 PECL -TTL时钟驱动器
| 型号： | MC10H642FN |
| 厂家： | 
MOTOROLA |
| 描述： | 68030/040 PECL-TTL CLOCK DRIVER |
| 文件： | 总9页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC10H/100H642 generates the necessary clocks for the 68030,
68040 and similar microprocessors. It is guaranteed to meet the clock
specifications required by the 68030 and 68040 in terms of part–to–part
skew, within–part skew and also duty cycle skew.
The user has a choice of using either TTL or PECL (ECL referenced to
+5.0V) for the input clock. TTL clocks are typically used in present MPU
systems. However, as clock speeds increase to 50MHz and beyond, the
inherent superiority of ECL (particularly differential ECL) as a means of
clock signal distribution becomes increasingly evident. The H642 also
uses differential PECL internally to achieve its superior skew
characteristic.
68030/040
PECL–TTL CLOCK
DRIVER
The H642 includes divide–by–two and divide–by–four stages, both to
achieve the necessary duty cycle skew and to generate MPU clocks as
required. A typical 50MHz processor application would use an input clock
running at 100MHz, thus obtaining output clocks at 50MHz and 25MHz
(see Logic Diagram).
The 10H version is compatible with MECL 10H ECL logic levels,
while the 100H version is compatible with 100K levels (referenced to
+5.0V).
11
26
4
5
• Generates Clocks for 68030/040
• Meets 030/040 Skew Requirements
• TTL or PECL Input Clock
FN SUFFIX
PLASTIC PACKAGE
CASE 776–02
• Extra TTL and PECL Power/Ground Pins
• Asynchronous Reset
• Single +5.0V Supply
Function
Reset(R):
LOW on RESET forces all Q outputs LOW.
Select(SEL): LOW selects the ECL input source (DE/DE).
HIGH selects the TTL input source (DT).
The H642 also contains circuitry to force a stable input state of the ECL differential input pair, should both sides be left open. In
this Case, the DE side of the input is pulled LOW, and DE goes HIGH.
Power Up:
The device is designed to have positive edges of the ÷2 and ÷4 outputs synchronized at Power Up.
VT
25
VT
24
Q1
23
GT
22
GT
21
Q0
20
VT
19
18
17
16
15
Q2
GT
GT
Q3
VT
VT
Q4
26
27
28
V
BB
DE
DE
VE
Pinout: 28–Lead PLCC
1
2
(Top View)
14
13
12
R
3
4
GE
DT
5
6
7
8
9
10
11
Q5
GT
GT
Q6
Q7
VT
SEL
9/96
Motorola, Inc. 1996
REV 4
MC10H642 MC100H642
LOGIC DIAGRAM
TTL Outputs
Q7
Q6
Q5
TTL/ECL Clock Inputs
V
BB
DE
Q4
Q3
÷4
DE
DT
MUX
SEL
Q2
TTL Control Inputs
Q1
Q0
÷2
R
PIN NAMES
Pin
Symbol
Description
Pin
Symbol
Description
ECL V (+5.0V)
ECL Signal Input (Non–Inverting)
ECL Signal Input (Inverting)
81
82
83
84
85
86
87
88
89
10
11
12
13
14
Q3
VT
VT
Q4
Q5
GT
GT
Q6
Q7
VT
SEL
DT
GE
R
Signal Output (TTL)**
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VE
DE
DE
CC
TTL V
TTL V
(+5.0V)
(+5.0V)
CC
CC
Signal Output (TTL)**
Signal Output (TTL)**
TTL Ground (0V)
V
BB
V
Reference Output
BB
TTL V
VT
Q0
GT
GT
Q1
VT
VT
Q2
GT
GT
(+5.0V)
CC
Signal Output (TTL)*
TTL Ground (0V)
TTL Ground (0V)
Signal Output (TTL)**
Signal Output (TTL)**
TTL Ground (0V)
Signal Output (TTL)*
TTL V
(+5.0V)
TTL V
TTL V
(+5.0V)
(+5.0V)
CC
CC
CC
Input Select (TTL)
TTL Signal Input
ECL Ground (0V)
Reset (TTL)
Signal Output (TTL)**
TTL Ground (0V)
TTL Ground (0V)
**Divide by 2
**Divide by 4
MOTOROLA
2–2
MC10H642 MC100H642
AC CHARACTERISTICS (VT = VE = 5.0V ±5%)
T
A
= 0°C
T
A
= 25°C
T = 85°C
A
Symbol
Characteristic
Propagation Delay
Min
Max
Min
Max
Min
Max
Unit
Condition
CL = 25pF
t
Q2–Q7
C ECL
C TTL
ns
PLH
D to Output
4.70
4.70
5.70
5.70
4.75
4.75
5.75
5.75
4.60
4.50
5.60
5.50
tskpp
Part–to–Part Skew
Within–Device Skew
1.0
0.5
1.0
0.5
1.0
0.5
ns
ns
ns
tskwd*
t
Propagation Delay
D to Output
Q0, Q1
C ECL
C TTL
CL = 25pF
CL = 25pF
PLH
4.30
4.30
5.30
5.30
4.50
4.50
5.50
5.50
4.25
4.25
5.25
5.25
tskpp
tskwd
Part–to–Part Skew
All
Outputs
2.0
2.0
2.0
ns
Within–Device Skew
1.0
6.3
1.0
6.0
1.0
6.5
ns
ns
CL = 25pF
CL = 25pF
t
Propagation Delay
R to Output
All
Outputs
4.3
4.0
4.5
PD
t
t
Output Rise/Fall Time
0.8 V to 2.0 V
All
Outputs
2.5
2.5
2.5
2.5
2.5
2.5
ns
CL = 25pF
CL = 25pF
R
F
f
**
Maximum Input Frequency
Reset Pulse Width
100
1.5
100
1.5
100
1.5
MHz
ns
MAX
RPW
RRT
Reset Recovery Time
1.25
1.25
1.25
ns
* Within–Device Skew defined as identical transactions on similar paths through a device.
** NOTE: MAX Frequency is 135MHz.
10H PECL CHARACTERISTICS (VT = VE = 5.0V ±5%)
T
A
= 0°C
T
A
= 25°C
T = 85°C
A
Symbol
Characteristic
Input HIGH Current
Min
Max
Min
Max
Min
Max
Unit
Condition
I
IH
I
IL
225
175
175
µA
Input LOW Current
0.5
0.5
0.5
* NOTE
V
V
Input HIGH Voltage
Input LOW Voltage
3.83
3.05
4.16
3.52
3.87
3.05
4.19
3.52
3.94
3.05
4.28
3.555
V
V
V = 5.0V
EE
IH
IL
* NOTE
V
BB
Output Reference Voltage
3.62
3.73
3.65
3.75
3.69
3.81
100H PECL CHARACTERISTICS (VT = VE = 5.0V ±5%)
T
A
= 0°C
T
A
= 25°C
T = 85°C
A
Symbol
Characteristic
Input HIGH Current
Min
Max
Min
Max
Min
Max
Unit
Condition
I
IH
I
IL
225
175
175
µA
Input LOW Current
0.5
0.5
0.5
* NOTE
V
IH
V
IL
Input HIGH Voltage
Input LOW Voltage
3.835
3.190
4.120
3.525
3.835
3.190
4.120
3.525
3.835
3.190
4.120
3.525
V
V = 5.0V
EE
* NOTE
V
BB
Output Reference Voltage
3.620
3.740
3.620
3.740
3.620
3.740
V
*NOTE: PECL LEVELS are referenced to V
and will vary 1:1 with the power supply. The VALUES shown are for V
= 5.0V.
CC
CC
2–3
MOTOROLA
MC10H642 MC100H642
10H/100H DC CHARACTERISTICS (VT = VE = 5.0V ±5%)
T
A
= 0°C
T
A
= 25°C
T = 85°C
A
Symbol
Characteristic
Power Supply Current
Min
Max
Min
Max
Min
Max
Unit
mA
mA
mA
Condition
VE Pin
I
I
I
PECL
TTL
57
30
30
57
30
30
57
30
30
EE
Total All VT Pins
CCH
CCL
10H/100H TTL DC CHARACTERISTICS (VT = VE = 5.0V ±5%)
T
A
= 0°C
T
A
= 25°C
T = 85°C
A
Symbol
Characteristic
Input HIGH Voltage
Min
Max
Min
Max
Min
Max
Unit
Condition
V
IH
V
IL
2.0
2.0
2.0
V
Input LOW Voltage
0.8
0.8
0.8
I
IH
Input HIGH Current
20
100
20
100
20
100
µA
V
IN
V
IN
= 2.7V
= 7.0V
I
Input LOW Current
–0.6
–0.6
–0.6
mA
V
V
= 0.5V
IL
IN
V
Output HIGH Voltage
2.5
2.0
2.5
2.0
2.5
2.0
I
I
= –3.0mA
= –15mA
OH
OH
OH
V
V
Output LOW Voltage
0.5
0.5
0.5
V
V
I
= 24mA
OL
OL
Input Clamp Voltage
–1.2
–225
–1.2
–225
–1.2
–225
I = –18mA
IN
IK
I
Output Short Circuit Current
–100
–100
–100
mA
V
= 0V
OS
OUT
10/100H642
DUTY CYCLE CONTROL
To maintain a duty cycle of ±5% at 50 MHz, limit the load capacitance and/or power supply variation as shown in Figures 1 and 2.
Fora±2.5%dutycyclelimit, seeFigures3and4. Figures5and6showdutycyclevariationwithtemperature. Figure7showstypical
TPD versus load. Figure 8 shows reset recovery time. Figure 9 shows output states after power up.
Best duty cycle control is obtained with a single µP load and minimum line length.
MOTOROLA
2–4
MC10H642 MC100H642
11
10
9
11
10
9
4.75
5.00
5.25
4.75
5.00
5.25
0
10
20
30
40
50
60
0
10
20
30
40
50
60
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 1. MC10H642 Positive PW versus Load
Figure 2. MC10H642 Negative PW versus
Load
@ ±5% V , T = 25°C
CC
A
@ ±5% V , T = 25°C
CC
A
10.8
10.6
10.4
10.2
10.0
9.8
10.6
10.4
10.2
10.0
9.8
4.875
5.00
4.875
5.00
5.125
5.125
9.6
9.6
9.4
9.4
9.2
0
10
20
30
40
50
60
0
10
20
30
40
50
60
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 4. MC10H642 Negative PW versus Load
Figure 3. MC10H642 Positive PW versus Load
@ ±2.5% V , T = 25°C
@ ±2.5% V , T = 25°C
CC
A
CC
A
10.5
10.3
10.1
9.9
10.4
10.2
10.0
9.8
0 pF
0 pF
25 pF
50 pF
25 pF
50 pF
9.7
9.6
9.5
9.4
0
20
40
60
80
100
0
20
40
60
80
100
TEMPERATURE (
°C)
TEMPERATURE (°C)
Figure 5. MC10H642 Positive PW versus Temperature,
= 5.0V
Figure 6. MC10H642 Negative PW versus
Temperature, V = 5.0V
V
CC
CC
2–5
MOTOROLA
MC10H642 MC100H642
6.2
6.0
5.8
5.6
5.4
5.2
4.75
5.00
5.25
0
10
20
30
40
50
60
CAPACITIVE (pF)
Figure 7. MC10H642 + Tpd versus Load, V
(Overshoot at 50 MHz with no load makes graph non linear)
±5%, T = 25°C
A
CC
DT
RESET, R
R
t
rec
R
t
pw
Q0
Q2
Q1
Q7
MC10/100H642
Figure 8. Clock Phase and Reset Recovery Time After Reset Pulse
MC10/100H642
D
in
Q0.Q1
Q4 & Q5
Q2
Q7
After Power Up
Figure 9. Outputs Q2
Q7 will Synchronize with Pos Edges of D & Q0
in
Q1
MOTOROLA
2–6
MC10H642 MC100H642
SWITCHING CIRCUIT AND WAVEFORMS
Switching Circuit PECL:
PECL
V
EE
V
& V
CCO
CC
TTL
USE 0.1
µF CAPACITORS
FOR DECOUPLING.
+7 V
OPEN
50
Ω COAX
DEVICE
UNDER
TEST
IN
OUT
ALL
OTHERS
PULSE
GENERATOR
450
Ω
t
, t
PZL PLZ
R1
OC
500
Ω
DEVICE
UNDER
TEST
R2
50 pF
500
Ω
CH A
CH B
USE OSCILLOSCOPE
INTERNAL 50 LOAD
FOR TERMINATION.
Ω
OSCILLOSCOPE
WAVEFORMS: Rise and Fall Times
PECL/TTL
Propagation Delay — Single Ended
PECL/TTL
50%/1.5 V
V
in
80%/2.0 V
20%/0.8 V
V
out
T
T
pd––
pd++
50%/1.5 V
T
T
fall
rise
V
out
2–7
MOTOROLA
MC10H642 MC100H642
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776–02
ISSUE D
M
S
S
0.007 (0.180)
T
L–M
N
B
Y BRK
D
–N–
M
S
S
0.007 (0.180)
T
L–M
N
U
Z
–M–
–L–
W
D
S
S
S
0.010 (0.250)
T
L–M
N
X
G1
V
28
1
VIEW D–D
M
S
S
S
A
0.007 (0.180)
0.007 (0.180)
T
L–M
L–M
N
M
S
S
0.007 (0.180)
T
L–M
N
H
Z
M
S
T
N
R
K1
C
E
0.004 (0.100)
SEATING
PLANE
G
K
–T–
VIEW S
J
M
S
S
0.007 (0.180)
T
L–M
N
F
G1
S
S
S
0.010 (0.250)
T
L–M
N
VIEW S
NOTES:
INCHES
MILLIMETERS
1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALLOWABLE MOLD FLASH IS
0.010 (0.250) PER SIDE.
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
MIN
MAX
0.495
0.495
0.180
0.110
0.019
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
0.485
0.485
0.165
0.090
0.013
2.29
2.79
0.33
0.48
0.050 BSC
1.27 BSC
4. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
–––
0.032
–––
–––
0.456
0.456
0.048
0.048
0.056
0.020
10
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
–––
0.81
–––
–––
11.58
11.58
1.21
1.21
1.42
0.50
10
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
2
2
0.410
0.040
0.430
–––
10.42
1.02
10.92
–––
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
MOTOROLA
2–8
MC10H642 MC100H642
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
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MC10H642/D
◊
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