MC14018BCL [MOTOROLA]
Presettable Divide-By-N Counter; 预置分频N计数器
| 型号： | MC14018BCL |
| 厂家： | 
MOTOROLA |
| 描述： | Presettable Divide-By-N Counter |
| 文件： | 总6页 (文件大小：215K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14018B contains five Johnson counter stages which are
asynchronously presettable and resettable. The counters are synchronous,
and increment on the positive going edge of the clock.
P SUFFIX
PLASTIC
CASE 648
Presetting is accomplished by a logic 1 on the preset enable input. Data on
the Jam inputs will then be transferred to their respective Q outputs
(inverted). A logic 1 on the reset input will cause all Q outputs to go to a logic
1 state.
Division by any number from 2 to 10 can be accomplished by connecting
appropriate Q outputs to the data input, as shown in the Function Selection
table. Anti–lock gating is included in the MC14018B to assure proper
counting sequence.
D SUFFIX
SOIC
CASE 751B
•
•
•
Fully Static Operation
Schmitt Trigger on Clock Input
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4018B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
•
T
= – 55° to 125°C for all packages.
A
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
FUNCTIONAL TRUTH TABLE
V
DD
– 0.5 to + 18.0
Preset
Jam
V , V
in out
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
Clock Reset Enable Input
Qn
l , l
Input or Output Current (DC or Transient),
per Pin
± 10
mA
in out
0
0
0
0
1
0
0
1
1
X
X
X
0
1
X
Qn
D *
n
1
0
1
X
X
X
P
D
Power Dissipation, per Package†
Storage Temperature
500
mW
C
T
stg
– 65 to + 150
260
* D is the Data input for that stage. Stage 1
n
has Data brought out to Pin 1.
T
L
Lead Temperature (8–Second Soldering)
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
PIN ASSIGNMENT
D
1
2
16
15
V
DD
in
JAM 1
R
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
JAM 2
Q2
3
4
5
6
7
8
14
13
12
11
10
9
C
Q5
voltages to this high-impedance circuit. For proper operation, V and
in
V
out
should be constrained to the range V
SS
≤ (V or V ) ≤ V
in out DD
.
Q1
JAM 5
Q4
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either V or V ). Unused outputs must be left open.
Q3
SS DD
JAM 3
PE
V
JAM 4
SS
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
(V = 0.5 or 4.5 Vdc) “1” Level
O
V
IH
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
Vdc
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (0.3 µA/kHz) f + I
= (0.7 µA/kHz) f + I
= (1.0 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
– V ) in volts, f in kHz is input frequency, and k = 0.001.
SS
T
L
DD
MC14018B
82
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
All Types
Typ #
V
Vdc
DD
Characteristic
Output Rise and Fall Time
Symbol
, t
Unit
Min
Max
t
TLH THL
ns
t
t
t
, t
= (1.35 ns/pF) C + 32 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH THL
L
, t
= (0.6 ns/pF) C + 20 ns
L
TLH THL
, t
TLH THL
= (0.4 ns/pF) C + 20 ns
L
Propagation Delay Time
Clock to Q
t
t
,
ns
PLH
PHL
t
t
t
, t
= (0.90 ns/pF) C + 265 ns
= (0.36 ns/pF) C + 102 ns
= (0.26 ns/pF) C + 72 ns
L
5.0
10
15
—
—
—
310
120
85
620
240
170
PLH PHL
L
L
, t
PLH PHL
, t
PLH PHL
Reset to Q
ns
ns
ns
t
t
t
= (0.90 ns/pF) C + 325 ns
= (0.36 ns/pF) C + 132 ns
= (0.26 ns/pF) C + 81 ns
5.0
10
15
—
—
—
370
150
100
740
300
200
PLH
PLH
PLH
L
L
L
Preset Enable to Q
t
t
t
, t
= (0.90 ns/pF) C + 325 ns
= (0.36 ns/pF) C + 132 ns
= (0.26 ns/pF) C + 81 ns
L
5.0
10
15
—
—
—
370
150
100
740
300
200
PLH PHL
L
L
, t
PLH PHL
, t
PLH PHL
Setup Time
Data (Pin 1) to Clock
t
su
5.0
10
15
200
100
80
0
0
0
—
—
—
Jam Inputs to Preset Enable
5.0
10
15
200
100
80
0
0
0
—
—
—
ns
ns
Data (Jam Inputs)–to–Preset
Enable Hold Time
t
h
5.0
10
15
540
500
480
270
250
240
—
—
—
Clock Pulse Width
t
t
5.0
10
15
400
200
160
200
100
80
—
—
—
ns
WH
WH
Reset or Preset Enable
Pulse Width
5.0
10
15
290
130
110
145
65
55
—
—
—
ns
Clock Rise and Fall Time
Clock Pulse Frequency
t
, t
5.0
10
15
ns
TLH THL
No Limit
f
cl
5.0
10
15
—
—
—
2.5
6.5
8.0
1.25
3.25
4.0
MHz
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns
20 ns
V
V
DD
90%
50%
10%
ANY INPUT
SS
t
t
PHL
PLH
V
V
OH
90%
50%
10%
ANY OUTPUT
OL
t
t
THL
TLH
Figure 1. Switching Time Waveforms
MOTOROLA CMOS LOGIC DATA
MC14018B
83
1
CLOCK
0
1
0
1
0
1
RESET
PRESET ENABLE
JAM 1
JAM 2
0
1
0
1
JAM 3
DON’T CARE
UNTIL PRESET ENABLE
GOES HIGH
TIMING DIAGRAM
(Q5 Connected to Data Input)
0
1
JAM 4
JAM 5
Q1
0
1
0
1
0
1
Q2
Q3
Q4
Q5
0
1
0
1
0
1
0
FUNCTION SELECTION
Connect
Counter
Mode
Data Input
(Pin 1) to:
Comments
Divide by 10
Divide by 8
Divide by 6
Divide by 4
Divide by 2
Q5
Q4
Q3
Q2
Q1
No external
components needed.
Divide by 9
Divide by 7
Divide by 5
Divide by 3
Q5 • Q4
Q4 • Q3
Q3 • Q2
Q2 • Q1
Gate package needed
to provide AND
function. Counter
Skips all 1’s state
LOGIC DIAGRAM
JAM 1
2
JAM 2
JAM 3
7
JAM 4
9
JAM 5
12
3
CLOCK
SHAPER
CLOCK 14
S
S
S
S
S
DATA
1
D
C
Q
P
D
C
Q
D
C
Q
P
D
C
Q
P
D
C
Q
P
Q
P
R
R
R
R
R
RESET 15
PRESET ENABLE 10
V
V
= PIN 16
= PIN 8
DD
SS
5
4
6
11
13
Q1
Q2
Q3
Q4
Q5
MC14018B
84
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J 16 PL
G
0.300 BSC
7.62 BSC
M
S
0.25 (0.010)
T B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MOTOROLA CMOS LOGIC DATA
MC14018B
85
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
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MC14018B/D
◊
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