MC14512BCPDS [MOTOROLA]
4000/14000/40000 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16, 648-06;
| 型号： | MC14512BCPDS |
| 厂家： | 
MOTOROLA |
| 描述： | 4000/14000/40000 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16, 648-06 |
| 文件： | 总6页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14512B is an 8–channel data selector constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. This data selector finds primary application in signal
multiplexing functions. It may also be used for data routing, digital signal
switching, signal gating, and number sequence generation.
P SUFFIX
PLASTIC
CASE 648
•
•
•
•
•
Diode Protection on All Inputs
Single Supply Operation
3–State Output (Logic “1”, Logic “0”, High Impedance)
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
D SUFFIX
SOIC
CASE 751B
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
ORDERING INFORMATION
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
V
DD
– 0.5 to + 18.0
V , V
in out
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
T
= – 55° to 125°C for all packages.
A
I , I
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
PIN ASSIGNMENT
T
stg
– 65 to + 150
260
X0
X1
X2
X3
X4
X5
X6
1
2
16
15
V
DD
T
Lead Temperature (8–Second Soldering)
C
L
DIS
Z
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
3
4
5
6
7
8
14
13
12
11
10
9
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
C
B
TRUTH TABLE
A
C
B
A
Inhibit
Disable
Z
INH
X7
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
X0
X1
X2
X3
V
SS
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
X4
X5
X6
X7
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
X
X
X
X
X
X
1
X
0
1
0
High
Impedance
operation, V and V
should be constrained
in
out
to the range V
(V or V
in out
)
V
DD
.
SS
X = Don’t Care
Unused inputs must always be tied to an
appropriatelogic voltage level (e.g., either V
SS
or V ). Unused outputs must be left open.
DD
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
O
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (0.8 µA/kHz) f + I
= (1.6 µA/kHz) f + I
= (2.4 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
Three–State Leakage Current
I
15
—
± 0.1
—
± 0.0001
± 0.1
—
± 3.0
µAdc
TL
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
DD
– V ) in volts, f in kHz is input frequency, and k = 0.001.
SS
T
L
MOTOROLA CMOS LOGIC DATA
MC14512B
371
SWITCHING CHARACTERISTICS (C = 50 pF, T = 25 C, See Figure 1)
L
A
All Types
Characteristic
Output Rise and Fall Time
Symbol
V
Typ #
Max
Unit
DD
t
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
5.0
10
15
100
50
40
200
100
80
TLH THL
L
THL
, t
= (0.75 ns/pF) C + 12.5 ns
L
TLH THL
, t
TLH THL
= (0.55 ns/pF) C + 9.5 ns
L
Propagation Delay Time (Figure 2)
Inhibit, Control, or Data to Z
t
ns
ns
ns
PLH
5.0
10
15
330
125
85
650
250
170
Propagation Delay Time (Figure 2)
Inhibit, Control, or Data to Z
t
PHL
5.0
10
15
330
125
85
650
250
170
3–State Output Delay Times (Figure 3)
“1” or “0” to High Z, and
t
t
, t
, t
,
5.0
10
15
60
35
30
150
100
75
PHZ PLZ
PZH PZL
High Z to “1” or “0”
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
I
V
DD
D
DISABLE
INHIBIT
Z
A
B
C
C
L
X0
X1
X2
X3
X4
X5
X6
X7
PULSE
GENERATOR
V
50%
50%
DUTY
in
CYCLE
V
SS
Figure 1. Power Dissipation Test Circuit and Waveform
V
DD
20 ns
20 ns
V
DD
SS
OH
OL
90%
50%
DATA
DISABLE
INHIBIT
A
10%
V
V
V
Z
t
t
PLH
PHL
90%
C
B
L
50%
Z
10%
C
X0
X1
X2
t
t
TLH
THL
PULSE
GENERATOR
TEST CONDITIONS:
INHIBIT = V
SS
X3
X4
A, B, C = V
SS
20 ns
INHIBIT,
A, B, OR C
20 ns
X5
X6
X7
V
V
V
V
DD
SS
OH
OL
90%
50%
10%
t
t
PLH
PHL
V
90%
50%
10%
Parameter
Inhibit to Z
A, B, C to Z
Test Conditions
SS
Z
A, B, C = V , X = V
SS DD
O
Inh = V , X = V
SS DD
t
t
TLH
O
THL
Figure 2. AC Test Circuit and Waveforms
MC14512B
372
MOTOROLA CMOS LOGIC DATA
V
DD
20 ns
PULSE
GENERATOR
20 ns
V
V
DD
V
DD
90%
50%
10%
DISABLE
V
INHIBIT
A
Z
DD
DISABLE
INPUT
C
SS
L
S1
S2
V
B
C
X0
t
1 k
PZL
t
S3
S4
PLZ
V
OH
OL
90%
≈
2.5 V @ V
= 5 V,
10 V, AND 15 V
10%
DD
OUTPUT
OUTPUT
V
X1
X2
X3
t
t
PZH
PHZ
≈
2 V @ V
6 V @ V
10 V @ V
= 5 V
= 10 V
= 15 V
DD
DD
DD
V
SS
≈
≈
OH
90%
X4
X5
10%
V
V
SS
OL
Switch Positions for 3–State Test
X6
X7
Test
S1
S2
S3
S4
t
t
t
Open
Closed
Closed
Open
Closed Closed
Open
Closed
Closed
Open
PHZ
PLZ
PZL
V
SS
Open
Open
Open
Open
t
Closed Closed
PZH
Figure 3. 3–State AC Test Circuit and Waveform
LOGIC DIAGRAM
13
12
C
B
15
11
1
DISABLE
10
A
DATA
BUS
X0
SELECTED
DEVICE
INHIBIT
2
3
4
5
6
7
V
I
OD
DD
X1
X2
MC14512B
MC14512B
MC14512B
I
L
LOAD
14
Z
I
TL
TL
X3
X4
I
X5
X6
X7
V
SS
9
1
1
OUT
IN
IN
OUT
2
2
TRANSMISSION
GATE
3–STATE MODE OF OPERATION
Output terminals of several MC14512B 8–Bit Data Selec-
tors can be connected to a single date bus as shown. One
MC14512B is selected by the 3–state control, and the re-
maining devices are disabled into a high–impedance “off”
state. The number of 8–bit data selectors, N, that may be
connected to a bus line is determined from the output drive
and the load current, I , required to drive the bus line (includ-
L
ing fanout to other device inputs), and can be calculated by:
I
– I
L
OD
I
N =
+ 1
TL
N must be calculated for both high and low logic state of the
bus line.
current, I
, 3–state or disable output leakage current, I ,
OD
TL
MOTOROLA CMOS LOGIC DATA
MC14512B
373
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J
16 PL
0.25 (0.010)
G
0.300 BSC
7.62 BSC
M
S
T
B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MC14512B
374
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
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are registered
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MC14512B/D
◊
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