MC14558BCP [MOTOROLA]
BCD-to-Seven Segment Decoder; BCD到七段解码器
| 型号： | MC14558BCP |
| 厂家： | 
MOTOROLA |
| 描述： | BCD-to-Seven Segment Decoder |
| 文件： | 总7页 (文件大小：220K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14558B decodes 4–bit binary coded decimal data dependent on
the state of auxiliary inputs, Enable and RBI, and provides an active–high
seven–segment output for a display driver.
An auxiliary input truth table is shown, in addition to the BCD to
seven–segment truth table, to indicate the functions available with the two
auxiliary inputs.
P SUFFIX
PLASTIC
CASE 648
Leading Zero blanking is easily obtained with an external flip–flop in time
division multiplexed systems displaying most significant decade first.
D SUFFIX
SOIC
CASE 751B
•
•
•
•
•
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Segment Blanking for All Illegal Input Combinations
Lamp Test Function
Capability for Suppression of Non–Significant Zeros
Lamp Intensity Function
Capable of Driving Two Low–power TTL Loads. One Low–power
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
T
A
= – 55° to 125°C for all packages.
MAXIMUM RATINGS* (Voltages referenced to V
)
SS
PIN ASSIGNMENT
Rating
DC Supply Voltage
Symbol
Value
Unit
V
B
C
1
2
16
15
V
DD
V
DD
– 0.5 to + 18
f
Input Voltage, All Inputs
V
in
– 0.5 to V
DD
+ 0.5
V
a
ENABLE
3
4
5
6
7
8
14
13
12
11
10
9
g
a
b
c
d
e
DC Input Voltage, per Pin
I
in
± 10
mAdc
C
f
g
b
RBO
RBI
D
Operating Temperature Range
Power Dissipation, per Package†
Storage Temperature Range
T
– 55 to + 125
500
A
e
c
P
D
mW
C
d
T
stg
– 65 to + 150
A
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
V
SS
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
DISPLAY
AUXILIARY INPUT TRUTH TABLE
BCD
0
1
2
3
4
5
6
7
8
9
Enable
Pin 3
RBI
Pin 5
RBO
Pin 4
Input
Code
Function Performed
Lamp Test
0
0
1
1
0
X
X
X
0
1
1
0
1
0
Blank Segments
Display Zero
1
0
1
0
Blank Segments
1–9 Displayed
1
1 – 9
X = Don’t Care
RBI = Ripple Blanking Input
RBO = Ripple Blanking Output
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
O
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
pF
in
Input Capacitance
Quiescent Current
C
—
5.0
7.5
—
in
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
DD
(Per Package) V = 0 or V
in DD
I
= 0 µA
out
Total Supply Current**†
(Dynamic plus Quiescent,
Per Package)
I
T
5.0
10
15
I
T
I
T
I
T
= (1.2 µA/kHz) f + I
= (2.4 µA/kHz) f + I
= (3.6 µA/kHz) f + I
µAdc
DD
DD
DD
(C = 50 pF on all outputs, all
L
buffers switching)
#Noise immunity specified for worst–case input combination.
Noise Margin for both “1” and “0” level = 1.0 V min @ V
= 2.0 V min @ V
= 5.0 V
= 10 V
= 15 V
DD
DD
DD
= 2.5 V min @ V
†To calculate total supply current at loads other than 50 pF:
–3
I (C ) = I (50 pF) + 3.5 x 10 (C – 50) V
DD
f
T
L
T
L
where: I is in µA (per package), C in pF, V
in V, and f in kHz is input frequency.
T
L
DD
**The formulas given are for the typical characteristics only at 25 C.
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however,
it is advised that normal precautions be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation it is recommended that V and V
be constrained to the range V
≤ (V or
in out
SS
in
V
) ≤ V .
out DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
SS
or V ).
DD
MC14558B
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C; see Figure 1)
L
A
Characteristic
Symbol
V
DD
Min
Typ
Max
Unit
Output Rise Time
t
ns
TLH
THL
PLH
PHL
t
t
t
= (3.0 ns/pF) C + 30 ns
= (1.5 ns/pF) C + 15 ns
= (1.1 ns/pF) C + 10 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH
TLH
TLH
L
L
L
Output Fall Time
t
ns
ns
ns
t
t
t
= (1.5 ns/pF) C + 25 ns
= (0.75 ns/pF) C + 12.5 ns
= (0.55 ns/pF) C + 9.5 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
THL
THL
THL
L
L
L
Propagation Delay Time
t
t
t
t
t
= (1.7 ns/pF) C + 495 ns
= (0.66 ns/pF) C + 187 ns
= (0.5 ns/pF) C + 120 ns
5.0
10
15
—
—
—
580
220
145
1160
440
230
PLH
PLH
PLH
L
L
L
Propagation Delay Time
t
t
t
= (1.7 ns/pF) C + 695 ns
= (0.66 ns/pF) C + 242 ns
= (0.5 ns/pF) C + 160 ns
5.0
10
15
—
—
780
275
185
1560
550
370
PHL
PHL
PHL
L
L
L
* The formulae given are for the typical characteristics only.
TRUTH TABLE
Inputs
Outputs*
e
Enable
Pin 3
RBI
D
C
B
A
a
b
c
d
f
g
RBO
Pin 4
Pin 5 Pin 6 Pin 2 Pin 1 Pin 7 Pin 13 Pin 12 Pin 11 Pin 10
Pin 9
Pin 15 Pin 14
Display
1
1
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
1
1
0
1
1
1
0
0
1
1
1
0
0
1
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
1
1
0
0
1
1
1
0
1
0
0
1
1
1
1
1
0
1
1
1
1
0
0
0
1
0
1
1
1
1
1
1
1
1
1
1
1
0
0
X
0
0
1
1
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
Blank
Blank
X
X
X
X
X
X
X
X
* All non–valid BCD input codes produce a blank display.
X = Don’t Care
20 ns
20 ns
90%
ANY INPUT
50%
10%
t
t
PLH
PHL
90%
50%
ANY OUTPUT
10%
t
t
THL
TLH
Figure 1. Signal Waveforms
MOTOROLA CMOS LOGIC DATA
MC14558B
3
LOGIC DIAGRAM
MC14558B
4
MOTOROLA CMOS LOGIC DATA
TYPICAL APPLICATIONS
N4
En
N3
En
N2
N1
N–1
N–2
N–3
V
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
SS
En
En
En
En
En
V
SS
LAMP TEST
Figure 2. Leading and Trailing Zero
Suppression with Lamp Test
N4
N3
N2
N1
N–1
N–2
N–3
V
DD
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
En
En
En
En
En
En
En
BLANKING
Figure 3. Leading and Trailing Zero Suppression
with PWM Intensity Blanking and No Lamp Test
N4
N3
En
N2
En
N1
En
N–1
N–2
N–3
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
RBI
RBO
En
En
En
En
BLANKING
LAMP TEST
Figure 4. Zero Suppression with Lamp Test
and Intensity Blanking
MOTOROLA CMOS LOGIC DATA
MC14558B
5
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J 16 PL
G
0.300 BSC
7.62 BSC
M
S
0.25 (0.010)
T B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MC14558B
6
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
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are registered
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MC14558B/D
◊
相关型号：
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Seven Segment Decoder/Driver, 4000/14000/40000 Series, True Output, CMOS, PDIP16, 648-08
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