MC14561BD [MOTOROLA]
9’s Complementer; 9的补码
| 型号： | MC14561BD |
| 厂家： | 
MOTOROLA |
| 描述： | 9’s Complementer |
| 文件： | 总8页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 632
The MC14561B 9’s complementer is a companion to the MC14560B
NBCD adder to allow BCD subtraction. A BCD number (8–4–2–1 code) is
0
1
2
3
applied to the inputs (A1 = 2 , A2 = 2 , A3 = 2 , A4 = 2 ). If the complement
control (Comp) is low, the BCD number appears at the outputs unmodified.
The complement disable (Comp) allows the complement control to be gated,
or an inverted control signal to be used. If the complement input is high and
the disable input low, the 9’s complement of the number is displayed at the
outputs. The zero control (Z), when high, forces the outputs low regardless of
the state of the other inputs.
When the MC14561B is used to perform BCD subtraction in conjunction
with the MC14560B NBCD adder, the complement control becomes an
add/subtract control.
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
•
•
•
All Inputs Buffered
ORDERING INFORMATION
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
T
A
= – 55° to 125°C for all packages.
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
PIN ASSIGNMENT
V
DD
– 0.5 to + 18.0
V , V
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
A1
A2
A3
A4
1
2
3
4
14
13
12
11
V
DD
in out
I , I
F1
F2
F3
Input or Output Current (DC or Transient),
per Pin
± 10
mA
in out
P
D
Power Dissipation, per Package†
Storage Temperature
500
– 65 to + 150
260
mW
C
T
stg
COMP
COMP
5
6
10
9
F4
Z
T
L
Lead Temperature (8–Second Soldering)
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
V
7
8
NC
SS
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
NC = NO CONNECTION
TRUTH TABLE
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
Z
0
0
Comp Comp F1
F2
F3
F4
Mode
0
0
0
1
A1
A2
A3
A4
Straight–through
0
0
1
1
1
1
0
operation, V and V
to the range V
SS
Unused inputs must always be tied to an
should be constrained
in
out
(V or V
)
V
DD
.
A1
0
A2 A2A3 + A2A3 A2A3A4
Complement
Zero
in out
X
X
0
0
0
appropriate logic voltage level (e.g., either V
SS
or V ). Unused outputs must be left open.
X = Don’t Care.
DD
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
O
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (1.5 µA/kHz) f + I
= (3.0 µA/kHz) f + I
= (4.5 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
– V ) in volts, f in kHz is input frequency, and k = 0.004.
SS
T
L
DD
MC14561B
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
Characteristic
Symbol
V
DD
Min
Typ #
Max
Unit
Output Rise and Fall Time
t
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
= (0.75 ns/pF) C + 12.5 ns
L
= (0.55 ns/pF) C + 9.5 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH THL
L
THL
, t
TLH THL
, t
TLH THL
L
Propagation Delay Time
t
t
,
ns
PLH
t
t
t
, t
= (1.7 ns/pF) C + 315 ns
= (0.66 ns/pF) C + 127 ns
L
= (0.5 ns/pF) C + 95 ns
5.0
10
15
—
—
—
400
160
120
1000
400
300
PLH PHL
L
PHL
, t
PLH PHL
, t
PLH PHL
L
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns
20 ns
V
V
V
V
DD
SS
OH
OL
90%
50%
10%
ANY INPUT
t
t
PHL
PLH
90%
50%
ANY OUTPUT
10%
t
t
THL
TLH
Figure 1. Switching Time Waveforms
MOTOROLA CMOS LOGIC DATA
MC14561B
3
LOGIC DIAGRAM
A1
1
F1
13
A2
2
F2
12
F3
11
A3
3
F4
10
A4
4
COMP
5
V
V
= PIN 14
= PIN 7
COMP
6
DD
SS
Z
9
TRUTH TABLE – COMPLEMENT MODE
(Z = 0, Comp = 1, Comp = 0)
Decimal
Equivalent
Input
Decimal
Equivalent
Output
Inputs
Outputs
A4
A3
A2
A1
F4
F3
F2
F1
0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
9
8
7
6
5
4
3
2
1
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
10
11
12
13
14
15
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
7
6
5
4
3
2
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
Illegal
BCD
Input
Codes
MC14561B
4
MOTOROLA CMOS LOGIC DATA
TYPICAL APPLICATIONS
One MC14560B and one MC14561B permit a BCD digit to
be added to or subtracted from a second digit, such as in
the typical configurations in Figures 2 and 3. A second
MC14561B permits either digit to be added to or subtracted
from the other, or either word to appear unmodified at the
output.
ADD/SUBTRACT
MC14561B
A1
F1
F2
F3
F4
MC14560B
A2
A1
C
S1
S2
A3
in
A1
A2
A3
A4
COMP
COMP
Z
UNITS
ZERO
A4
B1
S3
S4
B2
B3
B1
C
out
MC14561B
F1
A1
MC14560B
S1
in
A2
A10
C
F2
F3
A3
A1
A2
A3
A4
S2
COMP
COMP
Z
TENS
F4
S3
S4
A4
B1
B2
B3
B4
B10
C
out
TRUTH TABLE
Add/Subtract
0
Zero
Result
0
B plus A
0
1
B minus A
B
1
X
X = Don’t Care
Figure 2. Parallel Add/Subtract Circuit (10’s Complement)
MOTOROLA CMOS LOGIC DATA
MC14561B
5
TYPE D
FLIP–FLOP
D
C
Q
ADD/SUBTRACT
A REGISTER
10’s
MC14561B
A1
A2
A3
A4
F1
MC14560B
100’s
100’s
1’s
1’s
F2
C
in
S1
S2
S3
S4
A1
A2
A3
A4
B1
B2
B3
B4
COMP F3
COMP
RESULT
Z
F4
CLOCK
10’s
C
out
B REGISTER
Figure 3. Serial Add/Subtract Circuit
MC14561B
MOTOROLA CMOS LOGIC DATA
6
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
1
9
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
7
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.280
0.200
0.020
0.065
MIN
19.05
6.23
3.94
0.39
1.40
MAX
19.94
7.11
5.08
0.50
1.65
0.750
0.245
0.155
0.015
0.055
–T–
SEATING
PLANE
K
F
G
J
K
0.100 BSC
2.54 BSC
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
G
N
M
D 14 PL
0.25 (0.010)
J 14 PL
0.25 (0.010)
L
M
N
0.300 BSC
7.62 BSC
0
15
0
15
M
S
T
A
M
S
T
B
0.020
0.040
0.51
1.01
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
ISSUE L
14
8
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
1
7
4. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
C
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
0
10
0
10
0.015
0.039
0.39
1.01
H
G
D
M
MOTOROLA CMOS LOGIC DATA
MC14561B
7
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE F
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
–B–
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
DIM
A
B
C
D
F
G
J
K
M
P
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
0.25 (0.010)
T
B
A
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
R
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
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MC14561B/D
◊
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