MC14576CP [MOTOROLA]
ACF-II Evaluation Board Operating Manual; ACF - II评估板操作手册
| 型号： | MC14576CP |
| 厂家： | 
MOTOROLA |
| 描述： | ACF-II Evaluation Board Operating Manual |
| 文件： | 总8页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MC141622EVK/D
SEMICONDUCTOR TECHNICAL DATA
1. SUMMARY
The MC141622EVK is a development board for evaluation of the MC141622. In addition to the
MC141622, the MC141622EVK contains all the analog circuit that is necessary for buffering both the
input and output video signal and generation of the 4xfsc clock. By connecting an external signal source,
monitor, and power supply, it is possible to evaluate all the operating modes on the MC141622.
2. SPECIFICATION
Board Dimensions
Y/C Separation LSI
Video Input Amplifier
Video Output Amplifier
Clamp Circuit
100 mm (Length) x 150 mm (Width)
MC141622FU Mount
MC14577 2SC2002 Use
MC14576 Use
2SC2002 2SA953 Use
MC1378P Use
Clock Generator
Clock Buffer Amplifier
Analog Input/Output Interface
Digital Input/Output Interface
Action Mode
MC14576 Use
BNC Connector x3, S Terminal Output Mount
16 Pin Header Mount
MC141622 Supports All Operating Modes
MC7805CT Use
Regulator
Recommended Supply Voltage
Operating Temperature
Supply Current
+ 10 V
0 to 50°C
350 mA
REV 3
1/97
TN97012000
Motorola, Inc. 1997
3. BOARD OPERATION
3.1 ACF–II Operating Mode
AFC–II has four operating modes. Any one of these modes can be selected using the digital code input
to MODE 0 and MODE 1 using ROTARY SW. The function of each mode is as follows.
(1) Normal fsc Mode
This is the mode for usual Y/C separation. It separates Y/C from the video signal that is input to the A/D
converter.
The coring parameter of the vertical enhancer can be set up by the digital code that is input to C0 – C3
(block level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level parameter).
The clock is a 3.579545 MHz subcarrier input to the CLK connector; the built–in 4x PLL generates 4xfsc
clock.
(2) Normal 4xfsc Mode
This mode is used for Y/C separation. It separates Y/C from the video signal that is input to the A/D con-
verter.
The coring parameter of the vertical enhancer can be set up by the digital code that is input to C0 – C3
(block level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level parameter).
The clock is 14.31818 MHz which is a 4x subcarrier input to the CLK connector.
(3) Digital Input Comb Filter Mode
This mode uses the A/D converter, filter, and D/A converter as two independent blocks. The digital data
converted by the A/D converter is output on C0 – C7. Data input on D0 – D7 is processed by the ACF–II.
Filtering is performed by the algorithm of ACF–II and the Y/C video is output as analog signals from Y
out
and C . These two blocks can operate with input clock signals that have different frequencies or phases
out
and can be operated independently by using the CLK(AD) for the A/D converter, and the CLK input for
the D/A converter.
The clock is 14.31818 MHz which is a 4x subcarrier input to the CLK connector and the CLK(AD) con-
nector.
(4) Digital Output Comb Filter Mode
In addition to the normal Y/C analog outputs, the MC141622EVK can provide the Y/C signals as digital
luminance and chrominance signals. The digital luminance data is output on C0 – C7 and the digital
chrominance data is output on D0 – D7. This digital data can be modified by other digital processing.
MC141622EVK
2
MOTOROLA
The following table is the assignment for the operating mode.
MODE Switching Function
Mode
Normal fsc Mode
MODE1
MODE0
Rotary SW
L
L
L
H
L
0
1
2
3
Normal 4xfsc Mode
Digital Input Comb Filtering Mode
Digital Output Comb Filtering Mode
H
H
H
4. BK FUNCTION
By setting the BK pin (toggle SW1) to the H level, composite video is output on the Y
pin and the chro-
out
minance signal on the C
pin.
out
The following table is the function of the BK pin.
BK Function
BK Pin
Y
out
Pin
C
Pin
out
L
Luminance
Composite
Chrominance
Chrominance
H
4.1 Vertical Enhancer Function
By setting the VH pin (toggle SW2) to the L level, the vertical enhancer feature is enabled. The coring
parameter of the vertical enhancer can be set up every 1 LSB by the digital code that are input to
C0 – C3 (black level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level param-
eter.
The set up level of the coring parameter and characteristics are as follows.
Coring Characteristics
Vertical Enhancer Function
VH Pin
Vertical Enhancer
OUT
OUT
L
On
Off
WHITE LEVEL
(C4 – C7)
H
WHITE
(0 – 15 STEP)
IN
IN
Coring Parameter Set Up
BLACK
C7
C3
D7
C6
C2
D6
C5
C1
D5
C4
C0
D4
Level
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
0
1
2
3
OUT
OUT
H
L
L
L
L
H
H
H
H
L
L
H
H
L
H
L
4
5
6
7
IN
IN
BLACK LEVEL
(C0 – C3)
(0 – 16 STEP)
NOISE LEVEL
(D4 – D7)
(0 – 15 STEP)
H
H
H
H
H
L
L
L
L
L
L
H
H
L
H
L
8
9
A
B
H
H
H
H
H
H
H
H
H
L
L
H
H
L
H
L
C
D
E
F
H
MC141622EVK
3
MOTOROLA
4.2 Clock Generator Compounding
The clock generator (MC1378P) provides the necessary reference oscillator and phase locks the clock to
the color subcarrier by inputting the composite video signal.
VC1 adjusts the horizontal VCO to synchronize the output of the burst gate (pin 5 on the MC1378P) with
the input video signal. VC2 adjusts the chroma VCO for maximum amplitude output from the clock buffer
(pin 1 on the MC14576).
VR3 adjusts pull–in of the chroma PLL filter. This is usually fixed to the center position. VR4 selects the
dc bias for the clock buffer output and is usually 2.25 V.
4.3 Video Amplifier Adjustment
On the video amplifier (MC14577), the gain is adjusted by VR1. This sets the input range
(3.0 Vp–p) of the A/D converter in MC141622FU.
VR2 is the clamp level adjustment. This adjusts the sync tip clamping of the input video signal to the
video amplifier.
4.4 Outside Interface
The outside interface should provide a composite video input signal to BNC1. The MC141622EVK pro-
vides Y/C separation and outputs the luminance from BNC2 and the color signal from BNC3. There is an
S output connector on this board for easy connection to instruments having an S input connector.
BNC4 and BNC5 are for the external input of each CLK and CLK(AD). However, when using these, it is
necessary to modify the board pattern; i.e., cut (J5, J6).
There is no filter for bandwidth limitations on this board beyond that imposed by the bandwidth limitations
of the MC14577 buffer amplifier. To minimize noise resulting from excessive bandwidth, the bandwidth of
input video signal should be limited to no more than one half of the clock frequency.
MC141622EVK
4
MOTOROLA
5. MC141622EVK CIRCUIT
47
µ
F
0.1
+
470 kΩ
µ
F
1.0
1.0
µ
F
160
+
+
0.1
0.1
0.1
1.0
0.1 µF
µ
F
µ
F
µF
µ
F
µF
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
ADC GND
MC1378P
DAC GND
DIGITAL GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
+
20
+
TANTALUM CAPACITOR
0.1
0.1
0.1
0.1
0.1
0.1
µ
F
680
1.0
µ
F
0.1 µF
µ
F
µ
F
µ
F
µ
F
µF
MULTI–LAYER CERAMIC CAPACITOR
4 MHz
CER. RES.
4.7 µF
+
47
µF
0.1 µF
33 µH
2.2 kΩ
7.5 m
Ω
1.8 k
Ω
0.1
µ
F
1 k
Ω
30 pF
+
750 k
1.0
Ω
4
5
3
2
1
8
1 µF
+
30 pF
1 m
Ω
MC14576
µ
F
10 kΩ
x 8
10 kΩ
x 8
6
7
33 µH
+
47
µ
F
0.1 µF
1 mΩ
0.1 µF
V
CC(D)
5 V
5
47 kΩ
x 8
47 kΩ x 8
33 µH
ROTARY SW
VIDEO IN
BNC1
+
47
0.1
1.0 µF
V 10 V
CC(A)
µ
F
µ
F
36 35 34 33 32 31 30 29 28 27 26 25
J6
160
37
38
39
24
TE1
D3
+
33
µ
H
33 µH
0.1
µ
F
23
22
21
20
TE0
D2
D1
47 µF
10 k
Ω
x 2
MODE1
+
+
0.1
47
47
0.1
CLK(AD)
BNCS
2.2
2.2
48
MODE0
CLK(AD)
GND(D)
D0
BK
µ
F
µ
F
µ
F
µ
F
kΩ
J5
kΩ
41
42
750 k
Ω
C2002
19
18
VH
MC141622
8
C2002
3
2
SW
43
44
V
+
–
GND (D)
CC(D)
1
33 µH
V
CC(D)
5 V
V
17
16
15
CC(D)
CLC
4
2.2
1.0 µF
FSC
NC
45
46
47
48
CL
out
kΩ
MC14677
CLK
V
in
BNC4
0.33 µF
NC
NC
14
13
RBT
RTP
A953
2 kΩ
2 kΩ
610 k
1 k
Ω
610
1
2
3
4
5
6
7
8
9
10 11 12
GAIN ADJUST
+
+
0.1
0.1
µ
F
µ
F
10
µ
F
10
µ
F
V
CC(D)
5 V
33 µH
+
0.1
47
µ
F
V
CC(A)
10 V
µ
F
33
µ
H
33
µ
H
+
0.1
9.1 kΩ
47 µF
+
0.1
µ
F
+
47 µF
47 µF
µ
F
V
CC(A)
(10 V)
8
V
CC(A)
3
2
7 k
Ω
+
–
(5 V)
1
V
V
out
in
MC7805CT
GND
+
Y
4
4
0.1
out
BNC2
33 µH
+
+
0.1
47
µ
F
µ
F
4.7
4.7
1/2MC14678
0.1
µ
F
µF
µ
F
µF
8
5
7 k
Ω
+
–
7
6
C
out
BNC3
2/2MC14678
MC141622EVK
5
MOTOROLA
6. MC141622EVK PARTS LIST
Reference
Reference
Designation
Description
MC141622FU
MC14576CP
MC14577CP
MC7805CT
MC14576CP
MC1378P
Designation
Description
IC1
IC2
IC3
IC4
IC5
IC6
C1
0.1 µF
47 µF
C2, C3
C4, C5, C6
C7
0.1 µF
47 µF
C8
0.1 µF
10 µF
C9
TR1
TR2
TR3
2SC2002
2SC2002
2SA953
C10
0.1 µF
10 µF
C11
C12
0.33 µF
1.0 µF
0.1 µF
47 µF
R1
R2
R3, R4
R5
R6
9.1 kΩ
62 kΩ
75 Ω
3.6 kΩ
750 kΩ
2.0 kΩ
510 Ω
C13
C14, C15
C16
C17
0.1 µF
1.0 µF
47 µF
C18
R7, R8
R9
C19
C20, C21
C22
0.1 µF
47 µF
R10
R11
150 Ω
510 kΩ
2.2 kΩ
47 kΩ x 4
47 kΩ x 8
10 kΩ x 8
47 kΩ x 8
10 kΩ x 8
10 kΩ x 4
200 Ω
C23
0.1 µF
47 µF
R12, R13
R14
R15
R16
R17
R18
R19, R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
C24
C25
0.1 µF
47 µF
C26
C27
10 µF
C28
0.1 µF
47 µF
C29, C30
C31
0.1 µF
0.022 µF
1.0 µF
0.1 µF
0.001 µF
47 µF
1.8 kΩ
680 Ω
C32
C33, C34
C35
750 kΩ
2.2 kΩ
7.5 mΩ
1.0 mΩ
150 Ω
C36
C37
C38 – C45
C46
0.1 µF
1.0 µF
0.1 µF
1.0 µF
0.1 µF
47 µF
470 kΩ
C47, C48
C49 – C51
C52
L1 – L9
L10
L11
33 µH
4.7 µH
33 µH
C53
VR1
VR2
VR3
VR4
1 kΩ
2.2 kΩ
1 kΩ
C54
0.047 µF
0.1 µF
C55 – C57
1 mΩ
VC1, VC2
30 pF
SW1, SW2
Toggle Switch
8 Channel Dip Switch
DIP SW1, DIP SW2
ROTARY SW
16 Channel Switch
4 MHz Cer. Res
14.32 MHz Crystal
MC141622EVK
6
MOTOROLA
7. MC141622EVK LAYOUT
C53
C52
C49
C48
C29
MC1378P
7805CT
IC4
C30
IC8
C31
L8
C24
C23
R22
C32
C47
POWER
C33
VIDEO IN
BNC1
14.32
R25
C36
C34
R24
L10
C20
C19
SETTING
CLAMP
LEVEL
L9
VC2
R16–1
VR3
R26
MC14577
IC3
SETTING
VIDEO
AMPLITUDE
VR4
MC14576
IC6
C16
VR2
C39
VR1
TR1
TR2
R6
C13
ROTARY
SW
C10
BNC5
C11
C8
CLK(AD)
C9
BNC2
R4
C14
J2
C7
L3
Y
out
R5
MC141622
IC1
MC14576
IC2
R2
R1
C27
R21
C28
C29
CLK
C3
C25
C26
R20
BNC3
R19
C
out
R7
J4
ON
OFF
ON
VERTICAL
ENHANCE
BK
OFF
CLK
BNC4
MC141622EVK
7
MOTOROLA
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
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MC141622EVK/D
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