MC14584 [MOTOROLA]
Hex Schmitt Trigger; 六角施密特触发器
| 型号： | MC14584 |
| 厂家： | 
MOTOROLA |
| 描述： | Hex Schmitt Trigger |
| 文件： | 总5页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 632
The MC14584B Hex Schmitt Trigger is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
These devices find primary use where low power dissipation and/or high
noise immunity is desired. The MC14584B may be used in place of the
MC14069UB hex inverter for enhanced noise immunity to “square up” slowly
changing waveforms.
P SUFFIX
PLASTIC
CASE 646
•
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
Double Diode Protection on All Inputs
D SUFFIX
SOIC
CASE 751A
•
•
•
Can Be Used to Replace MC14069UB
For Greater Hysteresis, Use MC14106B which is Pin–for–Pin
Replacement for CD40106B and MM74Cl4
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
T
A
= – 55° to 125°C for all packages.
V
DD
– 0.5 to + 18.0
V , V
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
in out
I , I
LOGIC DIAGRAM
Input or Output Current (DC or Transient),
per Pin
± 10
mA
in out
1
3
2
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
T
stg
– 65 to + 150
260
4
T
Lead Temperature (8–Second Soldering)
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
5
6
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
9
8
11
13
10
12
EQIVALENT CIRCUIT SCHEMATIC
(1/6 OF CIRCUIT SHOWN)
V
V
= PIN 14
= PIN 7
DD
SS
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V and
in
V
out
should be constrained to the range V
SS
≤ (V or V ) ≤ V .
in out DD
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either V or V ). Unused outputs must be left open.
SS DD
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
V
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
OL
OH
OH
V
in
= V
DD
V
in
= 0
V
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Output Drive Current
I
mAdc
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
0.25
0.5
1.0
—
—
—
0.0005
0.0010
0.0015
0.25
0.5
1.0
—
—
—
7.5
15
30
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (1.8 µA/kHz) f + I
= (3.6 µA/kHz) f + I
= (5.4 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
Hysteresis Voltage
V ‡
5.0
10
15
0.27
0.36
0.77
1.0
1.3
1.7
0.25
0.3
0.6
0.6
0.7
1.1
1.0
1.2
1.5
0.21
0.25
0.50
1.0
1.2
1.4
Vdc
Vdc
H
Threshold Voltage
Positive–Going
V
T+
T–
5.0
10
15
1.9
3.4
5.2
3.5
7.0
10.6
1.8
3.3
5.2
2.7
5.3
8.0
3.4
6.9
10.5
1.7
3.2
5.2
3.4
6.9
10.5
Negative–Going
V
5.0
10
15
1.6
3.0
4.5
3.3
6.7
9.7
1.6
3.0
4.6
2.1
4.6
6.9
3.2
6.7
9.8
1.5
3.0
4.7
3.2
6.7
9.9
Vdc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
DD
– V ) in volts, f in kHz is input frequency, and k = 0.001.
SS
T
L
‡V = V – V (But maximum variation of V is specified as less than V
T+ T– T + max
– V ).
T – min
H
H
MC14584B
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS (C = 50 pF, T = 25 C)
L
A
V
Vdc
DD
Characteristic
Symbol
Min
Typ #
Max
Unit
Output Rise Time
Output Fall Time
t
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
TLH
t
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
ns
THL
Propagation Delay Time
t
, t
5.0
10
15
—
—
—
125
50
40
250
100
80
PLH PHL
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns
20 ns
V
DD
V
DD
14
INPUT
90%
50%
10%
OUTPUT
PULSE
V
V
GENERATOR
SS
INPUT
t
t
PLH
PHL
C
L
7
V
OH
90%
50%
10%
SS
OUTPUT
V
OL
t
t
r
f
Figure 1. Switching Time Test Circuit and Waveforms
V
V
out
in
V
V
V
V
DD
H
DD
H
V
V
V
V
T+
T–
T+
T–
V
V
in
in
V
V
SS
DD
SS
DD
V
V
V
V
out
out
V
V
SS
SS
(a) Schmitt Triggers will square up inputs with slow
rise and fall times.
(b) A Schmitt trigger offers maximum noise immunity
in gate applications.
Figure 2. Typical Schmitt Trigger Applications
V
DD
PIN ASSIGNMENT
IN 1
OUT 1
IN 2
1
2
3
4
5
6
14
13
12
11
10
9
V
DD
IN 6
OUT 6
IN 5
OUT 2
IN 3
OUT 5
IN 4
OUT 3
V
7
8
OUT 4
SS
0
0
V
V
V
DD
T–
T+
V
H
V
, INPUT VOLTAGE (Vdc)
in
Figure 3. Typical Transfer Characteristics
MOTOROLA CMOS LOGIC DATA
MC14584B
3
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
1
9
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
7
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.280
0.200
0.020
0.065
MIN
19.05
6.23
3.94
0.39
1.40
MAX
19.94
7.11
5.08
0.50
1.65
0.750
0.245
0.155
0.015
0.055
–T–
SEATING
PLANE
K
F
G
J
K
0.100 BSC
2.54 BSC
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
G
N
M
D 14 PL
0.25 (0.010)
J 14 PL
0.25 (0.010)
L
M
N
0.300 BSC
7.62 BSC
0
15
0
15
M
S
T
A
M
S
T
B
0.020
0.040
0.51
1.01
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
ISSUE L
14
8
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
1
7
4. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
C
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
0
10
0
10
0.015
0.039
0.39
1.01
H
G
D
M
MC14584B
4
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE F
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
–B–
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
DIM
A
B
C
D
F
G
J
K
M
P
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
0.25 (0.010)
T
B
A
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
R
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
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are registered
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MC14584B/D
◊
相关型号：
MC14584BCLG
4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP14, LEAD FREE, CERAMIC, DIP-14
MOTOROLA
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