MC33690DWR2 [MOTOROLA]
Consumer Circuit, BICMOS, PDSO20, PLASTIC, SOIC-20;
| 型号： | MC33690DWR2 |
| 厂家： | 
MOTOROLA |
| 描述： | Consumer Circuit, BICMOS, PDSO20, PLASTIC, SOIC-20 信息通信管理 光电二极管 |
| 文件： | 总24页 (文件大小：218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOTOROLA
SEMICONDUCTOR TECHNICAL
Order this document
by MC33690/D
MC33690
Standalone Tag Reader Circuit
STARC
STANDALONE
TAG READER
CIRCUIT
The Standalone Tag Reader Circuit (STARC) is an integrated
circuit dedicated to the automotive immobilizer applications. It
combines on the same chip all the circuitry to interface with a
transponder : antenna drivers and demodulator.
A low dropout voltage regulator and a physical interface fully
compatible with the ISO 9141 norm are also available.
The Standalone Tag Reader Circuit is fabricated with the
SMARTMOSTM3.5 technology. This process is a double layer
metal, 1.4µm, 45V technology, combining CMOS and bipolar
devices.
DW SUFFIX
Plastic Package
CASE 751D
SO - 20
•
Contactless 125kHz tag reader module :
- Self synchronous sample & hold demodulator
- Amplitude or phase modulation detection
- High sensitivity
- Fast “read after write“ demodulator settling time
- Low resistance and high current antenna drivers :
2Ω @ 150mA (typ.)
Pin Connections
- Bidirectionnal data transmission
- Multi tag, multi scheme operation.
1
VSUP
SOURCE
GATE
TD1
20
19
18
17
16
15
14
13
12
11
Tx
2
3
Rx
•
Low dropout voltage regulator :
- Wide input supply voltage range :
from 5.5V up to 40V
- Output current capability up to 150mA DC with an
external power transistor
- 5V output voltage with a 5% accuracy
- Low voltage reset function
- Low current consumption in standby mode :
300µA (typ.).
K
4
AM
XTAL1
XTAL2
VSS
5
6
VDD
TD2
7
LVR
MODE1
MODE2
RD
8
DOUT
CEXT
AGND
9
10
•
ISO 9141 transmitter and receiver module :
- Input voltage thresholds ratiometric to the supply
voltage
- Current limitation
- Ouput slew rate control
- No external protection device required.
ORDERING INFORMATION
Operating
Junction
Temperature
Range
Device
Package
T
= -40°C to
125°C
J
MC33690DW
SOIC 20
This document contains information on a new product under development. Motorola
reserves the right to change or discontinue this product without notice.
REV 4.8
© Motorola, Inc., 2002.
MC33690
BLOCK DIAGRAM
Figure 1 : Standalone Tag Reader Circuit
Optional : external N channel MOS required for sourced current > 50mA.
A recommended reference is MMFT 3055VL from Motorola.
VBAT
VDD
VSUP
C1
GATE
SOURCE
Voltage Regulator
LVR
VDD
10µF
VSS
TD1
8MHz
RA
R1
XTAL1
XTAL2
LA
RD
R2
MODE1
MODE2
DOUT
Tag Reader
CA
TD2
AM
CEXT
10nF
CEXT
VBAT
AGND
Tx
510Ω
ISO 9141 Interface
K
Rx
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
2
MC33690
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply voltage
VSUP
VSS-0.3 to +40
V
Supply voltage without using the voltage regulator
(VSUP = VDD
VDD
VSS-0.3 to +7
V
)
Voltage on SOURCE
Current into/from GATE
Voltage on GATE
V
SS-0.3 to +40
0
V
mA
V
V
SS-0.3
Voltage on pins :
MODE1/2, CEXT, DOUT, LVR, XTAL1/2, Rx, Tx
VSS-0.3 to VDD +0.3
V
Voltage on RD
10
V
V
Voltage on K and AM
VSS-3 to 40
Current on TD1 & TD2
(Drivers on & off)
300
mA
Voltage on AGND
VSS 0.3
2000
V
V
ESD voltage capability (HBM, see note 1)
ESD voltage capability (MM, see note 1)
Solder heat resistance test (10s)
Junction temperature
200
V
260
°C
°C
°C
TJ
Ts
170
Storage temperature
-65 to +150
Note 1 :
Human Body model, AEC-Q100-002 Rev. C.
Machine Model, AEC-Q100-003 Rev. E.
THERMAL CHARACTERISTIC
Characteristic
Junction to ambiant thermal resistance (SOIC20)
Symbol
Value
Unit
Rth
80
°C/W
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
3
MC33690
PIN FUNCTION DESCRIPTION
Pin
1
Function
VSUP
SOURCE
GATE
TD1
Description
Power supply
2
External N channel transistor source
External N channel transistor gate
Antenna driver 1 output
3
4
5
VSS
Power and digital ground
Voltage regulator output
Antenna driver 2 output
6
VDD
7
TD2
8
MODE1
MODE2
RD
Mode selection input 1
9
Mode selection input 2
10
11
12
13
14
15
16
17
18
19
20
Demodulator input
AGND
CEXT
DOUT
LVR
Demodulator ground
Comparator reference input
Demodulator output (5V)
Low Voltage Reset input/output
Oscillator output
XTAL2
XTAL1
AM
Oscillator input
Amplitude modulation input
ISO 9141 transmitter output and receiver input
ISO 9141 receiver monitor output
ISO 9141 transmitter input
K
Rx
Tx
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
4
MC33690
DESCRIPTION
TAG READER MODULE
The Tag Reader module is dedicated for
automotive or industrial applications where
information has to be transmitted contactless.
The tag reader module is a write/read (challenge/
response) controller for applications which
demand high security level.
The use of a synchronous sample & hold
technique allows communication with all
avalaible tags using admittance switching
producing absorption of the RF field.
Load amplitude or phase shift modulation can be
detected at high bit rates up to 8kHz.
125kHz is the typical operational carrier
frequency of the tag reader module with a 8MHz
clock.
The tag reader module is connected to a serial
tuned LC circuit which generates a magnetic field
power supplying the tag.
Figure 2 : Tag Reader block diagram
AM Data
RA
TD1
Clock 8MHz
1/32 counter
1/2
LA
8MHz
4MHz
125kHz
Shutdown
LVR
125kHz
Self synchronous
sample & hold
Setup & Preload
CA
TD2
Interface
-
11.25° , 22.5° , 33.75° , 45° , 56.25° , 67.5° , 78.75° , 90°
+ 0°, -11.25°, -22.5°, -33.75°, -45°, -56.25°, -67.5°, -78.75°
R1
+
VDD
Buffer
Comparator
+
-
500ns
+
RD
100KΩ
Data out
D
C
Q
S/H
Buffer
-
VDD
R2
500µA
CEXT
10nF
AGND
CEXT
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
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MC33690
The antenna phase shift evaluation is only
done :
- after each wake-up command (see pages
10 to 12),
- or after reset (see page 7).
This is necessary to obtain the best demodulator
performances.
In order to ensure a fast demodulator settling
time after wake up, reset or a write sequence, the
external capacitor CEXT is preloaded at its
working voltage.
Read function
When answering to the base station, a
transponder generates an absorption modulation
of the magnetic field. It results in an amplitude/
phase modulation of the current across the
antenna. This information is picked up at the
antenna tap point between the coil and the
capacitor. An external resistive ladder down
scales this voltage to a level compatible with the
demodulator input voltage range (see parameter
V
INRD page 16).
This preset occurs 256µs after switching the
antenna drivers on and its duration is 128µs.
After wake up or reset, the preset has the same
duration but begins 518µs after clock settling.
After power on reset, VSUP must meet the
minimum specified value, enabling the nominal
operation of VDD, before the start of the preset.
Otherwise the preset must be done by the user
through a standby/wake-up sequence.
The demodulator (see figure 2) consists of :
- an input stage (emitter follower),
- a sample & hold circuit,
- a voltage follower,
- a low offset voltage comparator.
The sampling time is automatically set to take
into account a phase shift due to the tolerances
of the antenna components (L and C) and of the
oscillator. The allowed phase shift measured at
the input RD ranges from -45° to +45°. Assuming
that the phase reference is the falling edge of the
driving signal TD1, this leads to a sampling time
phase ranging from -78.75° to 90° with discrete
steps of 11.25°. After reset condition, the
sampling time phase is +11.25°.
Write function
Whatever the selected configuration (see
page 9), the write function is achieved by
switching on/off the output drivers TD1/2.
Once the drivers have been set in high
impedance, the load current flows alternatively
Figure 3 : Current flow when the buffers are switched off
VDD
RA
TD1
ILOAD
LA
R1
VDD
CA
TD2
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
6
MC33690
VOLTAGE REGULATOR
The low dropout voltage regulator provides a
regulated 5V supply for the internal circuitry. It
can also supply external peripherals or sensors.
The input supply voltage ranges from 5.5V to
over 40V.
internal LDMOS. The threshold voltage of this
transistor must be lower than the one of the
internal LDMOS (1.95V typ.) in order to prevent
the current from flowing into the LDMOS. Its
breakdown voltage must be higher than the
maximum supply voltage.
This voltage regulator uses a series combination
of high voltage LDMOS and low voltage PMOS
transistors to provide regulation. An external low
ESR capacitor is required for the regulator
stability.
A low voltage reset function monitors the VDD
output. An internal 10µA pull-up current source
allows, when an external capacitor is connected
between LVR and GND, to generate delays at
power up (5ms typ. with CReset=22nF) .
The LVR pin is also the input generating the
internal reset signal. Applying a logic low level on
this pin resets the circuit :
The maximum average current is limited by the
power dissipation capability of the SO 20
package.
This limitation can be overcome by connecting
an external N channel MOS in parallel with the
- all the internal flip flops are reset,
- the drivers TD1/2 are switched on.
Figure 4 : Voltage regulator block diagram
VBAT
VSUP
GATE
C1
N channel
Charge pump
LDMOS
1MHz oscillator
SOURCE
Voltage reference
and biasing
-
P channel
MOS
+
VDD
generator
VDD
VDD
C2
C3
10µF
100nF
VDD
reset
10µA
LVR
CReset
Comparator
-
+
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
7
MC33690
ISO 9141 PHYSICAL INTERFACE
This interface module is fully compatible with
any capacitive load and protects against short
circuit to the battery voltage. An overtemperature
protection shuts the driver down when the
junction temperature exceeds 150°C (typ). Once
shut down by the overtemperature protection,
the driver can be switched on again :
the ISO 9141 norm describing the diagnosis line.
It includes one transmitter (pin K) and 2 receivers
(pins K and AM).
The input stages consist of high voltage CMOS
triggers. The thresholds are ratiometric to VSUP.
A ground referenced current source (2.5µA typ.)
pulls down the input when unconnected.
- if the junction temperature has decreased
below the threshold,
- and by applying an off/on command, coming
either from the demodulator in configurations A
and B or directly applied on the input Tx in
configuration C (see pin K status in table 1 page
9).
When a negative voltage is applied on the K or
AM lines, the input current is internally limited by
a 2kΩ resistor (typ.) in series with a diode.
The electromagnetic emission is reduced thanks
to the voltage slew rate control (5V/µs typ.).
A current limitation allows the transmitter to drive
Figure 5 : ISO 9141interface
VDD
VSUP
VSUP
L line
AM
2kΩ
AM data
From configuration controller
VDD
GND
2.5µA
GND
2kΩ
Rx
2.5µA
GND
VBAT
GND
From configuration controller
Over temperature
detector
K line
Tag Reader module output
VDD
K
Command
Tx
Current limitation
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
8
MC33690
COMMUNICATION MODES DESCRIPTION
The STARC offers 3 different communication
modes. Therefore it can be used as a standalone
circuit connected to an Electronic Control Unit
(ECU) through a bus line or it can be directly
connected to a microcontroller in case of a single
board architecture.
Table 1. Communication modes description
Configuration
pins
Configuration
Bus type
Pin status
& function description
Type
Name Mode1 Mode2
K output/input :
- demodulator output,
1 wire
(VBAT)
- amplitude modulation input
- shutdown/wake-up
AM must be connected to VSUP
DOUT forces a low level
A
B
0
0
0
1
x
Standalone
K output :
- demodulator output
AM input :
- amplitude modulation input,
- shutdown/wake-up
DOUT forces a low level
2 wires
(VBAT)
DOUT output :
- demodulator output
AM input :
- amplitude modulation input
MODE2 input :
- shutdown/wake-up
Direct
connection
to a MCU
2 wires
(VDD)
C
1
K output/input (standalone ISO 9141 inter-
face) :
- driven by Tx and monitored by Rx
1
0
K input (standalone ISO 9141 interface) :
- monitored by Rx
-Tx disabled
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
9
MC33690
STANDALONE CONFIGURATION WITH ONE WIRE BUS
When a low level is applied on pins MODE1
and MODE2, the circuit is in configuration A
(standalone single wire bus configuration, see
figure 13 page 18).
The circuit can be put into standby mode by
forcing the K line at zero during more than 2 ms
after entering the write mode. Once the K line is
released, the circuit sends an acknowledge pulse
before entering into standby mode.
After power on, the circuit is set into read mode.
The demodulator output is directly routed to the
ISO 9141 interface output K.
In standby mode, the oscillator and most of the
internal biasing currents are switched off.
Therefore, the functions (tag reader, ISO 9141
driver) are inactive except the voltage regulator
and the ISO 9141 receiver on pin K. The driver
output TD1 forces a low level and TD2 a high
level. A rising edge on K wakes up the circuit.
After completion of the wake-up sequence, the
circuit is automatically set in read mode.
The circuit can be set into write mode at anytime
by violation of all possible patterns on the single
wire bus during more than 1ms. Then the K line
achieves the amplitude modulation by switching
on/off both antenna drivers.
After 1ms of inactivity at the end of the challenge
phase (bus in idle recessive one state), the circuit
is set back into read mode.
In configuration A, DOUT and Rx outputs always
force a low level, Tx is disabled.
Figure 6 : Mode access description in one wire bus configuration
Read to write mode :
T
≤ t < T ’+T ’
1
1
1
0
0
0
K line
0
0
1
read mode
write mode
Write to read mode :
K line
t ≥T
0
write mode
read mode
Write to standby mode :
T
T
t ≥ T
K line
2
2
1
standby mode
read mode
write mode
acknowledge
Standby mode to read mode :
K line
wake-up sequence
standby mode
Figure 7 : Configuration A state diagram
T0 ≤ K line low
write
TD1/2 off
reset
read
K line high < T0’
write
TD1/2
switching
K line low
T0 ≤ K line high
T1 ≤ K line low
wake up
standby
K
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
10
MC33690
Timing definitions for a 8MHz crystal:
- Tref is crystal oscillator period (125 ns typ.)
- T0=8064.Tref = 1.008ms typ.
- T0’=7932.Tref = 0.992ms typ.
- T1=16256.Tref = 2.032ms typ.
- T1’=16128.Tref = 2.016ms typ.
- T2=4096.Tref, = 512µs typ.
T0 is the minimum time required to guarantee
that the device toggles from read to write (or from
write to read). But indeed, the STARC may toggle
from read to write (or from write to read) between
T0 and T0’.
T1 is the minimum time required to guarantee
that the device toggles from write to standby. But
indeed, the STARC may toggle in standby
between T1 and T1’.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
11
MC33690
STANDALONE CONFIGURATION WITH TWO WIRES BUS
When a low level is applied on MODE1 and a
high level on MODE2, the circuit is in
configuration B (standalone 2 wires bus
configuration, see figure 14 page 19).
forcing the AM line at zero during more than 2
ms. The circuit sends an acknowledge pulse
before entering into standby mode
In standby mode, the oscillator and most of the
internal biasing currents are switched off.
Therefore, the functions (tag reader, ISO 9141
driver) are inactive except the voltage regulator
and the ISO 9141 receiver on pin AM. The driver
output TD1 forces a low level and TD2 a high
level. A rising edge on AM wakes up the circuit.
After completion of the wake-up sequence, the
circuit is automatically set in read mode.
The K pin is set as an output sending the
demodulated data.
The AM pin is set as a VSUP referenced input pin
receiving the amplitude modulation and the
shutdown/wake-up commands. Forcing high and
low levels on AM achieves the amplitude
modulation by switching on/off both antenna
drivers. Meanwhile, this amplitude modulation
can be monitored on the K output. This allows
antenna short and open circuit diagnosis.
The circuit can be put into standby mode by
In configuration B, DOUT and Rx outputs always
force a low level, Tx is disabled.
Figure 8 : Modes access description in two wires bus configuration
Read & write sequences :
drivers on
data write modulation
drivers off
1
1
1
1
0
0
0
0
0
AM line
data read
data write
K line
1
1
0
AM line monitoring
Entering into standby mode :
AM line
K line
t ≥ T1
standby mode
acknowledge
T1
T2
T2
Coming out of standby mode :
AM line
standby mode
wake-up sequence
data read
K line
Figure 9 : Configuration B state diagram
reset
TD1/2
switching
AM line low
AM line high
wake up
AM line high
TD1/2 off
AM line low
T1 ≤ AM line low
AM
standby
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
12
MC33690
DIRECT CONNECTION TO A MICROCONTROLLER CONFIGURATION
When a high level is applied on MODE1, the
circuit is in configuration C (direct connection to
a microcontroller configuration, see figure 15
page 19).
regulator. The driver outputs TD1 and TD2 are
frozen in their state (high or low level) before
entering into standby mode. DOUT forces a low
level.
The demodulated data are sent through DOUT.
The AM pin is set as a VDD referenced input pin
receiving the AM command. Forcing high and
low levels on AM achieves the amplitude
modulation by switching on/off both antenna
drivers. Meanwhile, this amplitude modulation
can be monitored on DOUT. This allows antenna
short and open circuit diagnosis.
The ISO 9141 interface K is standalone and can
be directly controlled by the input pin Tx and
monitored by the output Rx.
Applying a logic high level on Tx switches the
output driver K on (dominant zero state when an
external pull-up resistor is connected between K
and VBAT). Applying a logic low level turns the
driver off (one recessive state).
Rx monitors the voltage at the K pin. When the
voltage is below the low threshold voltage, Rx
forces a logic low level. When the voltage is
above the high threshold voltage, Rx forces a
logic high level.
The circuit can be put into standby mode by
applying a low level on the MODE2 pin.
In standby mode, the oscillator and most of the
internal biasing currents are switched off.
Therefore, the functions (tag reader, ISO 9141
interface) are inactive except the voltage
In standby mode, Tx is disabled and Rx output
monitors the voltage at the K pin.
Figure 10 : Configuration C state diagram
reset
TD1/2
switching
AM low
AM high
AM high
TD1/2 off
wake up
AM low
mode2 low
mode2 low
mode2 high
standby
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
13
MC33690
ELECTRICAL CHARACTERISTICS
Typical values reflect average measurements at VSUP=12V and TJ=25°C.
SUPPLY CURRENT
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Conditions
& Comments
Symbol
Type
Max Unit
Parameter
Min
Typ
Pin VSUP
9.1 Standby mode current
I
-
-
300
1.5
500
2.5
µA
SUP1
1
9.2 Operating mode current
I
mA
See note
SUP2
1. Circuit in configuration C, no current sunk from VDD, drivers TD1/2 switched off, Tx forced to low.
VOLTAGE REGULATOR
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Conditions
& Comments
Parameter
Symbol
Min
Typ
Max Unit Type
Pins VSUP & VDD
1.1 Output Voltage (5.5V ≤ V
≤ 40V)
≤ 40V)
V
4.75
-
5.0
-
5.25
50
V
SUP
SUP
VDD1
Without external MOS transistor
I
≤ 50mA
1.3 Total Output Current
I
OUT
mA
VDD1
Without external MOS transistor
1.5 Load Regulation
V
V
-
20
60
mV
LoadReg1
1 to 50mA I
change
OUT
1.9 Output Voltage (5.5V ≤ V
V
With external MOS transistor,
4.7
-
5.0
-
5.3
V
VDD2
1
2
see notes and
≤ 150mA
1.11 Total Output Current
I
150
mA
VDD2
I
OUT
With external MOS transistor
1 to 150mA I change
1.6 Load Regulation
-
65
-1
150
-
mV
mV
LoadReg2
OUT
1.4 Line Regulation (6V ≤ V
≤ 16V)
V
I = 1mA
OUT
-15
SUP
LineReg
1. The stability is ensured with a decoupling capacitor between VDD and VSS : C
≥ 10µF with ESR ≤ 3Ω.
OUT
2. The current capability can be increased up to 150mA by using an external N channel MOS transistor (see figure 1 page 2). The main
characteristics for choosing this component are : VT < 1.8V and BVDSS > 40V.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
14
MC33690
LOW VOLTAGE RESET
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Conditions
& Comments
Parameter
Symbol
Min
Typ
Max Unit Type
Pin LVR
1.6 Low Voltage Reset Low Threshold
1.7 Low Voltage Reset Hysteresis
1.12 Pull-up Current
V
I
4.1
50
5
4.35
100
10
4.6
150
15
V
LVRON
1
See note and figure 11
V
mV
µA
LVRH
V
V
= 2.5V
= 2.5V
LVR
LVR
LVRUP
1.13 Output Resistance in reset condition
1.14 Input Low Voltage
R
200
0
370
-
500
Ω
LVR
0.3 x
V
V
ILLVR
V
DD
0.7 x
1.15 Input High Voltage
V
-
V
V
IHLVR
DD
V
DD
1. As the voltage regulator and the low voltage reset are using the same internal voltage reference, it is ensured that the low voltage reset
will only occur when the voltage regulator is out of regulation.
Figure 11 : Low voltage reset waveform
VDD
VLVRON + VLVRH
VLVRON
LVR
OSCILLATOR
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Condition
& Comments
Characteristic
Symbol
Min
Typ
Max Unit Type
Pins XTAL1, XTAL2
8.0 Input Capacitance
8.1 Voltage gain V
C
V
V
V
= 2.5V
-
-
5
25
-
-
-
pF
-
XTAL1
XTAL1
XTAL1
/ V
A
= 2.5V
XTAL2
XTAL1
OSC
1
8.3 Clock input level
See note
1.5
V
Vpp
XTAL1
DD
1. This level ensures the circuit operation with a 8MHz clock. It is applied through a capacitive coupling. A 1MΩ resistor connected between
XTAL1 and XTAL2 biases the oscillator input.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
15
MC33690
TAG READER
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Conditions
& Comments
Parameter
Symbol
Min
Typ
Max Unit Type
DEMODULATOR (pin RD)
2.0 Input Voltage Range
V
F
3
4
4
5
8
V
INRD
MOD
2.2 Input Modulation Frequency
0.5
kHz
6.5V ≤ V
See figure 12 and note
≤ 16V
SUP
2.3 Demodulator Sensitivity
2.31 Demodulator Sensitivity
V
V
-
-
5
7
15
30
mV
mV
SENSE1
SENSE2
1
6V ≤ V < 6.5V
SUP
See figure 12 and note 1
See figure 12
Configuration C
see note for configurations A
2.4 Demodulation Delay
t
-
7.5
10
µs
Demod
2
and B
2.5 After Write Pulse Settling Time
t
-
-
394
646
400
700
µs
µs
Settling1
Settling2
Recovery Time after wake-up or reset
2.6 from clock stable to demodulator valid
output
3
t
See note
DRIVERS (pins TD1, TD2)
Output Carrier Frequency to Crystal
Frequency Ratio
R
FTD/
FXTAL
3.5
-
64
-
-
3.0 Turn on/off Delay
t
-
-
-
-
250
4
ns
Ω
on/off
3.1 Driver1/2 Low Side Out. Resistance
3.2 Driver1/2 High Side Out. Resistance
R
I
= 150mA DC
= -150mA DC
2.4
2.1
TDL
LOAD
R
I
4
Ω
TDH
LOAD
1. The sensitivity is measured in the following application conditions : I
= 50mA peak, V = 4V peak, C
= 10nF, square wave
ANTENNA
RD
EXT
modulation F
=F
/32.
MOD
TD1
2. Not including the delay due to the slew rate of the K output.
3. Clock stable condition implies V meets the specification (see page 15).
XTAL1
Figure 12 : Demodulator parameters definition
VRD
VSENSE
Demodulator
output (K or DOUT)
tDemod
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
16
MC33690
ISO 9141 INTERFACE
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Conditions
& Comments
Parameter
Receiver (pins K & AM)
4.0 Input Low Voltage
Symbol
Min
Typ
Max Unit Type
0.3 x
V
V
V
-3
-
-
IL
V
SUP
0.65 x
4.1 Input High Voltage
40
V
IH
V
SUP
4.2 Input Hysteresis Voltage
4.3 Biasing Current
V
0.4
1
0.65
3
1.3
5
V
HY1
I
0V ≤ V ≤ 16V
µA
mA
µs
B
IN
4.31 Input Current
I
-3 ≤ V < 0
-2
-1
-
BM
IN
4.4 K to Rx delay
tdkrx
2
10
Driver (pin K)
5.0 Output Falling Edge Slew Rate
5.1 Output Rising Edge Slew Rate
SR
3.5
3.5
5
5
6.5
6.5
V/µs
V/µs
F
SR
R
= 510Ω,
Pull-up
see note
R
1
SR
SYME-
TRY
5.2 Rise Fall Slew Rates Symmetry
-1
-
0
1.1
-
1
1.4
0
V/µs
V
5.3 Output Low Voltage
V
I
= 25mA
LOAD
OLK
Input Current
5.4
I
-3V ≤ V ≤ 0V
-2
mA
IK
IN
(driver switched on or off)
5.5 Current Limitation Threshold
I
0V ≤ V ≤ 40V
35
50
65
mA
L
IN
5.6 Thermal Shutdown Threshold
TH
130
150
170
°C
SDWN
1. Calculated from 20% to 80% of the output swing.
DIGITAL I/O
6V ≤ VSUP ≤ 16V, VSS = 0V, TJ = –40°C to +125°C, unless otherwise noted
Test Condition
& Comments
Characteristic
INPUT (pins MODE1, MODE2, AM, TX)
6.0 Input Low Voltage
Symbol
Min
Typ
Max Unit Type
0.3 x
V
V
V
0
-
-
ILD
V
DD
0.7 x
6.1 Input High Voltage
V
V
V
IHD
HD
DD
V
DD
V
6.2 Input Hysteresis Voltage
OUTPUT (pins DOUT,RX)
7.0 Output Low Voltage
.24
.7
1
0.2 x
V
I
= 500uA
= -500uA
LOAD
0
0.5
V
OL
LOAD
V
DD
0.8 x
7.1 Output High Voltage
V
I
4.6
-
V
V
OH
DD
V
DD
1
7.2 Fall/Rise Time
t
C
=10pF, see note
-
150
ns
F/R
LOAD
1. Calculated from 10% to 90% of the output swing.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
17
MC33690
APPLICATION SCHEMES
Figure 13 : Standalone configuration with one wire bus
VBAT
C1
VSUP
NC
GATE
NC
SOURCE
NC
C2
C3
VDD
VSS
TD1
RD
LVR
8.2pF
8.2pF
10µF 100nF
VSS
XTAL1
XTAL2
MODE1
8MHz
RA
1MΩ
LA
R1
STARC
R2
CA
TD2
MODE2
NC
CEXT
10nF
DOUT
VSUP VBAT
CEXT
510Ω
AGND
AM
K
Tx
NC
Rx
If no external MOS transistor is necessary to increase the voltage regulator current capability, the pins GATE
and SOURCE must be left unconnected.
In this configuration, the outputs Rx and DOUT force a low level.
C1 is not required for the STARC functionality and only acts as a reservoir of energy.
To preserve the demodulator sensitivity, CEXT and R2 should be connected to AGND, and VSS connected to
AGND using a low resistance path.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
18
MC33690
Figure 14 : Standalone configuration with two wires bus
VBAT
C1
VSUP
NC
GATE
NC
SOURCE
NC
C2
10µF 100nF
C3
VDD
VSS
TD1
LVR
8.2pF
8.2pF
VSS
XTAL1
XTAL2
MODE1
8MHz
RA
1MΩ
LA
R1
STARC
RD
R2
VDD
VBAT
CA
TD2
MODE2
NC
510Ω
DOUT
CEXT
10nF
CEXT
AGND
Tx
K
AM
NC
Rx
If no external MOS transistor is necessary to increase the voltage regulator current capability, the pins GATE
and SOURCE must be left unconnected.
C1 is not required for the STARC functionality and only acts as a reservoir of energy.
To preserve the demodulator sensitivity, CEXT and R2 should be connected to AGND, and VSS connected to
AGND using a low resistance path.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
19
MC33690
Figure 15 : Direct connection to a microcontroller
VBAT
C1
VSUP
NC
NC
GATE
To microcontroller
power supply pin
SOURCE
To microcontroller
port/reset pin
C2
C3
VDD
LVR
8.2pF
8MHz
8.2pF
10uF 100nF
VSS
XTAL1
XTAL2
VSS
TD1
RA
1MΩ
VDD
LA
R1
STARC
RD
MODE1
MODE2
DOUT
AM
R2
CA
TD2
To microcontroller
port
CEXT
10nF
VBAT
CEXT
AGND
Tx
510Ω
To microcontroller
port
K
Rx
If no external MOS transistor is necessary to increase the voltage regulator current capability, the pins GATE
and SOURCE must be left unconnected.
C1 is not required for the STARC functionality and only acts as a reservoir of energy.
To preserve the demodulator sensitivity, CEXT and R2 should be connected to AGND, and VSS connected to
AGND using a low resistance path.
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
20
MC33690
Notes
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
21
MC33690
Notes
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
22
MC33690
Notes
revision 4.8, 5 February 2002
© Motorola, Inc., 2002.
MOTOROLA SEMICONDUCTORS PRODUCTS
23
MC33690
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including
“Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the
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Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. All other product or service names are the property of their respective owners.
© Motorola, Inc. 2002
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MC33690/D
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