MC34129P [MOTOROLA]
HIGH PERFORMANCE CURRENT MODE CONTROLLERS; 高性能电流模式控制器
| 型号： | MC34129P |
| 厂家： | 
MOTOROLA |
| 描述： | HIGH PERFORMANCE CURRENT MODE CONTROLLERS |
| 文件： | 总16页 (文件大小：351K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document by MC34129/D
HIGH PERFORMANCE
CURRENT MODE
CONTROLLERS
The MC34129/MC33129 are high performance current mode switching
regulators specifically designed for use in low power digital telephone
applications. These integrated circuits feature a unique internal fault timer
that provides automatic restart for overload recovery. For enhanced system
efficiency, a start/run comparator is included to implement bootstrapped
SEMICONDUCTOR
TECHNICAL DATA
operation of V . Other functions contained are a temperature compensated
CC
reference, reference amplifier, fully accessible error amplifier, sawtooth
oscillator with sync input, pulse width modulator comparator, and a high
current totem pole driver ideally suited for driving a power MOSFET.
Also included are protective features consisting of soft–start,
undervoltage lockout, cycle–by–cycle current limiting, adjustable deadtime,
and a latch for single pulse metering.
P SUFFIX
PLASTIC PACKAGE
CASE 646
14
Although these devices are primarily intended for use in digital telephone
systems, they can be used cost effectively in many other applications.
1
• Current Mode Operation to 300 kHz
• Automatic Feed Forward Compensation
• Latching PWM for Cycle–by–Cycle Current Limiting
• Continuous Retry after Fault Timeout
• Soft–Start with Maximum Peak Switch Current Clamp
• Internally Trimmed 2% Bandgap Reference
• High Current Totem Pole Driver
D SUFFIX
PLASTIC PACKAGE
14
CASE 751A
(SO–14)
1
• Input Undervoltage Lockout
• Low Startup and Operating Current
• Direct Interface with Motorola SENSEFET Products
PIN CONNECTIONS
Drive Output
Drive Ground
Ramp Input
1
2
3
4
5
6
7
14 V
CC
13 Start/Run Output
12
11
10
9
C
Soft–Start
Feedback/
PWM Input
Error Amp
Inverting Input
Error Amp
Noninverting Input
Sync/Inhibit
Input
Simplified Block Diagram
R /C
T
T
13
14
Start/Run
Output
Start/Run
V
2.5 V
Gnd
ref
8
V
1.25 V
ref
Soft–Start
and
Fault Timer
12
Undervoltage
Lockout
C
Soft–Start
V
CC
(Top View)
8
1.25V
Reference
V
1.25V
ref
7
6
Gnd
Error Amp
Noninverting
Input
Inverting
Input
Feedback/
PWM Input
Drive Out
Drive Gnd
Ramp Input
9
ORDERING INFORMATION
Operating
+
–
10
X2
V
2.5V
ref
Temperature Range
Device
Package
11
1
Latching
PWM
MC34129D
MC34129P
MC33129D
MC33129P
SO–14
T
= 0° to +70°C
A
5
4
Plastic DIP
Oscillator
R /C
T
T
2
SO–14
T
= –40° to +85°C
3
A
Sync/Inhibit
Input
Plastic DIP
Motorola, Inc. 1996
Rev 1
MC34129 MC33129
MAXIMUM RATINGS
Rating
Symbol
Value
50
Unit
mA
mA
V
V
CC
Zener Current
I
Z(VCC)
Start/Run Output Zener Current
Analog Inputs (Pins 3, 5, 9, 10, 11, 12)
Sync Input Voltage
I
50
Z(Start/Run)
–
–0.3 to 5.5
V
sync
–0.3 to V
1.0
V
CC
Drive Output Current, Source or Sink
Current, Reference Outputs (Pins 6, 8)
I
A
DRV
I
20
mA
ref
Power Dissipation and Thermal Characteristics
D Suffix, Plastic Package Case 751A
Maximum Power Dissipation @ T = 70°C
Thermal Resistance, Junction–to–Air
P Suffix, Plastic Package Case 646
P
552
145
mW
°C/W
A
D
R
θJA
Maximum Power Dissipation @ T = 70°C
Thermal Resistance, Junction–to–Air
P
800
100
mW
°C/W
A
D
R
θJA
Operating Junction Temperature
T
+150
°C
°C
J
Operating Ambient Temperature
MC34129
T
A
0 to +70
MC33129
–40 to +85
Storage Temperature Range
T
stg
–65 to +150
°C
ELECTRICAL CHARACTERISTICS (V
CC
= 10 V, T = 25°C [Note 1], unless otherwise noted.)
A
Characteristics
Symbol
Min
Typ
Max
Unit
REFERENCE SECTIONS
Reference Output Voltage, T = 25°C
V
ref
V
A
1.25 V Ref., I = 0 mA
1.225
2.375
1.250
2.500
1.275
2.625
L
2.50 V Ref., I = 1.0 mA
L
Reference Output Voltage, T = T
to T
V
ref
V
A
low
high
1.25 V Ref., I = 0 mA
1.200
2.250
–
–
1.300
2.750
L
2.50 V Ref., I = 1.0 mA
L
Line Regulation (V
= 4.0 V to 12 V)
1.25 V Ref., I = 0 mA
Reg
mV
mV
CC
line
–
–
2.0
10
12
50
L
2.50 V Ref., I = 1.0 mA
L
Load Regulation
Reg
load
1.25 V Ref., I = –10 µA to +500 µA
–
–
1.0
3.0
12
25
L
2.50 V Ref., I = –0.1 mA to +1.0 mA
L
ERROR AMPLIFIER
Input Offset Voltage (V = 1.25 V)
in
V
IO
mV
T
= 25°C
–
–
1.5
–
–
10
A
T
A
= T
to T
high
low
Input Offset Current (V = 1.25 V)
I
–
10
–
nA
nA
in
IO
Input Bias Current (V = 1.25 V)
I
in
IB
T
T
A
= 25°C
= T
–
–
25
–
–
200
A
to T
high
low
Input Common Mode Voltage Range
Open Loop Voltage Gain (V = 1.25 V)
V
ICR
–
0.5 to 5.5
87
–
–
–
–
–
V
dB
kHz
dB
µA
V
A
VOL
65
500
65
40
O
Gain Bandwidth Product (V = 1.25 V, f = 100 kHz)
GBW
750
85
O
Power Supply Rejection Ratio (V
= 5.0 V to 10 V)
PSRR
CC
Output Source Current (V = 1.5 V)
O
I
80
Source
Output Voltage Swing
High State (I
= 0 µA)
V
V
1.75
–
1.96
0.1
2.25
0.15
Source
= 500 µA)
OH
OL
Low State (I
Sink
NOTE: 1. T
low
=
0°C for MC34129
–40°C for MC33129
T
= +70°C for MC34129
+85°C for MC33129
high
2
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
ELECTRICAL CHARACTERISTICS (V
CC
= 10 V, T = 25°C [Note 1], unless otherwise noted.)
A
Characteristics
Symbol
Min
Typ
Max
Unit
PWM COMPARATOR
Input Offset Voltage (V = 1.25 V)
in
V
150
–
275
–120
250
400
–250
–
mV
µA
ns
IO
Input Bias Current
I
IB
Propagation Delay, Ramp Input to Drive Output
t
–
PLH(IN/DRV)
SOFT–START
Capacitor Charge Current (Pin 12 = 0 V)
I
0.75
–
1.2
15
1.50
40
µA
mV
V
chg
Buffer Input Offset Voltage (V = 1.25 V)
in
V
IO
Buffer Output Voltage (I
= 100 µA)
V
–
0.15
0.225
Sink
OL
FAULT TIMER
Restart Delay Time
t
200
400
600
µs
DLY
START/RUN COMPARATOR
Threshold Voltage (Pin 12)
V
–
–
2.0
350
10
–
–
V
mV
V
th
Threshold Hysteresis Voltage (Pin 12)
Output Voltage (I = 500 µA)
V
H
V
9.0
–
10.3
2.0
–
Sink
Output Off–State Leakage Current (V
OL
S/R(leak)
= 15 V)
I
0.4
µA
V
OH
Output Zener Voltage (I = 10 mA)
Z
V
–
(V + 7.6)
CC
Z
OSCILLATOR
Frequency (R = 25.5 kΩ, C = 390 pF)
f
OSC
80
100
350
120
460
kHz
µA
T
T
Capacitor C Discharge Current (Pin 5 = 1.2 V)
T
I
240
dischg
Sync Input Current
µA
High State (V = 2.0 V)
Low State (V = 0.8 V)
in
I
I
IL
–
–
40
15
125
35
in
IH
Sync Input Resistance
R
12.5
32
50
kΩ
in
DRIVE OUTPUT
Output Voltage
V
High State (I
Low State (I
= 200 mA)
= 200 mA)
V
V
8.3
–
8.9
1.4
–
1.8
Source
Source
OH
OL
Low State Holding Current
Output Voltage Rise Time (C = 500 pF)
I
–
–
225
390
30
–
–
µA
ns
ns
kΩ
H
t
L
r
Output Voltage Fall Time (C = 500 pF)
L
t
–
–
f
Output Pull–Down Resistance
R
100
225
350
PD
UNDERVOLTAGE LOCKOUT
Startup Threshold
V
3.0
5.0
3.6
10
4.2
15
V
th
Hysteresis
V
%
H
TOTAL DEVICE
Power Supply Current
I
1.0
12
2.5
4.0
–
mA
V
CC
R
T
= 25.5 kΩ, C = 390 pF, C = 500 pF
T L
Power Supply Zener Voltage (I = 10 mA)
V
14.3
Z
Z
NOTE: 1. T
low
=
0°C for MC34129
–40°C for MC33129
T
= +70°C for MC34129
+85°C for MC33129
high
3
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 1. Timing Resistor versus
Oscillator Frequency
Figure 2. Output Deadtime versus
Oscillator Frequency
1.0 M
500 k
100
V
= 10 V
= 25°C
500 pF
2.0 nF
1.0 nF
200 pF
CC
50
20
C
= 5.0 nF
T
T
A
100 pF
200 k
100 k
50 k
5.0
V
= 10 V
20 k
10 k
2.0
1.0
CC
= 25°C
T
A
100pF
C
= 5.0 nF
10
2.0 nF
20
1.0 nF
50
500 pF
100
200 pF
200
T
5.0
500
5.0
10
20
50
100
200
500
f
, OSCILLATOR FREQUENCY (kHz)
f , OSCILLATOR FREQUENCY (kHz)
OSC
OSC
Figure 3. Oscillator Frequency Change
versus Temperature
Figure 4. Error Amp Open Loop Gain and
Phase versus Frequency
60
0
V
V
R
= 10 V
= 1.25 V
∞
= 25°C
CC
V
R
C
= 10 V
= 25.5 k
= 390 pF
8.0
CC
T
T
O
=
L
40
20
0
45
T
A
Gain
4.0
0
Phase
90
–4.0
–8.0
135
–20
1.0 k
180
–55
–25
0
25
50
75
100
125
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
10 M
T , AMBIENT TEMPERATURE (
°
C)
A
Figure 5. Error Amp Small–Signal
Transient Response
Figure 6. Error Amp Large–Signal
Transient Response
T
= 25°C
A
T
= 25°C
A
1.05 V
1.5 V
1.0 V
0.5 V
1.0 V
0.95 V
0.5
µs/DIV
1.0 µs/DIV
4
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 7. Error Amp Open Loop DC Gain
versus Load Resistance
Figure 8. Error Amp Output Saturation
versus Sink Current
90
80
1.0
V
= 10 V
CC
Pins 8 to 9, 6 to 10
Pins 2, 5, 7 to Gnd
0.8
0.6
T
= 25°C
A
70
60
0.4
0.2
0
V
V
R
= 10 V
= 1.25 V
to 1.25 V
CC
O
L
ref
T
= 25°C
A
50
0
20
40
60
80
100
0
2.0
4.0
6.0
8.0
R , OUTPUT LOAD RESISTANCE (k
Ω)
I
Sink
, OUTPUT SINK CURRENT (mA)
L
Figure 9. Soft–Start Buffer Output Saturation
versus Sink Current
Figure 10. Reference Output Voltage versus
Supply Voltage
3.2
2.4
1.0
T
= 25°C
A
V
= 10 V
CC
V
2.5 V, R = 2.5 k
L
ref
Pins 8 to 9
Pins 2, 5, 7, 10, 12 to Gnd
0.8
0.6
T
= 25°C
A
1.6
0.8
0
V
1.25 V, R = ∞
L
ref
0.4
0.2
0
0
100
200
300
400
A)
500
0
4.0
8.0
, SUPPLY VOLTAGE (V)
12
16
I
, OUTPUT SINK CURRENT (
µ
V
CC
Sink
Figure 11. 1.25 V Reference Output Voltage
Change versus Source Current
Figure 12. 2.5 V Reference Output Voltage
Change versus Source Current
0
0
V
= 10 V
V
= 10 V
CC
CC
–4.0
–8.0
–12
–16
–4.0
–8.0
–12
–16
+25°C
T
= – 40°C
+85°C
A
T
= – 40
°C
25°C
85°C
A
–20
–24
–20
–24
0
2.0
4.0
6.0
8.0
10
0
0.4
0.8
1.2
1.6
2.0
I
, REFERENCE OUTPUT SOURCE CURRENT (mA)
I
, REFERENCE OUTPUT SOURCE CURRENT (mA)
ref
ref
5
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 13. 1.25 V Reference Output Voltage
versus Temperature
Figure 14. 2.5 V Reference Output Voltage
versus Temperature
*V = 1.225 V
ref
*V = 1.250 V
ref
*V = 1.275 V
ref
*V = 2.375 V
ref
*V = 2.500 V
ref
*V = 2.625 V
ref
0
–2.0
–4.0
–6.0
–8.0
0
4.0
8.0
–12
–16
V
R
= 10 V
∞
CC
L
ref
V
= 10 V
R = 2.5 k
L
CC
=
*V at T = 25
°C
A
*V at T = 25
ref
°C
A
–10
–20
–55
–25
0
25
50
75
C)
100
125
–55
–25
0
25
50
75
C)
100
125
T , AMBIENT TEMPERATURE (
°
T , AMBIENT TEMPERATURE (
°
A
A
Figure 15. Drive Output Saturation
versus Load Current
Figure 16. Drive Output Waveform
0
–1.0
–2.0
–3.0
3.0
R
C
=
V
V
T
= 10 V
L
L
CC
10
CC
= 25
= 500 pF
= 25°C
°C
A
T
A
Source Saturation
(Load to Ground)
Sink Saturation
(Load to V
)
CC
2.0
0
1.0
Gnd
0
0
200
400
600
800
1.0 µs/DIV
I
, OUTPUT LOAD CURRENT (mA)
O
Figure 17. Supply Current versus Supply Voltage
10
R
C
= 25.5 k
= 390 pF
= 25°C
T
T
8.0
6.0
T
A
4.0
2.0
C
= 500 pF
L
C
= 15 pF
12
L
0
0
4.0
8.0
, SUPPLY VOLTAGE (V)
16
V
CC
6
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
PIN FUNCTION DESCRIPTION
Pin
Function
Drive Output
Description
1
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are
sourced and sinked by this pin.
2
3
4
Drive Ground
Ramp Input
This pin is a separate power ground return that is connected back to the power source. It is
used to reduce the effects of switching transient noise on the control circuitry.
A voltage proportional to the inductor current is connected to this input. The PWM uses this
information to terminate output switch conduction.
Sync/Inhibit Input
A rectangular waveform applied to this input will synchronize the Oscillator and limit the
maximum Drive Output duty cycle. A dc voltage within the range of 2.0 V to V
the controller.
will inhibit
CC
5
6
R /C
The free–running Oscillator frequency and maximum Drive Output duty cycle are
programmed by connecting resistor R to V 2.5 V and capacitor C to Ground. Operation
to 300 kHz is possible.
T
T
T
ref
T
V
ref
2.50 V
This output is derived from V 1.25 V. It provides charging current for capacitor C through
ref
T
resistor R .
T
7
8
9
Ground
1.25 V
This pin is the control circuitry ground return and is connected back to the source ground.
This output furnishes a voltage reference for the Error Amplifier noninverting input.
V
ref
Error Amp Noninverting Input
Error Amp Inverting Input
Feedback/PWM Input
This is the noninverting input of the Error Amplifier. It is normally connected to the 1.25 V
reference.
10
11
12
13
This is the inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
This pin is available for loop compensation. It is connected to the Error Amplifier and
Soft–Start Buffer outputs, and the Pulse Width Modulator input.
C
A capacitor C
inductor current during startup.
is connected from this pin to Ground for a controlled ramp–up of peak
Soft–Start
Soft–Start
Start/Run Output
This output controls the state of an external bootstrap transistor. During the start mode,
operating bias is supplied by the transistor from V . In the run mode, the transistor is
in
switched off and bias is supplied by an auxiliary power transformer winding.
14
V
CC
This pin is the positive supply of the control IC. The controller is functional over a minimum
V
CC
range of 4.2 V to 12 V.
7
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
OPERATING DESCRIPTION
The MC34129 series are high performance current mode
peak inductor current under normal operating conditions is
controlled by the voltage at Pin 11 where:
switching regulator controllers specifically designed for use in
low power telecommunication applications. Implementation
will allow remote digital telephones and terminals to shed
their power cords and derive operating power directly from
the twisted pair used for data transmission. Although these
devices are primarily intended for use in digital telephone
systems, they can be used cost effectively in a wide range of
converter applications. A representative block diagram is
shown in Figure 18.
V
– 0.275 V
S
(Pin 11)
R
I
pk
=
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the voltage at Pin 11 will be
internally clamped to 1.95 V by the output of the Soft–Start
Buffer. Therefore the maximum peak switch current is:
1.95 V – 0.275
1.675 V
Oscillator
I
=
=
pk(max)
R
R
S
S
The oscillator frequency is programmed by the values
selected for the timing components R and C . Capacitor C
is charged from the 2.5 V reference through resistor R to
T
approximately 1.25 V and discharged by an internal current
T
T
T
When designing a high power switching regulator it
becomes desirable to reduce the internal clamp voltage in
order to keep the power dissipation of R to a reasonable
S
sink to ground. During the discharge of C , the oscillator
T
level. A simple method which adjusts this voltage in discrete
increments is shown in Figure 22. This method is possible
because the Ramp Input bias current is always negative
(typically –120 µA). A positive temperature coefficient equal
generates an internal blanking pulse that holds the lower
input of the NOR gate high. This causes the Drive Output to
be in a low state, thus producing a controlled amount of
output deadtime. Figure 1 shows Oscillator Frequency
to that of the diode string will be exhibited by I
. An
pk(max)
versus R and Figure 2 Output Deadtime versus Frequency,
T
adjustable method that is more precise and temperature
stable is shown in Figure 23. Erratic operation due to noise
pickup can result if there is an excessive reduction of the
clamp voltage. In this situation, high frequency circuit layout
techniques are imperative.
both for given values of C . Note that many values of R and
T
T
C
will give the same oscillator frequency but only one
T
combination will yield a specific output deadtime at a give
frequency. In many noise sensitive applications it may be
desirable to frequency–lock one or more switching regulators
to an external system clock. This can be accomplished by
applying the clock signal to the Synch/Inhibit Input. For
reliable locking, the free–running oscillator frequency should
be about 10% less than the clock frequency. Referring to the
timing diagram shown Figure 19, the rising edge of the clock
signal applied to the Sync/Inhibit Input, terminates charging
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Ramp Input with a time
constant that approximates the spike duration will usually
eliminate the instability; refer to Figure 25.
of C and Drive Output conduction. By tailoring the clock
T
waveform, accurate duty cycle clamping of the Drive Output
can be achieved. A circuit method is shown in Figure 20. The
Sync/Inhibit Input may also be used as a means for system
shutdown by applying a dc voltage that is within the range of
Error Amp and Soft–Start Buffer
A fully–compensated Error Amplifier with access to both
inputs and output is provided for maximum design flexibility.
The Error Amplifier output is common with that of the
Soft–Start Buffer. These outputs are open–collector (sink
only) and are ORed together at the inverting input of the PWM
Comparator. With this configuration, the amplifier that
demands lower peak inductor current dominates control of
the loop. Soft–Start is mandatory for stable startup when
power is provided through a high source impedance such as
the long twisted pair used in telecommunications. It
effectively removes the load from the output of the switching
power supply upon initial startup. The Soft–Start Buffer is
configured as a unity gain follower with the noninverting input
connected to Pin 12. An internal 1.0 µA current source
2.0 V to V
.
CC
PWM Comparator and Latch
The MC34129 operates as a current mode controller
whereby output switch conduction is initiated by the oscillator
and terminated when the peak inductor current reaches a
threshold level established by the output of the Error Amp or
Soft–Start Buffer (Pin 11). Thus the error signal controls the
peak inductor current on a cycle–by–cycle basis. The PWM
Comparator–Latch configuration used, ensures that only a
single pulse appears at the Drive Output during any given
oscillator cycle. The inductor current is converted to a voltage
by inserting the ground–referenced resistor R in series with
S
charges the soft–start capacitor (C
) to an internally
Soft–Start
the source of output switch Q . The Ramp Input adds an
1
clamped level of 1.95 V. The rate of change of peak inductor
current, during startup, is programmed by the capacitor value
selected. Either the Fault Timer or the Undervoltage Lockout
can discharge the soft–start capacitor.
offset of 275 mV to this voltage to guarantee that no pulses
appear at the Drive Output when Pin 11 is at its lowest state.
This occurs at the beginning of the soft–start interval or when
the power supply is operating and the load is removed. The
8
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 18. Representative Block Diagram
V
= 20V
in
Start/Run
Output
+
+
–
1.95V
13
14
Start/Run
Comparator
V
CC
7.0V
+
Undervoltage
Lockout
1.0µA
12
Fault Timer
V
V
CC
CC
3.6V
14.3V
V
PWM
Comparator
CC
C
Soft–Start
80µA
+
–
8
1.25V
Reference
7
6
+
Noninverting
Input
Inverting
Input
Feedback/PWM
Input
9
275mV
2.5V Reference
+
+
–
10
+
–
1.25V
–
Error Amp
R
V
CC
11
Soft–Start
Buffer
Latch
R
R
Q1
T
R
Q
1
2
Drive Output
5
4
Oscillator
32k
S
Drive
Gnd
C
T
3
Ramp Input
Sync/Inhibit Input
R
S
+
–
Sink Only
Positive True Logic
=
Figure 19. Timing Diagram
600 µs Delay
Sync/Inhibit Input
Capacitor C
Latch
T
“Set” Input
Feedback/PWM Input
Ramp Input
Latch
“Reset” Input
Drive Output
20 V
Start/Run
Output
14.3 V
9
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Fault Timer
Drive Output and Drive Ground
This unique circuit prevents sustained operating in a
lockout condition. This can occur with conventional switching
control ICs when operating from a power source with a high
series impedance. If the power required by the load is greater
than that available from the source, the input voltage will
collapse, causing the lockout condition. The Fault Timer
provides automatic recovery when this condition is detected.
Under normal operating conditions, the output of the PWM
Comparator will reset the Latch and discharge the internal
Fault Timer capacitor on a cycle–by–cycle basis. Under
operating conditions where the required power into the load is
The MC34129 contains a single totem–pole output stage
that was specifically designed for direct drive of power
MOSFETs. It is capable of up to ±1.0 A peak drive current and
has a typical fall time of 30 ns with a 500 pF load. The
totem–pole stage consists of an NPN transistor for turn–on
drive and a high speed SCR for turn–off. The SCR design
requires less average supply current (I ) when compared to
CC
conventional switching control ICs that use an all NPN
totem–pole. The SCR accomplishes this during turn–off of
the MOSFET, by utilizing the gate charge as regenerative
on–bias, whereas the conventional all transistor design
requires continuous base current. Conversion efficiency in
low power applications is greatly enhanced with this
greater than that available from the source (V ), the Ramp
in
Input voltage (plus offset) will not reach the comparator
threshold level (Pin 11), and the output of the PWM
Comparator will remain low. If this condition persists for more
reduction of I . The SCR’s low–state holding current (I ) is
CC
H
typically 225 µA. An internal 225 kΩ pull–down resistor is
included to shunt the Drive Output off–state leakage to
ground when the Undervoltage Lockout is active. A separate
Drive Ground is provided to reduce the effects of switching
transient noise imposed on the Ramp Input. This feature
that600µs,theFaultTimerwillactive,dischargingC
Soft–Start
and initiating a soft–start cycle. The power supply will operate
in a skip cycle or hiccup mode until either the load power or
source impedance is reduced. The minimum fault timeout is
200 µs, which limits the useful switching frequency to a
minimum of 5.0 kHz.
becomes particularly useful when the I
reduced. Figure 24 shows the proper implementation of the
MC34129 with a current sensing power MOSFET.
clamp level is
pk(max)
Start/Run Comparator
Undervoltage Lockout
A bootstrap startup circuit is included to improve system
efficiency when operating from a high input voltage. The
output of the Start/Run Comparator controls the state of an
external transistor. A typical application is shown in Figure 21.
The Undervoltage Lockout comparator holds the Drive
Output and C
pins in the low state when V
is less
Soft–Start
CC
than 3.6 V. This ensures that the MC34129 is fully functional
before the output stage is enabled and a soft–start cycle
begins. A built–in hysteresis of 350 mV prevents erratic
While C
(Pin 14) from V
is charging, startup bias is supplied to V
through transistor Q2. When
in
reaches the 1.95 V clamp level, the Start–Run
Soft–Start
CC
C
output behavior as V crosses the comparator threshold
Soft–Start
output switches low (V
CC
= 50 mV), turning off Q2. Operating
voltage. A 14.3 V zener is connected as a shunt regulator
from V to ground. Its purpose is to protect the MOSFET
CC
bias is now derived from the auxiliary bootstrap winding of the
transformer, and all drive power is efficiently converted down
CC
gate from excessive drove voltage during system startup. An
external 9.1 V zener is required when driving low threshold
MOSFETs. Refer to Figure 21. The minimum operating
voltage range of the IC is 4.2 V to 12 V.
from V . The start time must be long enough for the power
in
supply output to reach regulation. This will ensure that there
is sufficient bias voltage at the auxiliary bootstrap winding for
sustained operation.
References
1.95VC
The 1.25 V bandgap reference is trimmed to ±2.0%
Soft–Start
t
=
= 1.95 C in µF
Soft–Start
Start
tolerance at T = 25°C. It is intended to be used in
1.0 µA
A
conjunction with the Error Amp. The 2.50 V reference is
derived from the 1.25 V reference by an internal op amp with
The Start/Run Comparator has 350 mV of hysteresis. The
output off–state is clamped to V + 7.6 V by the internal
zener and PNP transistor base–emitter junction.
a fixed gain of 2.0. It has an output tolerance of ±5.0% at T =
A
CC
25°C and its primary purpose is to supply charging current to
the oscillator timing capacitor.
For further information, please refer to AN976.
10
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 20. External Duty Cycle Clamp
and Multi–Unit Synchronization
Figure 21. Bootstrap Startup
V
in
2.5V
6
13
14
+
–
+
–
Q2
C
Soft–Start
+
–
9.1
V
12
+
5.0V
8
5
4
+
1.25V
7
–
OSC
R
R
9
8
4
A
B
+
–
+
5.0k
–
6
2.5V
10
+
–
+
–
6
5
R
3
7
11
1
5.0k
Q
R
S
+
–
2
Q
S
5
2
3
OSC
To Additional
MC34129’s
MC1455
5.0k
4
C
1
R
1.44
(R + 2R )C
B
f =
D
=
max
The external 9.1 V zener is required when driving low threshold MOSFETs.
R
+ 2R
A
B
A
B
Figure 22. Discrete Step Reduction of Clamp Level
Figure 23. Adjustable Reduction of Clamp Level
V
in
V
8
in
1.25V
+
8
1.25V
9
+
+
9
275mV
+
10
+
+
–
–
R2
275mV
10
–
–
11
11
R1
Q1
Q1
R
1
R
1
Q
S
Q
S
2
3
2
3
D1
D2
R
S
R
S
≈
120µA
1.25
– 0.275
1.675 – (V
+ V
)
F(D1)
F(D2)
R2
R1
I
=
pk(max)
+ 1
R
S
1.25 V
R1 + R2
If:
≥
1.0 mA
Then: I ≈
pk(max)
R
S
11
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 24. Current Sensing Power MOSFET
Figure 25. Current Waveform Spike Suppression
V
R
I
r
in
S
r
pk DS(on)
V
≈
RS
8
+ r
DM(on)
S
1.25V
V
in
If: SENSEFET = MTP10N10M
= 200
9
R
S
+
–
Then: V
≈ 0.075 I
pk
RS
10
D
Q1
1
SENSEFET
S
11
1
2
3
G
R
K
M
2
C
R
S
3
Power Ground:
To Input Source
Return
R
1/4W
S
The addition of the RC filter will eliminate instability caused by the
leading edge spike on the current waveform.
Control Circuitry Ground:
To Pin 7
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch.
Figure 26. MOSFET Parasitic Oscillations
Figure 27. Bipolar Transistor Drive
I
B
V
in
+
V
in
t
0
–
Base Charge
Removal
Q1
C1
1
2
R
g
1
2
3
Q1
3
R
S
R
S
Series gate resistor R will damp any high frequency parasitic
oscillations caused by the MOSFET input capacitance and any
series wiring inductance in the gate–source circuit.
g
The totem–pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.
12
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 28. Non–Isolated 725 mW Flyback Regulator
V
= 20V to 48V
in
+
220k
50
2.2k
13
+
2N5551
–
1N4148
+ 10
14
12
+
1N5819
100
–
5V/125mA
1N958A
T1
0.1
+
+
36k
R2
8
9
+
–
1.25V
7
6
Gnd
+
+
–
10
–
2.5 V
12k
R1
+
–
100
500pF
11
1
–5V/20mA
24k
1N5819
R
S
Q
MTP
2N20L
5
4
2
3
OSC
470pF
T1: Coilcraft #G6807–A
Primary = 90T #28 AWG
Secondary
Gap = 0.05 n, for Lp of 600
Core = Ferroxcube 813E187–3C8
±5V = 26T #30 AW
10
128kHz
Sync
µH
Bobbin = Ferroxcube E187PCB1–8
Test
Conditions
5.0 V = 125 mA, I
Results
∆ = 1.0 mV
∆ = 2.0 mV
150 mVpp
77%
Line Regulation 5.0 V
Load Regulation 5.0 V
Output Ripple 5.0 V
Efficiency
V
in
V
in
V
in
V
in
= 20 V to 40 V, I
–5.0 V = 20 mA
–5.0 V = 20 mA
out
out
out
= 30 V, I
= 30 V, I
= 30 V, I
5.0 V = 0 mA to 150 mA, I
out
out
out
5.0 V = 125 mA, I
5.0 V = 125 mA, I
–5.0 V = 20 mA
–5.0 V = 20 mA
out
out
R2
R1
V
out
= 1.25
+ 1
13
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 29. Isolated 2.0 W Flyback Regulator
V
= 20V to 48V
in
220k
+
100
2.2k
13
+
2N5551
–
180
pF
1N5819
1N5819
1N5819
100
14
5V/380mA
+
12
+
–
T1
+
2
0.1
8
9
+
–
7
6
1.25V
0.1
Gnd
+
140k
330
+
–
+
–
100
2.5V
+
10
20k
–
–5V/20mA
1N5819
11
1
24k
R
S
Q
MTP
2N20
5
4
2
3
OSC
470pF
128kHz
Sync
100pF
100
2.7k
0.1
1
6
T1: Primary = 35T #32 AWG
Feedback = 12T #32 AWG
10k
4
Secondary
Gap = 0.004
Core = Ferroxcube 813E187–3C8
±
″
5 V = 7T #32 AWG
, for Lp of 180
µH
2
5
Bobbin = Ferroxcube E187PCB1–8
MOC5007
Test
Conditions
5.0 V = 380 mA, I –5.0 V = 20 mA
out
Results
Line Regulation 5.0 V
Load Regulation 5.0 V
Output Ripple 5.0 V
Efficiency
V
= 20 V to 40 V, I
∆ = 1.0 mV
in
in
in
in
out
V
V
V
= 30 V, I
= 30 V, I
= 30 V, I
5.0 V = 100 mA to 380 mA, I
–5.0 V = 20 mA
out
∆ = 15 mV
150 mVpp
73%
out
out
out
5.0 V = 380 mA, I
5.0 V = 380 mA, I
–5.0 V = 20 mA
–5.0 V = 20 mA
out
out
14
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
Figure 30. Isolated 3.0 W Flyback Regulator with Secondary Side Sensing
V
= 12V
in
L1
1N5821
13
14
5/60mA
100
+
–
51
12
1/2
+
100
+
4N26
470
0.1
0.1
8
9
+
–
1.25V
7
6
+
–
+
–
TL431A
MTP10N10M
Return
D
2.5V
+
10
–
11
1
S
R
S
G
Q
5
4
K
M
2
3
OSC
T1: Primary = 22T #18 AWG
Secondary = 22T #18 AWG
Lp = 50
Core = Ferroxcube
2616PA100–3C8
Bobbin = Ferroxcube 2616F1D
µH
1/2
4N26
L1:
Coilcraft Z7156, 15 µH
Test
Conditions
Results
∆ = 1.0 mV
∆ = 8.0 mV
20 mVpp
81%
Line Regulation
Load Regulation
Output Ripple
Efficiency
V
in
V
in
V
in
V
in
= 8.0 V to 12 V, I
600 mA
out
= 12 V, I
= 12 V, I
= 12 V, I
= 100 mA to 600 mA
= 600 mA
out
out
out
= 600 mA
An economical method of achieving secondary sensing is to combine the TL431A with a 4N26 optocoupler.
15
MOTOROLA ANALOG IC DEVICE DATA
MC34129 MC33129
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
14
1
8
7
B
4. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
C
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
0
10
0
10
0.015
0.039
0.39
1.01
H
G
D
M
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
ISSUE F
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
8
7
–B–
P 7 PL
M
M
0.25 (0.010)
B
1
MILLIMETERS
INCHES
G
DIM
A
B
C
D
F
G
J
K
M
P
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
0.25 (0.010)
T
B
A
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
R
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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