MC54HC563JD [MOTOROLA]

HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, CERAMIC, DIP-20;
MC54HC563JD
型号: MC54HC563JD
厂家: MOTOROLA    MOTOROLA
描述:

HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, CERAMIC, DIP-20

锁存器
文件: 总9页 (文件大小:108K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 732–03  
20  
20  
The MC54/74HC563A is identical in pinout to the LS563. The device  
inputs are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
This device is identical in function to the HC533A but has the Data Inputs  
on the opposite side of the package from the outputs to facilitate PC board  
layout.  
These latches appear transparent to data (i.e., the outputs change  
asynchronously) when Latch Enable is high. The data appears at the outputs  
in inverted form. When Latch Enable goes low, data meeting the setup and  
hold time becomes latched.  
The Output Enable input does not affect the state of the latches, but when  
Output Enable is high, all device outputs are forced to the high–impedance  
state. Thus, data may be latched even when the outputs are not enabled.  
The HC573A is the noninverting version of this function.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
1
DW SUFFIX  
SOIC PACKAGE  
CASE 751D–04  
20  
1
ORDERING INFORMATION  
MC54HCXXXAJ  
MC74HCXXXAN  
MC74HCXXXADW SOIC  
Ceramic  
Plastic  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
PIN ASSIGNMENT  
OUTPUT  
ENABLE  
1
20  
V
CC  
Chip Complexity: 202 FETs or 50.5 Equivalent Gates  
D0  
2
3
4
19  
18  
17  
Q0  
Q1  
Q2  
D1  
D2  
LOGIC DIAGRAM  
D3  
D4  
5
16  
15  
14  
13  
12  
11  
Q3  
Q4  
Q5  
Q6  
Q7  
19  
2
3
4
5
6
7
8
9
6
D0  
D1  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
18  
17  
16  
15  
14  
13  
12  
D5  
7
D6  
8
D2  
DATA  
INPUTS  
D3  
INVERTING  
OUTPUTS  
D7  
9
LATCH  
ENABLE  
D4  
GND  
10  
D5  
D6  
D7  
FUNCTION TABLE  
LATCH  
ENABLE  
11  
1
Inputs  
Output  
PIN 20 = V  
PIN 10 = GND  
CC  
OUTPUT  
ENABLE  
Output Latch  
Enable Enable  
D
Q
L
L
L
H
H
L
H
L
X
X
L
H
No Change  
Z
H
X
X = don’t care  
Z = high impedance  
8/96  
REV 0  
Motorola, Inc. 1996  
MC54/74HC563A  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
This device contains protection  
circuitry to guard against damage  
due to high static voltages or electric  
fields. However, precautions must  
be taken to avoid applications of any  
voltage higher than maximum rated  
voltages to this high–impedance cir-  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
– 0.5 to + 7.0  
CC  
V
– 0.5 to V  
+ 0.5  
V
in  
CC  
V
out  
– 0.5 to V  
+ 0.5  
V
CC  
I
± 20  
mA  
mA  
mA  
mW  
in  
cuit. For proper operation, V and  
in  
I
I
DC Output Current, per Pin  
± 35  
± 75  
out  
V
should be constrained to the  
out  
range GND (V or V  
)
V
.
DC Supply Current, V  
and GND Pins  
CC  
in out  
CC  
CC  
Unused inputs must always be  
tied to an appropriate logic voltage  
P
D
Power Dissipation in Still Air, Plastic or Ceramic DIP†  
SOIC Package†  
750  
500  
level (e.g., either GND or V ).  
CC  
Unused outputs must be left open.  
T
stg  
Storage Temperature  
– 65 to + 150  
C
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
(Ceramic DIP)  
260  
300  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C  
Ceramic DIP: – 10 mW/ C from 100 to 125 C  
SOIC Package: – 7 mW/ C from 65 to 125 C  
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
Unit  
V
V
CC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
6.0  
V , V  
in out  
V
CC  
V
T
A
– 55 + 125  
C
t , t  
r f  
Input Rise and Fall Time  
(Figure 1)  
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
0
0
0
1000  
500  
400  
ns  
MOTOROLA  
2
MC54/74HC563A  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Test Conditions  
Unit  
85 C  
125 C  
V
IH  
Minimum High–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
3.0  
4.5  
6.0  
1.5  
2.1  
3.15  
4.2  
1.5  
2.1  
3.15  
4.2  
1.5  
2.1  
3.15  
4.2  
V
out  
CC  
|I  
|
20 µA  
out  
V
Maximum Low–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
3.0  
4.5  
6.0  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
0.5  
0.9  
1.35  
1.8  
V
V
IL  
out  
CC  
|I  
|
20 µA  
out  
V
OH  
Minimum High–Level Output  
Voltage  
V
= V or V  
IH  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
in  
IL  
20 µA  
|I  
|
out  
V
in  
= V or V  
IH  
|I  
|I  
|I  
|
|
|
2.4 mA  
6.0 mA  
7.8 mA  
3.0  
4.5  
6.0  
2.48  
3.98  
5.48  
2.34  
3.84  
5.34  
2.20  
3.70  
5.20  
IL out  
out  
out  
V
OL  
Maximum Low–Level Output  
Voltage  
V
= V or V  
IH  
2.0  
4.5  
6.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
in  
IL  
20 µA  
|I  
|
out  
V
in  
= V or V  
IH  
|I  
|I  
|I  
|
|
|
2.4 mA  
6.0 mA  
7.8 mA  
3.0  
4.5  
6.0  
0.26  
0.26  
0.26  
0.33  
0.33  
0.33  
0.40  
0.40  
0.40  
IL out  
out  
out  
I
Maximum Input Leakage Current  
V
= V or GND  
CC  
6.0  
6.0  
± 0.1  
± 0.5  
± 1.0  
± 5.0  
± 1.0  
± 10  
µA  
µA  
in  
in  
I
Maximum Three–State Leakage Output in High–Impedance State  
Current  
OZ  
V
= V or V  
in  
IL  
IH  
or GND  
V
out  
= V  
CC  
or GND  
I
Maximum Quiescent Supply  
Current (per Package)  
V
= V  
6.0  
4
40  
160  
µA  
CC  
in  
CC  
= 0 µA  
I
out  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
3
MOTOROLA  
MC54/74HC563A  
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)  
L
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
t
t
,
Maximum Propagation Delay, Input D to Q  
(Figures 1 and 5)  
2.0  
3.0  
4.5  
6.0  
110  
70  
23  
145  
95  
29  
175  
110  
35  
ns  
PLH  
t
PHL  
20  
25  
30  
,
Maximum Propagation Delay, Latch Enable to Q  
(Figures 2 and 5)  
2.0  
3.0  
4.5  
6.0  
115  
75  
23  
145  
95  
29  
175  
115  
35  
ns  
ns  
ns  
ns  
PLH  
t
PHL  
20  
25  
30  
,
Maximum Propagation Delay, Output Enable to Q  
(Figures 3 and 6)  
2.0  
3.0  
4.5  
6.0  
125  
75  
30  
155  
80  
38  
190  
100  
45  
PLZ  
t
PHZ  
26  
33  
38  
t
t
,
Maximum Propagation Delay, Output Enable to Q  
(Figures 3 and 6)  
2.0  
3.0  
4.5  
6.0  
125  
75  
28  
155  
80  
35  
190  
100  
42  
PZL  
PZH  
24  
30  
35  
t
t
,
Maximum Output Transition Time, Any Output  
(Figures 1 and 5)  
2.0  
3.0  
4.5  
6.0  
60  
23  
12  
10  
75  
27  
15  
13  
90  
32  
18  
15  
TLH  
THL  
C
Maximum Input Capacitance  
10  
15  
10  
15  
10  
15  
pF  
pF  
in  
C
Maximum Three–State Output Capacitance  
(Output in High–Impedance State)  
out  
NOTES:  
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
Typical @ 25°C, V  
= 5.0 V  
CC  
C
Power Dissipation Capacitance (Per Latch)*  
pF  
40  
PD  
2
* Used to determine the no–load dynamic power consumption: P = C  
D
Motorola High–Speed CMOS Data Book (DL129/D).  
V
f + I  
V
. For load considerations, see Chapter 2 of the  
PD CC  
CC CC  
TIMING REQUIREMENTS (Input t = t = 6 ns)  
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
su  
Minimum Setup Time, Input D to Latch Enable  
(Figure 4)  
2.0  
3.0  
4.5  
6.0  
50  
40  
10  
9
65  
55  
13  
11  
80  
65  
16  
14  
ns  
t
Minimum Hold Time, Latch Enable to Input D  
(Figure 4)  
2.0  
3.0  
4.5  
6.0  
3
3
3
3
3
3
3
3
3
3
3
3
ns  
ns  
ns  
h
t
w
Minimum Pulse Width, Latch Enable  
(Figure 2)  
2.0  
3.0  
4.5  
6.0  
75  
60  
15  
13  
95  
75  
19  
16  
110  
90  
22  
19  
t , If  
r
Maximum Input Rise and Fall Times  
(Figure 1)  
2.0  
3.0  
4.5  
6.0  
1000  
800  
500  
400  
1000  
800  
500  
400  
1000  
800  
500  
400  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
MOTOROLA  
4
MC54/74HC563A  
SWITCHING WAVEFORMS  
t
t
t
f
w
r
V
CC  
V
90%  
50%  
10%  
CC  
LATCH  
ENABLE  
INPUT D  
Q
50%  
GND  
GND  
t
t
PLH  
PHL  
t
t
PHL  
PLH  
90%  
50%  
10%  
Q
50%  
t
t
TLH  
THL  
50%  
Figure 1.  
Figure 2.  
V
CC  
VALID  
OUTPUT ENABLE  
GND  
V
CC  
t
t
INPUT D  
50%  
t
PZL  
PLZ  
HIGH  
IMPEDANCE  
GND  
t
su  
h
50%  
Q
Q
V
10%  
90%  
V
CC  
OL  
t
t
LATCH  
ENABLE  
PZH  
PHZ  
50%  
V
OH  
GND  
50%  
HIGH  
IMPEDANCE  
Figure 3.  
Figure 4.  
TEST CIRCUITS  
TEST POINT  
TEST POINT  
1 k  
OUTPUT  
CONNECT TO V  
WHEN  
.
PZL  
CC  
OUTPUT  
TESTING t  
AND t  
PLZ  
CONNECT TO GND WHEN  
TESTING t AND t  
DEVICE  
UNDER  
TEST  
DEVICE  
UNDER  
TEST  
.
PZH  
PHZ  
C *  
C *  
L
L
* Includes all probe and jig capacitance  
* Includes all probe and jig capacitance  
Figure 5.  
Figure 6.  
5
MOTOROLA  
MC54/74HC563A  
EXPANDED LOGIC DIAGRAM  
2
3
4
5
6
7
8
9
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D
19  
18  
17  
16  
15  
14  
13  
12  
LE  
Q
Q
Q
Q
Q
Q
Q
Q
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
D
LE  
D
LE  
D
LE  
D
LE  
D
LE  
D
LE  
D
LE  
LATCH  
ENABLE  
11  
1
OUTPUT  
ENABLE  
MOTOROLA  
6
MC54/74HC563A  
OUTLINE DIMENSIONS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 732–03  
ISSUE E  
NOTES:  
1. LEADS WITHIN 0.25 (0.010) DIAMETER, TRUE  
POSITION AT SEATING PLANE, AT MAXIMUM  
MATERIAL CONDITION.  
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
20  
1
11  
10  
3. DIMENSIONS A AND B INCLUDE MENISCUS.  
B
C
MILLIMETERS  
INCHES  
A
DIM  
A
B
C
D
F
MIN  
23.88  
6.60  
3.81  
0.38  
1.40  
MAX  
25.15  
7.49  
5.08  
0.56  
1.65  
MIN  
MAX  
0.990  
0.295  
0.200  
0.022  
0.065  
0.940  
0.260  
0.150  
0.015  
0.055  
L
F
G
H
J
K
L
2.54 BSC  
0.100 BSC  
0.51  
0.20  
3.18  
1.27  
0.30  
4.06  
0.020  
0.008  
0.125  
0.050  
0.012  
0.160  
N
J
7.62 BSC  
0.300 BSC  
H
K
M
G
M
N
0
15  
0
15  
D
0.25  
1.02  
0.010  
0.040  
SEATING  
PLANE  
N SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
ISSUE E  
–A–  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
20  
1
11  
10  
B
L
C
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
MIN  
MAX  
1.070  
0.260  
0.180  
0.022  
MIN  
25.66  
6.10  
3.81  
0.39  
MAX  
27.17  
6.60  
4.57  
0.55  
1.010  
0.240  
0.150  
0.015  
–T–  
SEATING  
PLANE  
K
E
0.050 BSC  
1.27 BSC  
M
0.050  
0.070  
1.27  
1.77  
F
G
J
K
L
N
E
0.100 BSC  
2.54 BSC  
0.008  
0.110  
0.015  
0.140  
0.21  
2.80  
0.38  
3.55  
G
F
J 20 PL  
0.300 BSC  
7.62 BSC  
D 20 PL  
0.25 (0.010)  
M
M
0.25 (0.010)  
T B  
M
N
0
15  
0
15  
0.020  
0.040  
0.51  
1.01  
M
M
T
A
DW SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751D–04  
ISSUE E  
NOTES:  
–A–  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.150  
(0.006) PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.13  
10X P  
–B–  
M
M
0.010 (0.25)  
B
1
10  
(0.005) TOTAL IN EXCESS OF D DIMENSION  
AT MAXIMUM MATERIAL CONDITION.  
MILLIMETERS  
INCHES  
20X D  
DIM  
A
B
C
D
MIN  
12.65  
7.40  
2.35  
0.35  
0.50  
MAX  
12.95  
7.60  
2.65  
0.49  
0.90  
MIN  
MAX  
0.510  
0.299  
0.104  
0.019  
0.035  
J
0.499  
0.292  
0.093  
0.014  
0.020  
M
S
S
0.010 (0.25)  
T
A
B
F
F
G
J
K
M
P
R
1.27 BSC  
0.050 BSC  
0.25  
0.10  
0
0.32  
0.25  
7
0.010  
0.004  
0
0.012  
0.009  
7
R X 45  
10.05  
0.25  
10.55  
0.75  
0.395  
0.010  
0.415  
0.029  
C
SEATING  
PLANE  
–T–  
M
18X G  
K
7
MOTOROLA  
MC54/74HC563A  
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
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MC74HC563A/D  
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