MC74F195N [MOTOROLA]
4-BIT PARALLEL ACCESS SHIFT REGISTER; 4位并行存取移位寄存器
| 型号： | MC74F195N |
| 厂家： | 
MOTOROLA |
| 描述： | 4-BIT PARALLEL ACCESS SHIFT REGISTER |
| 文件： | 总4页 (文件大小：79K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74F195
4-BIT PARALLEL
ACCESS SHIFT REGISTER
The functional characteristics of the MC74F195 4-Bit Parallel Access Shift
Register are indicated in the Logic Diagram and Function Table. The device
isusefulinawidevarietyofshifting, counting, andstorageapplications. Itper-
forms serial, parallel, serial-to-parallel, or parallel-to-serial data transfers at
very high speeds.
4-BIT PARALLEL
ACCESS SHIFT REGISTER
FAST SCHOTTKY TTL
TheMC74F195 operates in two primary modes, shift right (Q -Q )andpar-
0
1
allel load, which are controlled by the state of the Parallel Enable (PE) input.
Serial data enters the first flip-flop (Q ) via the J and K inputs when the PE
0
input is HIGH, and is shifted 1 bit in the direction Q -Q -Q -Q following each
0
1
2
3
LOW-to-HIGH clock transition. The J and K inputs provide the flexibility of the
JK typeinputismadeforspecialapplications, andbytyingthetwopinstogeth-
er the simple D-type input is made for general applications. The device ap-
pears as four common clocked D flip-flops when the PE input is LOW. After
J SUFFIX
CERAMIC
CASE 620-09
16
theLOW-to-HIGHclocktransition, dataontheparallelinputs(D -D ) is trans-
0
3
1
ferred to the respective Q -Q outputs. Shift left operation (Q -Q ) can be
0
3
3
2
achieved by tying the Q outputs to the D
n
inputs and holding the PE input
n-1
LOW.
All parallel and serial data transfers are synchronous, occurring after each
LOW-to-HIGH clock transition. The MC74F195 utilizes edge-triggering;
N SUFFIX
PLASTIC
CASE 648-08
therefore, there is no restriction on the activity of the J, K, D , and PE inputs
n
16
for logic operation, other than the setup and hold time requirements.
A LOW on the asynchronous Master Reset (MR) input sets all Q outputs
LOW, independent of any other input condition.
• Shift Right and Parallel Load Capability
1
• J-K (D-Type) Inputs to First Stage
• Complement Output from Last Stage
• Asynchronous Master Reset
D SUFFIX
SOIC
CASE 751B-03
16
1
ORDERING INFORMATION
MC74FXXXJ
MC74FXXXN Plastic
MC74FXXXD SOIC
Ceramic
CONNECTION DIAGRAM DIP
V
Q
Q
Q
Q
Q
3
CP
10
PE
9
CC
0
1
2
3
16
15
14
13
12
11
LOGIC SYMBOL
9
4
5
6
7
PE D
D
D
D
0
1
2
3
2
10
3
J
Q
11
1
2
J
3
4
5
6
7
8
CP
K
3
MR
K
D
D
D
D
3
GND
0
1
2
MR Q
Q
Q
Q
0
1
2 3
1
15 14 13 12
V
= PIN 16
CC
GND = PIN 8
FAST AND LS TTL DATA
4-104
MC74F195
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
4.5
0
Typ
5.0
25
Max
5.5
70
Unit
V
V
Supply Voltage
Operating Ambient Temperature Range
74
74
74
74
CC
T
A
°C
I
I
Output Current
Output Current
High
Low
–1.0
20
mA
mA
OH
OL
LOGIC DIAGRAM
J
K
D
D
D
D
3
0
1
2
PE
CP
MR
R
R
R
R
D
D
D
D
R
Q
Q
R
R
R
Q
Q
CP
CP
CP
CP
S
S
Q
S
Q
S
Q
Q
Q
Q Q
3 3
0
1
2
FUNCTION TABLE
Inputs
Outputs
Operating Modes
MR
L
CP
X
↑
PE
J
X
h
l
K
D
Q
Q
Q
Q
Q
n
0
1
2
3
3
Asynchronous Reset
Shift, Set First Stage
Shift, Reset First Stage
Shift, Toggle First Stage
Shift, Retain First Stage
Parallel Load
X
h
h
h
h
l
X
h
l
X
L
L
L
L
H
H
X
X
X
X
H
L
q
0
q
0
q
0
q
0
d
1
q
1
q
1
q
1
q
1
d
2
q
2
q
2
q
2
q
2
q
2
d
3
H
↑
q
2
q
2
q
2
d
3
H
↑
h
l
l
q
0
0
0
H
↑
h
X
q
d
H
↑
X
d
n
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
d
(q ) = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition.
n
n
↑ = LOW-to-HIGH clock transition
FAST AND LS TTL DATA
4-105
MC74F195
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Input HIGH Voltage
Min
Typ
Max
Unit
V
Test Conditions
V
IH
2.0
Guaranteed Input HIGH Voltage
Guaranteed Input LOW Voltage
V
V
V
Input LOW Voltage
0.8
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–1.2
V
I
I
= –18 mA
V
CC
V
CC
V
CC
V
CC
V
CC
= MIN
IK
IN
74
74
2.5
2.7
V
= –1.0 mA
= 4.5 V
= 4.75 V
= 4.5 V
= MAX
OH
OH
V
V
OL
Output LOW Voltage
Input HIGH Current
0.5
20
V
I
= 20 mA
= 2.7 V
= 7.0 V
OL
I
µA
V
V
V
V
V
IH
IN
100
–0.6
–150
38
IN
I
I
I
Input LOW Current
mA
mA
mA
= MAX
IL
CC
Output Short Circuit Current (Note 2)
Power Supply Current
–60
= 0 V
V
CC
= MAX
OS
CC
OUT
= MAX
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
54/74F
= + 25°C
74F
T = 0°C to + 70°C
A
T
A
V
= + 5.0 V
= 50 pF
V
CC
= 5.0 V ± 10%
CC
C
C = 50 pF
L
L
Symbol
Parameter
Min
105
2.5
2.5
3.0
3.0
Max
Min
90
Max
Unit
MHz
ns
f
t
t
t
t
max
PLH
PHL
PHL
PLH
Propagation Delay
7.0
8.0
10
2.5
2.5
3.0
3.0
8.0
9.0
11
CP to Q/Q
Propagation Delay, MR to Q
Propagation Delay, MR to Q
ns
ns
10.5
11
FAST AND LS TTL DATA
4-106
MC74F195
AC OPERATING REQUIREMENTS
74F
74F
T
A
= + 25°C
T
A
= 0°C to + 70°C
V
= + 5.0 V
= 50 pF
V
CC
= 5.0 V ± 10%
CC
C
C = 50 pF
L
L
Symbol
Parameter
Min
4.0
4.0
0
Max
Min
4.0
4.0
1.0
1.0
9.0
9.0
0
Max
Unit
t
t
t
t
t
t
t
t
t
t
t
(H)
(L)
(H)
(L)
(H)
(L)
(H)
(L)
(H)
(L)
Setup Time, HIGH or LOW J, K, D to CP
ns
s
s
Hold Time, HIGH or LOW J, K, D to CP
Setup Time, HIGH or LOW PE to CP
Hold Time, HIGH or LOW PE to CP
ns
ns
ns
h
h
s
0
8.0
8.0
0
s
h
h
w
w
0
0
CP Pulse Width, HIGH
MR Pulse Width, LOW
Recovery Time, MR to CP
5.0
5.0
7.0
5.5
5.0
8.0
ns
ns
ns
rec
FAST AND LS TTL DATA
4-107
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