MC74HC4538AN [MOTOROLA]
Dual Precision Monostable Multivibrator(Retiggerable, Resettable); 双精密单稳多谐振荡器（ Retiggerable ，复式）
| 型号： | MC74HC4538AN |
| 厂家： | 
MOTOROLA |
| 描述： | Dual Precision Monostable Multivibrator(Retiggerable, Resettable) |
| 文件： | 总13页 (文件大小：371K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
16
The MC54/74HC4538A is identical in pinout to the MC14538B. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This dual monostable multivibrator may be triggered by either the positive
or the negative edge of an input pulse, and produces a precision output
pulse over a wide range of pulse widths. Because the device has conditioned
trigger inputs, there are no trigger–input rise and fall time restrictions. The
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
output pulse width is determined by the external timing components, R and
x
C . The device has a reset function which forces the Q output low and the Q
output high, regardless of the state of the output pulse circuitry.
x
D SUFFIX
SOIC PACKAGE
CASE 751B–05
16
•
•
•
Unlimited Rise and Fall Times Allowed on the Trigger Inputs
Output Pulse is Independent of the Trigger Pulse Width
± 10% Guaranteed Pulse Width Variation from Part to Part (Using the
Same Test Jig)
1
ORDERING INFORMATION
MC54HCXXXXAJ
MC74HCXXXXAN
MC74HCXXXXAD
Ceramic
Plastic
SOIC
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
PIN ASSIGNMENT
GND
1/R
1
2
16
15
V
CC
GND
•
Chip Complexity: 145 FETs or 36 Equivalent Gates
C
1
X
X
RESET 1
A1
3
4
5
6
7
8
14
13
12
11
10
9
C 2/R 2
X X
RESET 2
A2
LOGIC DIAGRAM
B1
C
1
R 1
X
X
Q1
B2
V
CC
Q1
Q2
1
2
GND
Q2
6
7
4
5
Q1
Q1
A1
B1
TRIGGER
INPUTS
C
2
R 2
X
X
V
CC
FUNCTION TABLE
3
RESET 1
Inputs
Outputs
15
14
Reset
A
B
Q
Q
10
12
11
Q2
Q2
A2
B2
H
H
H
TRIGGER
INPUTS
L
9
H
H
X
H
L
X
Not Triggered
Not Triggered
13
RESET 2
H
H
L,H,
L
H
L,H,
Not Triggered
Not Triggered
PIN 16 = V
CC
PIN 8 = GND
AND C ARE EXTERNAL COMPONENTS
PIN 1 AND PIN 15 MUST BE HARD WIRED TO GND
L
X
X
X
X
L
H
R
X
X
Not Triggered
10/95
Motorola, Inc. 1995
REV 6
MC54/74HC4538A
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
– 0.5 to + 7.0
CC
V
– 1.5 to V
+ 1.5
V
in
CC
V
out
– 0.5 to V
+ 0.5
CC
I
A, B, Reset
C , R
± 20
mA
in
± 30
± 25
± 50
cuit. For proper operation, V and
in
x
x
V
should be constrained to the
out
I
DC Output Current, per Pin
mA
mA
mW
out
range GND (V or V
)
V
CC
.
in out
Unused inputs must always be
tied to an appropriate logic voltage
I
DC Supply Current, V and GND Pins
CC
CC
P
D
Power Dissipation in Still Air, Plastic or Ceramic DIP†
SOIC Package†
750
500
level (e.g., either GND or V ).
CC
Unused outputs must be left open.
T
Storage Temperature
– 65 to + 150
C
C
stg
T
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
(Ceramic DIP)
L
260
300
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
Min
3.0**
0
Max
Unit
V
V
CC
6.0
V , V
in out
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
V
CC
V
T
A
– 55
+ 125
C
t , t
r f
Input Rise and Fall Time
(Figure 7)
V
CC
V
CC
V
CC
= 2.0 V
= 4.5 V
= 6.0 V
0
0
0
1000
500
400
ns
A or B (Figure 5)
—
No Limit
R
C
External Timing Resistor
V
< 4.5 V
≥ 4.5 V
1.0
2.0
*
*
kΩ
µF
x
x
CC
V
CC
External Timing Capacitor
0
*
*The maximum allowable values of R and C are a function of the leakage of capacitor C , the leakage of the HC4538A, and leakage due to
x
x
x
boardlayout and surface resistance. For most applications, C /R should be limited to a maximum value of 10 µF/1.0MΩ. Values of C > 1.0 µF
x
x
x
may cause a problem during power down (see Power Down Considerations). Susceptibility to externally induced noise signals may occur for
> 1.0 MΩ.
R
x
**The HC4538A will function at 2.0 V but for optimum pulse width stability, V
should be above 3.0 V.
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
CC
MOTOROLA
3–2
MC54/74HC4538A
DC CHARACTERISTICS FOR THE MC54/74HC4538A
Guaranteed Limits
– 55 to
25 C
85 C
Max
125 C
Max
V
Volts
CC
Symbol
Parameter
Test Conditions
Unit
Min
Max
Min
Min
V
IH
Minimum High–Level
Input Voltage
V
= 0.1 V or V
– 0.1 V
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
out
CC
|I
|
20 µA
out
V
Maximum Low–Level
Input Voltage
V
= 0.1 V or V
– 0.1 V
2.0
4.5
6.0
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
IL
out
CC
|I
|
20 µA
out
V
OH
Minimum High–Level
Output Voltage
V
= V or V
IH
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
in
IL
|I
|
20 µA
out
V
= V or V
in
IH
IL
|I
|I
|
|
–4.0 mA
–5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
out
out
V
OL
Maximum Low–Level
Output Voltage
V
= V or V
IH
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
in
IL
|I
|
20 µA
out
V
= V or V
in
IH
IL
|I
|I
|
|
4.0 mA
5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
out
out
I
Maximum Input
Leakage Current
(A, B, Reset)
V
V
V
= V
= V
= V
or GND
6.0
6.0
6.0
± 0.1
± 50
130
± 1.0
± 500
220
± 1.0
± 500
350
µA
nA
µA
in
in
in
in
CC
CC
CC
I
in
Maximum Input
Leakage Current
or GND
or GND
(R , C )
x
x
I
I
Maximum Quiescent
Supply Current
(per package)
CC
Q1 and Q2 = Low
= 0 µA
I
out
Standby State
Maximum Supply Current
(per package)
Active State
V
= V or GND
CC
CC
in
– 45 C to
85 C
– 55 C to
125 C
Q1 and Q2 = High
= 0 µA
25 C
400
I
out
Pins 2 and 14 = 0.5 V
6.0
600
800
µA
CC
3–3
MOTOROLA
MC54/74HC4538A
AC CHARACTERISTICS FOR THE MC54/74HC4538A (C = 50 pF, Input t = t = 6.0 ns)
L
r
f
Guaranteed Limits
85 C
– 55 to
25 C
125 C
Min Max
V
Volts
CC
Symbol
Parameter
Maximum Propagation Delay
Input A or B to Q
(Figures 6 and 8)
Unit
Min
Max
Min
Max
t
t
t
t
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
PLH
PHL
PHL
PLH
Maximum Propagation Delay
Input A or B to NQ
(Figures 6 and 8)
2.0
4.5
6.0
195
39
33
245
49
42
295
59
50
ns
ns
ns
ns
pF
Maximum Propagation Delay
Reset to Q
(Figures 7 and 8)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
Maximum Propagation Delay
Reset to NQ
(Figures 7 and 8)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
t
t
Maximum Output Transition Time, Any Output
(Figures 7 and 8)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
TLH
THL
C
Maximum Input Capacitance
(A. B, Reset)
—
10
25
10
25
10
25
in
(C , R )
x
x
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, V
= 5.0 V
CC
C
Power Dissipation Capacitance (Per Multivibrator)*
pF
150
PD
2
* Used to determine the no–load dynamic power consumption: P = C
D
Motorola High–Speed CMOS Data Book (DL129/D).
V
f + I
V . For load considerations, see Chapter 2 of the
CC CC
PD CC
TIMING CHARACTERISTICS FOR THE MC54/74HC4538A (Input t = t = 6.0 ns)
r
f
Guaranteed Limits
– 55 to
25 C
85 C
Max
125 C
Max
V
Volts
CC
Symbol
Parameter
Unit
Min
Max
Min
Min
t
Minimum Recovery Time, Inactive to A or B
(Figure 7)
2.0
4.5
6.0
0
0
0
0
0
0
0
0
0
ns
rec
t
t
Minimum Pulse Width, Input A or B
(Figure 6)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
ns
ns
w
Minimum Pulse Width, Reset
(Figure 7)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
w
t , t
r
Maximum Input Rise and Fall Times, Reset
(Figure 7)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
f
A or B
(Figure 7)
2.0
4.5
6.0
No Limit
MOTOROLA
3–4
MC54/74HC4538A
OUTPUT PULSE WIDTH CHARACTERISTICS (C = 50 pF)t
L
Conditions
Guaranteed Limits
– 55 to
25 C
85 C
Max
0.8
125 C
Max
0.81
V
Volts
CC
Symbol
Parameter
Timing Components
Unit
Min
0.63
Max
Min
Min
τ
Output Pulse Width*
(Figures 6 and 8)
R
= 10 kΩ, C = 0.1 µF
5.0
0.77
0.6
0.59
ms
x
x
—
—
Pulse Width Match
Between Circuits in the
same Package
—
—
—
—
± 5.0
%
%
Pulse Width Match
± 10
Variation (Part to Part)
* For output pulse widths greater than 100 µs, typically τ = kR C , where the value of k may be found in Figure 1.
x x
10 s
1 s
0.8
0.7
0.6
0.5
0.4
0.3
T
= 25°C
A
V
= 5 V, T = 25°C
A
CC
100 ms
10 ms
1 ms
1 M
Ω
100
10
1
µs
µs
µs
100 k
Ω
10 k
Ω
Ω
1 k
100 ns
1
2
3
4
5
6
7
0.00001 0.0001
0.001
0.01
0.1
1
10
100
V
, POWER SUPPLY VOLTAGE (VOLTS)
CAPACITANCE (µF)
CC
Figure 2. Output Pulse Width versus
Timing Capacitance
Figure 1. Typical Output Pulse Width Constant, k,
versus Supply Voltage
(For output pulse widths > 100 µs: τ = kR C )
x x
1.1
T
A
= 25°C
R
C
= 100 k
= 1000 pF
Ω
x
x
1
0.9
0.8
0.7
R
C
= 1 M
Ω
F
x
x
= 0.1
µ
0.6
0.5
1
2
3
4
5
6
7
V
, POWER SUPPLY VOLTAGE (VOLTS)
CC
Figure 3. Normalized Output Pulse Width
versus Power Supply Voltage
3–5
MOTOROLA
MC54/74HC4538A
1.1
1.05
1
V
= 6 V
R
C
= 10 kΩ
= 0.1 µF
CC
x
x
0.95
0.9
0.85
0.8
V
= 3 V
CC
–75 –50
–25
0
25
50
75
100
125
150
T , AMBIENT TEMPERATURE (
°C)
A
Figure 4. Normalized Output Pulse Width
versus Power Supply Voltage
1.03
1.02
1.01
1
R
C
= 10 kΩ
= 0.1 µF
x
x
V
= 5.5 V
CC
0.99
V
= 5 V
CC
0.98
0.97
V
= 4.5 V
CC
–75 –50
–25
0
25
50
75
100
125
150
T , AMBIENT TEMPERATURE (
°C)
A
Figure 5. Normalized Output Pulse Width
versus Power Supply Voltage
MOTOROLA
3–6
MC54/74HC4538A
SWITCHING WAVEFORMS
t
w(H)
V
CC
50%
A
B
GND
t
w(L)
V
CC
50%
GND
t
PLH
t
PLH
τ
τ
50%
Q
Q
t
PHL
t
τ
τ
PHL
50%
Figure 6.
t
t
f
r
V
CC
90%
10%
GND
A
t
rr
V
CC
50%
GND
B
t
t
f
f
V
CC
90%
10%
50%
RESET
GND
t
t
w(L)
rec
t
τ
+ t
rr
TLH
t
PHL
90%
10%
(RETRIGGERED PULSE)
50%
50%
Q
Q
t
t
PLH
THL
90%
10%
50%
Figure 7.
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
C *
L
* Includes all probe and jig capacitance
Figure 8. Test Circuit
3–7
MOTOROLA
MC54/74HC4538A
PIN DESCRIPTIONS
INPUTS
tors (see the Block Diagram). Polystyrene capacitors are
recommended for optimum pulse width control. Electrolytic
capacitors are not recommended due to high leakages
associated with these type capacitors.
A1, A2 (Pins 4, 12)
Positive–edge trigger inputs. A rising–edge signal on
either of these pins triggers the corresponding multivibrator
when there is a high level on the B1 or B2 input.
GND (Pins 1 and 15)
External ground. The external timing capacitors discharge
to ground through these pins.
B1, B2 (Pins 5, 11)
Negative–edge trigger inputs. A falling–edge signal on
either of these pins triggers the corresponding multivibrator
when there is a low level on the A1 or A2 input.
OUTPUTS
Q1, Q2 (Pins 6, 10)
Reset 1, Reset 2 (Pins 3, 13)
Noninverted monostable outputs. These pins (normally
low) pulse high when the multivibrator is triggered at either
the A or the B input. The width of the pulse is determined by
the external timing components, R and C .
Reset inputs (active low). When a low level is applied to
one of these pins, the Q output of the corresponding multi-
vibrator is reset to a low level and the Q output is set to a high
level.
X
X
Q1, Q2 (Pins 7, 9)
C 1/R 1 and C 2/R 2 (Pins 2 and 14)
X
X
X
X
Inverted monostable outputs. These pins (normally high)
pulse low when the multivibrator is triggered at either the A or
the B input. These outputs are the inverse of Q1 and Q2.
External timing components. These pins are tied to the
common points of the external timing resistors and capaci-
LOGIC DETAIL
(1/2 THE DEVICE)
RxCx
UPPER
REFERENCE
CIRCUIT
OUTPUT
LATCH
–
+
V
CC
V
, UPPER
re
LOWER
REFERENCE
CIRCUIT
M1
V
CC
2 k
Ω
–
+
M2
Q
Q
V
, LOWER
re
M3
TRIGGER CONTROL
CIRCUIT
A
B
C
Q
TRIGGER CONTROL
RESET CIRCUIT
CB
R
RESET
POWER
ON
RESET
RESET LATCH
Figure 9.
MOTOROLA
3–8
MC54/74HC4538A
CIRCUIT OPERATION
Figure 12 shows the HC4538A configured in the retrigger-
TRIGGER OPERATION
able mode. Briefly, the device operates as follows (refer to
Figure 10): In the quiescent state, the external timing capac-
The HC4538A is triggered by either a rising–edge signal at
input A (#7) or a falling–edge signal at input B (#8), with the
unused trigger input and the Reset input held at the voltage
levels shown in the Function Table. Either trigger signal will
cause the output of the trigger–control circuit to go high (#9).
The trigger–control circuit going high simultaneously initi-
ates two events. First, the output latch goes low, thus taking
the Q output of the HC4538A to a high state (#10). Second,
transistor M3 is turned on, which allows the external timing
itor, C , is charged to V
put goes high and C discharges quickly to the lower
. When a trigger occurs, the Q out-
x
CC
x
reference voltage (V
ref
Lower 1/3 V
). C then charges,
CC x
through R , back up to the upper reference voltage (V
Up-
), at which point the one–shot has timed out
and the Q output goes low.
x
ref
per
2/3 V
CC
The following, more detailed description of the circuit op-
eration refers to both the logic detail (Figure 9) and the timing
diagram (Figure 10).
capacitor, C , to rapidly discharge toward ground (#11).
x
(Note that the voltage across C appears at the input of both
QUIESCENT STATE
x
the upper and lower reference circuit comparator).
In the quiescent state, before an input trigger appears, the
output latch is high and the reset latch is high (#1 in Fig-
ure 10). Thus the Q output (pin 6 or 10) of the monostable
multivibrator is low (#2, Figure 10).
The output of the trigger–control circuit is low (#3), and
transistors M1, M2, and M3 are turned off. The external tim-
When C discharges to the reference voltage of the lower
x
reference circuit (#12), the outputs of both reference circuits
will be high (#13). The trigger–control reset circuit goes high,
resetting the trigger–control circuit flip–flop to a low state
(#14). This turns transistor M3 off again, allowing C to begin
x
to charge back up toward V , with a time constant t = R C
ing capacitor, C , is charged to V
(#4), and both the upper
CC
x x
x
CC
(#15). Once the voltage across C charges to above the low-
and lower reference circuit has a low output (#5).
In addition, the output of the trigger–control reset circuit is
low.
x
er reference voltage, the lower reference circuit will go low
allowing the monostable multivibrator to be retriggered.
QUIESCENT
STATE
TRIGGER CYCLE
(A INPUT)
TRIGGER CYCLE
(B INPUT)
RESET
RETRIGGER
t
rr
7
TRIGGER INPUT A
(PIN 4 OR 12)
TRIGGER INPUT B
(PIN 5 OR 11)
8
24
9
TRIGGER-CONTROL
CIRCUIT OUTPUT
3
14
11
21
4
23
15
17
18
R
/C INPUT
X
12
X
(PIN 2 OR 14)
V
UPPER
25
ref
13
V
LOWER
ref
5
UPPER REFERENCE
CIRCUIT
13
6
16
LOWER REFERENCE
CIRCUIT
RESET INPUT
(PIN 3 OR 13)
20
1
22
RESET LATCH
10
2
19
Q OUTPUT
(PIN 6 OR 10)
τ
τ
τ + t
rr
Figure 10. Timing Diagram
3–9
MOTOROLA
MC54/74HC4538A
When C charges up to the reference voltage of the upper
x
occurs, the output of the reset latch goes low (#22), turning
on transistor M1. Thus C is allowed to quickly charge up to
reference circuit (#17), the output of the upper reference cir-
cuit goes low (#18). This causes the output latch to toggle,
taking the Q output of the HC4538A to a low state (#19), and
completing the time–out cycle.
x
V
(#23) to await the next trigger signal.
CC
On power up of the HC4538A the power–on reset circuit
will be high causing a reset condition. This will prevent the
trigger–control circuit from accepting a trigger input during
this state. The HC4538A’s Q outputs are low and the Q not
outputs are high.
POWER–DOWN CONSIDERATIONS
Large values of C may cause problems when powering
x
down the HC4538A because of the amount of energy stored
in the capacitor. When a system containing this device is
RETRIGGER OPERATION
powered down, the capacitor may discharge from V
through the input protection diodes at pin 2 or pin 14. Current
through the protection diodes must be limited to 30 mA;
When used in the retriggerable mode (Figure 12), the
HC4538A may be retriggered during timing out of the output
pulse at any time after the trigger–control circuit flip–flop has
CC
therefore, the turn–off time of the V
power supply must not
been reset (#24), and the voltage across C is above the low-
er reference voltage. As long as the C voltage is below the
x
lower reference voltage, the reset of the flip–flop is high, dis-
abling any trigger pulse. This prevents M3 from turning on
during this period resulting in an output pulse width that is
predictable.
CC
C /(30 mA). For example, if
x
be faster than t = V
CC
= 5.0 V and C = 15 µF, the V supply must turn off no
CC
x
V
CC
x
faster than t = (5.0 V) (15 µF)/30 mA = 2.5 ms. This is usually
not a problem because power supplies are heavily filtered
and cannot discharge at this rate.
When a more rapid decrease of V
the HC4538A may sustain damage. To avoid this possibility,
to zero volts occurs,
The amount of undershoot voltage on R C during the
trigger mode is a function of loop delay, M3 conductivity, and
CC
x x
use an external damping diode, D , connected as shown in
V
. Minimum retrigger time, trr (Figure 7), is a function of
x
DD
1) time to discharge R C from V
Figure 11. Best results can be achieved if diode D is chosen
x
to be a germanium or Schottky type diode able to withstand
large current surges.
to lower reference
);3)timetocharge
x x
);2)loopdelay(T
DD
delay
R C from the undershoot voltage back to the lower refer-
voltage(T
discharge
x x
ence voltage (T
).
charge
RESET AND POWER ON RESET OPERATION
Figure 13 shows the device configured in the non–retrig-
gerable mode.
An Application Note (AN1558/D) titled Characterization of
Retrigger Time in the HC4538A Dual Precision Monstable
Multivibrator is being prepared. Please consult the factory for
its availability.
A low voltage applied to the Reset pin always forces the Q
output of the HC4538A to a low state.
The timing diagram illustrates the case in which reset oc-
curs (#20) while C is charging up toward the reference volt-
x
age of the upper reference circuit (#21). When a reset
D
R
X
C
X
V
CC
X
Q
Q
A
B
RESET
Figure 11. Discharge Protection During Power Down
MOTOROLA
3–10
MC54/74HC4538A
TYPICAL APPLICATIONS
C
R
C
X
R
X
X
X
RISING–EDGE
TRIGGER
RISING–EDGE
TRIGGER
V
CC
V
CC
Q
Q
A
B
A
B
Q
Q
B = V
CC
RESET = V
CC
RESET = V
CC
C
R
C
X
R
X
X
X
V
V
CC
CC
A = GND
B
Q
Q
Q
A
B
Q
FALLING–EDGE
TRIGGER
FALLING–EDGE
TRIGGER
RESET = V
CC
RESET = V
CC
Figure 12. Retriggerable Monostable Circuitry
Figure 13. Non–retriggerable Monostable Circuitry
ONE–SHOT SELECTION GUIDE
100 ns
MC14528B
1
µs
10
µs
100
µs
1 ms 10 ms 100 ms 1 s
10 s
MC14536B
MC14538B
MC14541B
HC4538A*
23 HR
5 MIN
* Limited operating voltage (2–6 V)
TOTAL OUTPUT PULSE WIDTH RANGE
RECOMMENDED PULSE WIDTH RANGE
3–11
MOTOROLA
MC54/74HC4538A
OUTLINE DIMENSIONS
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
ISSUE V
–A
–
NOTES:
16
1
9
8
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
–B
–
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
L
C
INCHES
MILLIMETERS
DIM
A
B
C
D
E
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
—
0.39
1.27 BSC
MAX
19.93
7.49
5.08
0.50
0.750
0.240
—
0.015
0.050 BSC
–T
SEAT
–
ING
N
K
PLANE
F
G
J
K
L
M
N
0.055
0.100 BSC
0.008
0.125
0.065
1.40
2.54 BSC
0.21
3.18
1.65
E
M
0.015
0.170
0.38
4.31
J 16 PL
F
G
0.300 BSC
15
0.040
7.62 BSC
15
1.01
0.51
M
S
0.25 (0.010)
T
B
D 16 PL
°
°
0°
0°
M
S
0.25 (0.010)
T
A
0.020
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A
–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
16
9
B
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
1
8
INCHES
MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
MIN
MAX
0.770
0.270
0.175
0.021
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
F
C
L
0.740
0.250
0.145
0.015
0.040
S
0.070
1.77
SEATING
PLANE
–T
0.100 BSC
0.050 BSC
0.015
0.130
0.305
2.54 BSC
1.27 BSC
0.38
3.30
7.74
–
M
K
0.008
0.110
0.295
0.21
2.80
7.50
H
J
G
D 16 PL
M
S
0°
10°
0°
10°
M
M
0.25 (0.010)
T
A
0.020
0.040
0.51
1.01
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A
–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
9
8
–B
–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
M
0.25 (0.010)
B
1
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
MIN
MAX
0.393
0.157
0.068
0.019
0.049
0.386
0.150
0.054
0.014
0.016
0.050 BSC
0.008
0.004
F
K
R X 45°
C
1.25
1.27 BSC
–T
0.19
0.10
0.25
0.25
0.009
0.009
J
SEAT
–
ING
M
K
PLANE
D 16 PL
M
P
R
0
5.80
0.25
°
7
6.20
0.50
°
0
°
7°
0.244
0.019
0.229
0.010
M
S
S
0.25 (0.010)
T
B
A
MOTOROLA
3–12
MC54/74HC4538A
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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