MCM6206BBEJ20R [MOTOROLA]
32K x 8 Bit Fast Static RAM; 32K ×8位高速静态RAM
| 型号： | MCM6206BBEJ20R |
| 厂家： | 
MOTOROLA |
| 描述： | 32K x 8 Bit Fast Static RAM |
| 文件： | 总8页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MCM6206BB/D
SEMICONDUCTOR TECHNICAL DATA
MCM6206BB
Product Preview
32K x 8 Bit Fast Static RAM
The MCM6206BB is a 262,144 bit static random access memory organized as
32,768 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes, while CMOS circuitry reduces power consumption and provides
for greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic small–outline J–leaded packages.
J PACKAGE
300 MIL SOJ
CASE
810B–03
•
•
•
•
•
Single 5 V ± 10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
Fast Access Times: 12/15/20/25 ns
Equal Address and Chip Enable Access Times
Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
Low Power Operation: 125 – 140 mA Maximum AC
Fully TTL Compatible — Three State Output
PIN ASSIGNMENT
A
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
2
W
A
A
3
A
A
A
•
•
4
A
5
A
6
A
A
BLOCK DIAGRAM
7
G
A
8
A
A
A
A
A
9
E
A
V
V
CC
10
11
12
13
14
DQ
DQ
DQ
DQ
DQ
A
SS
DQ
DQ
DQ
A
ROW
DECODER
A
A
A
A
A
MEMORY MATRIX
V
SS
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . Address Input
DQ . . . . . . . . . . Data Input/Data Output
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
.
.
.
DQ
INPUT
DATA
CONTROL
COLUMN I/O
DQ
COLUMN DECODER
V
CC
V
SS
. . . . . . . . . . . Power Supply (+ 5 V)
. . . . . . . . . . . . . . . . . . . . . . . Ground
A
A
A
A
A
A
E
CIRCUIT
CONTROL
W
G
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
6/4/97
Motorola, Inc. 1997
TRUTH TABLE (X = Don’t Care)
E
G
W
Mode
V
CC
Current
Output
Cycle
H
L
L
L
X
H
L
X
H
H
L
Not Selected
Output Disabled
Read
I
, I
High–Z
High–Z
–
SB1 SB2
I
I
I
–
CCA
CCA
CCA
D
Read Cycle
Write Cycle
out
High–Z
X
Write
ABSOLUTE MAXIMUM RATINGS
Rating
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This CMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
Symbol
Value
– 0.5 to + 7.0
– 0.5 to V + 0.5
Unit
Power Supply Voltage
V
CC
V
V
Voltage Relative to V
SS
For Any Pin
V , V
in out
CC
Except V
CC
Output Current
I
± 20
mA
W
out
Power Dissipation
P
D
1.0
Temperature Under Bias
Ambient Temperature
T
bias
– 10 to + 85
0 to + 70
°C
°C
°C
T
A
Storage Temperature—Plastic
T
stg
– 55 to + 125
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for ex-
tended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(V
= 5.0 V ±10%, T = 0 to 70°C, Unless Otherwise Noted)
CC
A
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
4.5
2.2
Typ
5.0
—
Max
Unit
V
Supply Voltage (Operating Voltage Range)
Input High Voltage
V
CC
5.5
V
IH
V
V
+ 0.3**
CC
Input Low Voltage
V
IL
—
0.8
V
– 0.5*
*V (min) = – 0.5 V dc; V (min) = – 2.0 V ac (pulse width ≤ 20 ns)
IL IL
**V (max) = V
+ 0.3 V dc; V (max) = V
+ 2.0 V ac (pulse width ≤ 20 ns)
IH IH
CC
CC
DC CHARACTERISTICS
Parameter
Symbol
Min
—
Max
± 1
± 1
—
Unit
µA
µA
V
Input Leakage Current (All Inputs, V = 0 to V
in
)
I
lkg(I)
CC
Output Leakage Current (E = V or G = V , V
= 0 to V
)
I
lkg(O)
—
IH
IH out
CC
Output High Voltage (I
= – 4.0 mA)
V
OH
2.4
—
OH
Output Low Voltage (I
= 8.0 mA)
V
OL
0.4
V
OL
POWER SUPPLY CURRENTS
Parameter
= Max, f = f
Symbol
– 12
140
40
– 15
– 20
130
35
– 25
Unit
mA
mA
mA
AC Active Supply Current (I
V
)
I
135
35
125
30
out = 0 mA, CC
max
CCA
AC Standby Current (E = V , V = Max, f = f
I
IH CC
max)
SB1
CMOS Standby Current (V
CC
= Max, f = 0 MHz, E ≥ V
– 0.2 V
I
10
10
10
10
CC
SB2
V
in
≤ V
+ 0.2 V, or ≥ V – 0.2 V)
CC
SS
CAPACITANCE (f = 1 MHz, dV = 3 V, T = 25°C, Periodically sampled rather than 100% tested)
A
Characteristic
Address Input Capacitance
Symbol
Max
Unit
pF
C
C
6
8
8
in
in
Control Pin Input Capacitance (E, G, W)
I/O Capacitance
pF
C
pF
I/O
MCM6206BB
2
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(V
= 5.0 V ± 10%, T = 0 to + 70°C, Unless Otherwise Noted)
CC
A
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ns
Output Timing Measurement Reference Level . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
READ CYCLE (See Note 1)
– 12
– 15
– 20
– 25
Parameter
Read Cycle Time
Symbol
Min
12
—
—
—
3
Max
—
12
12
6
Min
15
—
—
—
3
Max
—
15
15
8
Min
20
—
—
—
3
Max
—
20
20
10
—
—
9
Min
25
—
—
—
3
Max
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
t
2
AVAV
Address Access Time
t
25
25
12
—
AVQV
Enable Access Time
t
3
ELQV
GLQV
AXQX
Output Enable Access Time
Output Hold from Address Change
Enable Low to Output Active
Enable High to Output High–Z
Output Enable Low to Output Active
Output Enable High to Output High–Z
Power Up Time
t
t
—
—
7
—
—
8
4,5,6
4,5,6
4,5,6
4,5,6
4,5,6
t
4
4
4
4
—
ELQX
EHQZ
GLQX
GHQZ
t
t
—
0
—
0
—
0
—
0
10
—
—
6
—
7
—
8
t
—
0
—
0
—
0
—
0
10
—
t
t
—
12
—
15
—
20
ELICCH
Power Down Time
—
—
—
—
25
EHICCL
NOTES:
1. W is high for read cycle.
2. All timings are referenced from the last valid address to the first transitioning address.
3. Addresses valid prior to or coincident with E going low.
4. At any given voltage and temperature, t
device and from device to device.
(max) is less than t
(min), and t
GHQZ
(max) is less than t
(min), both for a given
GLQX
EHQZ
ELQX
5. Transition is measured ±500 mV from steady–state voltage.
6. This parameter is sampled and not 100% tested.
7. Device is continuously selected (E = V , G = V ).
IL IL
TIMING LIMITS
The table of timing values shows either a
minimum or a maximum limit for each param-
eter. Input requirements are specified from
the external system point of view. Thus, ad-
dress setup time is shown as a minimum
since the system must supply at least that
much time. On the other hand, responses
from the memory are specified from the de-
vice point of view. Thus, the access time is
shown as a maximum since the device never
provides data later than that time.
Z
= 50 Ω
0
OUTPUT
50
Ω
V
= 1.5 V
L
Figure 1. AC Test Loads
MCM6206BB
MOTOROLA FAST SRAM
3
READ CYCLE 1 (See Note 7)
t
AVAV
A (ADDRESS)
Q (DATA OUT)
t
AXQX
PREVIOUS DATA VALID
DATA VALID
t
AVQV
READ CYCLE 2 (See Note 3)
t
AVAV
A (ADDRESS)
t
AVQV
t
ELQV
E (CHIP ENABLE)
t
EHQZ
t
ELQX
G (OUTPUT ENABLE)
Q (DATA OUT)
t
t
GLQV
GHQZ
t
GLQX
HIGH Z
HIGH Z
DATA VALID
t
EHICCL
t
ELICCH
I
CC
V
CC
SUPPLY CURRENT
I
SB
MCM6206BB
4
MOTOROLA FAST SRAM
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
– 12
– 15
– 20
– 25
Parameter
Write Cycle Time
Symbol
Min
12
0
Max
—
Min
15
0
Max
—
Min
20
0
Max
—
Min
25
0
Max
—
Unit
ns
Notes
t
3
AVAV
Address Setup Time
t
—
—
—
—
ns
AVWL
Address Valid to End of Write
Write Pulse Width
t
10
10
—
12
12
—
15
15
—
20
20
—
ns
AVWH
t
,
—
—
—
—
ns
WLWH
t
WLEH
Write Pulse Width,
G High
t
t
,
10
—
10
—
12
—
15
—
ns
4
WLWH
WLEH
Data Valid to End of Write
Data Hold Time
t
t
6
0
—
—
6
7
0
—
—
7
8
0
—
—
8
10
0
—
—
10
—
—
ns
ns
ns
ns
ns
DVWH
WHDX
Write Low to Output High–Z
Write High to Output Active
Write Recovery Time
NOTES:
t
—
2
—
2
—
2
—
2
5,6,7
5,6,7
WLQZ
t
—
—
—
—
—
—
WHQX
t
0
0
0
0
WHAX
1. A write occurs during the overlap of E low and W low.
2. If G goes low coincident with or after W goes low, the output will remain in a high impedance state.
3. All timings are referenced from the last valid address to the first transitioning address.
4. If G ≥ V , the output will remain in a high impedance state.
IH
5. At any given voltage and temperature, t
(max) is less than t
(min), both for a given device and from device to device.
WHQX
WLQZ
6. Transition is measured ±500 mV from steady–state voltage.
7. This parameter is sampled and not 100% tested.
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
t
AVAV
A (ADDRESS)
t
t
WHAX
AVWH
E (CHIP ENABLE)
t
t
WLWH
WLEH
W (WRITE ENABLE)
t
t
t
WHDX
AVWL
DVWH
D (DATA IN)
DATA VALID
t
t
WHQX
WLQZ
HIGH Z
HIGH Z
Q (DATA OUT)
MCM6206BB
5
MOTOROLA FAST SRAM
WRITE CYCLE 2 (E Controlled, See Note 1)
– 12
– 15
– 20
– 25
Parameter
Write Cycle Time
Symbol
Min
12
0
Max
—
Min
15
0
Max
—
Min
20
0
Max
—
Min
25
0
Max
—
Unit
ns
Notes
t
AVAV
Address Setup Time
t
—
—
—
—
ns
AVEL
Address Valid to End of Write
Enable to End of Write
t
10
9
—
12
10
—
15
12
—
20
15
—
ns
AVEH
t
t
,
—
—
—
—
ns
3,4
ELEH
ELWH
Data Valid to End of Write
Data Hold Time
t
6
0
0
—
—
—
7
0
0
—
—
—
8
0
0
—
—
—
10
0
—
—
—
ns
ns
ns
DVEH
EHDX
t
Write Recovery Time
NOTES:
t
0
EHAX
1. A write occurs during the overlap of E low and W low.
2. All timings are referenced from the last valid address to the first transitioning address.
3. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.
4. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.
WRITE CYCLE 2 (E Controlled, See Note 1)
t
AVAV
A (ADDRESS)
t
AVEH
E (CHIP ENABLE)
t
t
ELEH
ELWH
t
t
EHAX
AVEL
t
WLEH
W (WRITE ENABLE)
t
t
EHDX
DVEH
D (DATA IN)
DATA VALID
HIGH Z
Q (DATA OUT)
MCM6206BB
6
MOTOROLA FAST SRAM
ORDERING INFORMATION
(Order by Full Part Number)
MCM 6206BB EJ XX
X
Motorola Memory Prefix
Part Number
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (12 = 12 ns, 15 = 15 ns, 20 = 20 ns,
25 = 25 ns)
Package (J = 300 mil SOJ, E = Evolutionary Pinout)
Full Part Numbers — MCM6206BBEJ12 MCM6206BBEJ12R
MCM6206BBEJ15 MCM6206BBEJ15R
MCM6206BBEJ20 MCM6206BBEJ20R
MCM6206BBEJ25 MCM6206BBEJ25R
MCM6206BB
7
MOTOROLA FAST SRAM
PACKAGE DIMENSIONS
CASE 810B–03
300 MIL SOJ
28 LEAD
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
F
Y14.5M, 1982.
DETAIL Z
2. DIMENSION A & B DO NOT INCLUDE MOLD
PROTRUSION. MOLD PROTRUSION SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
28
1
15
14
N
3. CONTROLLING DIMENSION: INCH.
4. DIM R TO BE DETERMINED AT DATUM -T-.
D 24 PL
INCHES
MILLIMETERS
M
S
0.18 (0.007)
T
A
DIM
A
B
C
D
MIN
MAX
0.730
MIN
18.29
7.50
3.26
0.39
2.24
0.67
MAX
18.54
0.720
0.295
0.128
0.015
0.088
0.026
S
S
0.18 (0.007)
T
B
0.305
0.148
0.020
0.098
0.032
7.74
3.75
0.50
2.48
0.81
-A-
H BRK
P
-B-
L
G
E
F
M
M
G
H
K
0.050 BSC
1.27 BSC
—
0.020
0.045
—
0.50
1.14
C
E
0.035
0.89
L
0.025 BSC
0.64 BSC
0.10 (0.004)
SEATING PLANE
°
10°
°
10°
M
K
DETAIL Z
-T-
N
P
R
S
0.030
0.330
0.260
0.030
0.045
0.340
0.270
0.040
0.76
8.38
6.60
0.77
1.14
8.64
6.86
1.01
S RAD
R
S
S
0.25 (0.010)
T
B
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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