MJE16106C [MOTOROLA]
8A, 400V, NPN, Si, POWER TRANSISTOR, TO-220AB;
| 型号： | MJE16106C |
| 厂家： | 
MOTOROLA |
| 描述： | 8A, 400V, NPN, Si, POWER TRANSISTOR, TO-220AB 晶体 晶体管 |
| 文件： | 总10页 (文件大小：383K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MJE16106/D
SEMICONDUCTOR TECHNICAL DATA
POWER TRANSISTORS
8 AMPERES
400 VOLTS
100 AND 125 WATTS
Switchmode Bridge Series
. . . specifically designed for use in half bridge and full bridge off line converters.
•
•
•
•
•
•
Excellent Dynamic Saturation Characteristics
Rugged RBSOA Capability
Collector–Emitter Sustaining Voltage — V
Collector–Emitter Breakdown — V
(BR)CES
— 400 V
CEO(sus)
— 650 V
State–of–Art Bipolar Power Transistor Design
Fast Inductive Switching:
t = 30 ns (Typ) @ 100 C
fi
t = 65 ns (Typ) @ 100 C
c
sv
t
= 1.3 µs (Typ) @ 100 C
•
•
Ultrafast FBSOA Specified
100 C Performance Specified for:
RBSOA
Inductive Load Switching
Saturation Voltages
Leakages
MAXIMUM RATINGS
Rating
Symbol
Value
400
650
6
Unit
Vdc
Vdc
Vdc
Adc
Collector–Emitter Sustaining Voltage
Collector–Emitter Breakdown Voltage
Emitter–Base Voltage
V
CEO(sus)
V
CES
EBO
V
Collector Current — Continuous
— Pulsed (1)
I
C
8
16
CASE 221A–06
TO–220AB
I
CM
Base Current — Continuous
— Pulsed (1)
I
6
12
Adc
B
I
BM
Total Power Dissipation @ T = 25 C
P
100
40
0.8
Watts
C
D
@ T = 100 C
C
Derated above 25 C
W/ C
C
Operating and Storage Temperature
T , T
J
–55 to 150
stg
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
R
1.25
275
C/W
C
θJC
Maximum Lead Temperature for
Soldering Purposes 1/8″ from
Case for 5 Seconds
T
L
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
10%.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s and SWITCHMODE are trademarks of Motorola Inc.
REV 1
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (T = 25 C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
V
400
—
—
Vdc
CEO(sus)
(I = 20 mAdc, I = 0)
C
B
Collector Cutoff Current
I
µAdc
CEV
(V
CE
(V
CE
= 650 Vdc, V
= 650 Vdc, V
= 1.5 V)
= 1.5 V, T = 100 C)
—
—
—
—
100
1000
BE(off)
BE(off)
C
Collector Cutoff Current
(V = 650 Vdc, R
I
I
—
—
1000
10
µAdc
µAdc
CER
= 50 Ω, T = 100 C)
CE BE
C
Emitter–Base Leakage
(V = 6.0 Vdc, I = 0)
—
—
EBO
EB
C
ON CHARACTERISTICS (1)
Collector–Emitter Saturation Voltage
(I = 2.5 Adc, I = 0.25 Adc)
V
Vdc
CE(sat)
—
—
—
—
0.2
0.4
0.2
0.3
0.9
2.0
1.0
1.5
C
B
(I = 5.0 Adc, I = 0.5 Adc)
C
C
B
B
B
(I = 5.0 Adc, I = 1.0 Adc)
(I = 5.0 Adc, I = 1.0 Adc, T = 100 C)
C
C
Base–Emitter Saturation Voltage
(I = 5.0 Adc, I = 1.0 Adc)
V
Vdc
—
BE(sat)
—
—
0.9
0.8
1.5
1.5
C
B
(I = 5.0 Adc, I = 1.0 Adc, T = 100 C)
C
B
C
DC Current Gain
h
FE
6
13
22
(I = 8.0 Adc, V
C CE
= 5.0 Vdc)
DYNAMIC CHARACTERISTICS
Dynamic Saturation
V
See Figures 11, 12, and 13
V
CE(dsat)
Output Capacitance
C
—
—
300
pF
ob
(V
CE
= 10 Vdc, I = 0, f
test
= 1.0 kHz)
E
SWITCHING CHARACTERISTICS
Inductive Load (Table 1)
Storage
t
—
—
—
—
—
—
950
45
2000
150
75
ns
sv
Crossover
T
= 25 C
t
t
J
c
I
V
V
= 5.0 A, I = 0.5 A,
B1
Fall Time
Storage
C
20
fi
= 5 V,
BE(off)
CE(pk)
t
sv
1300
65
2600
200
125
= 250 V
Crossover
Fall Time
T
J
= 100 C
t
c
fi
t
30
Resistive Load (Table 2)
Delay Time
t
t
t
—
—
—
—
—
—
30
200
1800
100
1200
70
—
—
—
—
—
—
ns
d
Rise Time
t
r
I
= 1.0 A
I
V
= 5.0 A, I = 0.5 A,
B1
B2
C
CC
Storage Time
s
= 250 V,
PW = 30 µs,
Duty Cycle =
Fall Time
t
f
2.0%
Storage Time
Fall Time
s
V
= 5 V
BE(off)
t
f
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle
2.0%.
2
Motorola Bipolar Power Transistor Device Data
TYPICAL STATIC CHARACTERISTICS
40
30
3
2
T
= 100°C
J
T
= 25°C
J
20
1
0.7
0.5
T
= 100°C
J
T
= –55°C
T
= 25°C
J
J
10
7
0.3
0.2
5
0.1
0.07
V
= 5.0 V
CE
I
/I = 5
C B
0.05
3
2
I
/I = 10
C B
0.03
0.05
0.1
0.2
0.5
1
2
5
10
10
5
0.5 0.7
1
2
3
5
7
10
0.01 0.02
0.1
0.2 0.3
I
, COLLECTOR CURRENT (AMPS)
C
I
, COLLECTOR CURRENT (AMPS)
C
Figure 1. DC Current Gain
Figure 2. Collector–Emitter Saturation Voltage
5
2.0
1.5
T
= 25°C
J
3
2
8 A
I
= 1 A
3 A
5 A
7 A
C
1.0
0.7
1
0.7
T
= 25°C
J
0.5
0.5
0.3
0.2
T
= 100°C
J
I
I
/I = 10
/I = 5
C B
C B
0.3
0.2
0.1
0.07
0.05
.01
.02 .03 .05 .070.1
0.2 0.3 0.5 0.7 1
2
3
5
7
0.1
0.2
0.3
I
0.5 0.7
1
2
3
5
7
10
I
, BASE CURRENT (AMPS)
, COLLECTOR CURRENT (AMPS)
B
C
Figure 3. Collector–Emitter Saturation Region
Figure 4. Base–Emitter Saturation Region
10K
7K
5K
3K
2K
T
= 25°C
J
C
ib
f = 1.0 kHz
1K
700
500
300
200
C
ob
100
70
50
30
20
10
0.1 0.2
0.5
1
2
10 20
50 100 200 500 1000
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
CE
Figure 5. Capacitance
3
Motorola Bipolar Power Transistor Device Data
TYPICAL INDUCTIVE SWITCHING CHARACTERISTICS
I /I = 10, T = 100°C, V
= 250 V
C B
C
CE(pk)
20K
10K
1K
700
500
I
= 2 (I )
B1
B2
I
= 2 (I )
B1
B2
7K
5K
I
= I
B2 B1
300
200
I
= I
B2 B1
3K
2K
100
70
V
= 2 V
BE(off)
1K
700
500
50
V
= 5 V
BE(off)
V
= 2 V
BE(off)
V
= 5 V
30
20
BE(off)
300
200
1.5
10
1.5
2
3
5
7
10
15
2
3
5
I , COLLECTOR CURRENT (AMPS)
C
7
10
15
I
, COLLECTOR CURRENT (AMPS)
C
Figure 6. Inductive Storage Time
Figure 7. Crossover Time
1 K
700
500
300
200
V
= 2 V
BE(off)
I
= I
B2 B1
100
70
50
V
= 5 V
BE(off)
30
20
I
= 2 (I )
B1
B2
10
1.5
2
3
5
7
10
I
, COLLECTOR CURRENT (AMPS)
C
Figure 8. Collector Current Fall Time
10
I
C(pk)
V
CE(pk)
9
8
90% V
90% I
CE(pk)
C(pk)
7
6
5
4
3
2
I
t
t
t
t
ti
C
I
I
= 1.0 A
= 1.0 A
sv
rv
fi
B1
B1
t
c
V
CE
10% V
CE(pk)
10%
2% I
I
C
B
90% I
B1
I
C(pk)
I
T
= 5.0 A
= 25°C
C
J
1
0
TIME
t, TIME
0
1
2
3
4
5
6
7
8
9
10
V
, REVERSE BASE VOLTAGE (VOLTS)
BE(off)
Figure 9. Inductive Switching Measurements
Figure 10. Peak Reverse Base Current
4
Motorola Bipolar Power Transistor Device Data
Table 1. Inductive Load Switching
Drive Circuit
V
+15
1
CEO(sus)
I
L = 10 mH
C(pk)
100 µF
µF
150
Ω
100 Ω
R
V
= ∞
= 20 Volts
= 20 mA
B2
CC
I
C
MTP8P10
MTP8P10
V
I
CE(pk)
C(pk)
Inductive Switching
L = 200 µH
R
B1
V
CE
MPF930
A
R
V
= 0
= 20 Volts
selected for desired I
B2
CC
+10
MPF930
I
B1
R
B2
R
B1
B1
I
MUR105
MJE210
B
50
Ω
RBSOA
L = 200 µH
MTP12N10
I
B2
R
V
= 0
= 20 Volts
selected for desired I
B1
B2
CC
500 µF
1 µF
*I
C
150
Ω
R
B1
L
V
off
A
T.U.T.
L
(I )
coil Cpk
*Tektronix AM503
*P6302 or Equivalent
Scope — Tektronix
7403 or Equivalent
MR918
T
T
+ V
– V
1
1
*I
V
CC
adjusted to obtain I
B
T
V
CC
1
C(pk)
V
0 V
clamp
Note: Adjust V to obtain desired V
off
at Point A.
BE(off)
Table 2. Resistive Load Switching
+15
100 µF
t
and t
t and t
s f
1
µF
150
Ω
100 Ω
d
r
H.P. 214
OR
MTP8P10
MTP8P10
*I
C
EQUIV.
P.G.
*I
B
V
adjusted
(off)
R
B1
T.U.T.
MPF930
to give specified
off drive
R
L
R
= 8.5
Ω
A
B
+10 V
50
50
MPF930
V
R
CC
B2
MUR105
MJE210
Ω
MTP12N10
V
250 V
CC
I
5 A
0.5 A
C
V
250 Vdc
25 Ω
500
µF
CC
I
I
1 µF
B1
150
Ω
R
L
≈
11 V
Per Spec
30 Ω
V
B2
in
I
5 A
V
C
off
0 V
R
R
B1
I
0.5 A
B
T.U.T.
A
t
≤ 15 ns
r
Per Spec
25 Ω
B2
*I
C
R
L
*I
R
B
L
*Tektronix AM503
*P6302 or Equivalent
V
CC
5
4
3
2
V
= DYNAMIC SATURATION VOLTAGE
CE(dsat)
AND IS MEASURED FROM THE 90% POINT OF
(t = 0) TO A MEASUREMENT POINT ON THE
I
T
= 5 A
= 25°C
C
J
V
CE
I
B1
TIME AXIS (t , t or t etc.)
1
2
3
t = 1 µs
90% I
B1
t = 2
µs
1
I
B1
MAXIMUM
TYPICAL
0
0
0
0.5
1
1.5
I , BASE CURRENT (AMPS)
B
2
2.5
0
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
t, TIME
Figure 11. Definition of Dynamic Saturation
Measurement
Figure 12. Dynamic Saturation Voltage
5
Motorola Bipolar Power Transistor Device Data
DYNAMIC SATURATION VOLTAGE
+ 24
For bipolar power transistors low DC saturation voltages
are achieved by conductivity modulating the collector region.
Since conductivity modulation takes a finite amount of time,
DC saturation voltages are not achieved instantly at turn–on.
In bridge circuits, two transistor forward converters, and two
transistor flyback converters dynamic saturation characteris-
tics are responsible for the bulk of dynamic losses. The
MJE16106 has been designed specifically to minimize these
losses. Performance is roughly four times better than the
original version of MJ16006.
MJ11012
Q1
1N5314
8
1 k
100
2.4
20 W
Ω
Ω
4
0.01 µF
µ
F
1N4111
100
1 W
7
1N5831
1 k
10 k
2.4 mH
U1
MC1455
6
2
100 pF
Q4
IRFD9120
Q5
MTM8P08
(OSCILLATOR)
3
1
5
10 µF
0.1 µF
0.01 µF
I
C
47
1 W
Ω
From a measurement point of view, dynamic saturation
voltage is defined as collector–emitter voltage at a specific
I
B
4
8
MUR405
1.8 k
IRFD9123
T.U.T.
V
1N914
CE
500
Ω
point in time after I
has been applied, where t = 0 is the
7
B1
MUR405
U2
MC1455
(25
Q2
10
k
90% point on the I rise time waveform. This definition is il-
B1
2
Q6
6
3
µ
s)
lustrated in Figure 11. Performance data was taken in the cir-
cuit that is shown in Figure 13. The 24 volt rail allows a
Tektronix 2445 or equivalent scope to operate at 1 volt per
division without input amplifier saturation.
MTP25N06
Q3
IRFD113
1
5
0.01 µF
0.01 µF
Dynamic saturation performance is illustrated in Figure 12.
The MJE16106 reaches DC saturation levels in approxi-
mately 2 µs, provided that sufficient base drive is provided.
The dependence of dynamic saturation voltage upon base
Figure 13. Dynamic Saturation Test Circuit
drive suggests a spike of I at turn–on to minimize dynamic
B1
saturation losses, and also avoid overdrive at turn–off. How-
ever, in order to simulate worst case conditions the guaran-
teed dynamic saturation limits in this data sheet are specified
with a constant level of I
.
B1
GUARANTEED SAFE OPERATING AREA INFORMATION
20
20
10
7
I
/I = 5
18
C B1
5
1.0 ms
MJE16106
16
14
10 µs
3
2
T
≤ 100°C
J
T
= 25°C
C
100 ns
II
dc
12
10
8
1
0.7
0.5
0.3
0.2
REGION II — EXPANDED
FBSOA USING MUR870
ULTRAFAST RECTIFIER
(SEE FIGURE 16)
V
= 1 to 5 V
BE(off)
6
4
WIRE BOND LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
0.1
0.07
0.05
2
0
V
= 0 V
BE(off)
0.03
0.02
LIMIT
7
10
20
30
50 70 100
200 300
500 650
0
100 200
300
400
500 600
700 800 900
1K
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
CE
CE
Figure 14. Maximum Rated Forward Bias
Safe Operating Area
Figure 15. Maximum Rated Reverse Bias
Safe Operating Area
+15
V
(650 V MAX)
CE
150
Ω
100 Ω
1.0
µF
100 µF
10
MTP8P10
µF
MTP8P10
10 mH
MUR870
R
B1
MUR170
MPF930
MUR105
+10
T.U.T.
MPF930
R
B2
MUR105
50
Ω
MTP12N10
MJE210
500 µF
1 µF
Note: Test Circuit for Ultra–fast FBSOA
Note: R = 0 and V = –5 Volts
150
Ω
B2 Off
V
Off
Figure 16. Switching Safe Operating Area
Motorola Bipolar Power Transistor Device Data
6
100
80
SECOND BREAKDOWN
DERATING
60
40
20
0
THERMAL
DERATING
0
40
80
120
160
200
T
, CASE TEMPERATURE (°C)
C
Figure 17. Power Derating
1
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
P
0.1
(pk)
Z
R
= r(t) R
θJC
θ
θ
JC(t)
= 1.0 OR 1.25
0.05
0.02
0.07
0.05
°
C/W MAX
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
0.03
0.02
t
1
2
T
– T = P
Z
0.01
J(pk)
C
(pk) θ
JC
20
DUTY CYCLE, D = t /t
1 2
SINGLE PULSE
0.05 0.1
0.01
0.01
0.02
0.2
0.5
1
2
5
10
50
100
200
500
1.0 k
t, TIME (ms)
Figure 18. Typical Thermal Response [Z
θJC
(t)]
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Biased Safe Operating Area
and represents the voltage–current condition allowable dur-
ing reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 15 gives the RBSOA character-
istics.
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate I – V
limits of
C
CE
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data in Figure 14 is based on T = 25 C; T
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
is
J(pk)
C
when T ≥ 25 C. Second breakdown limitations do not
C
SWITCHMODE III DESIGN CONSIDERATIONS
FBSOA
derate the same as thermal limitations. Allowable current at
the voltages shown on Figure 14 may be found at any case
temperature by using the appropriate curve on Figure 17.
T
may be calculated from the data in Figure 18. At high
J(pk)
Allowable dc power dissipation in bipolar power transistors
decreases dramatically with increasing collector–emitter
voltage. A transistor which safely dissipates 100 watts at
10 volts will typically dissipate less than 10 watts at its rated
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations im-
posed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
V
. Fromapowerhandlingpointofview,current
(BR)CEO(sus)
and voltage are not interchangeable (see Application Note
AN875).
7
Motorola Bipolar Power Transistor Device Data
TURN–ON
quate forward base current is needed for safe turn–on, as is
a stiff negative bias needed for safe turn–off. Any hiccup in
the base–drive circuitry that even momentarily violates either
of these conditions will likely cause the transistor to fail.
Therefore, it is important to design the driver so that its out-
put is negative in the absence of anything but a clean crisp
input signal (see Application Note AN952).
Safe turn–on load line excursions are bounded by pulsed
FBSOA curves. The 10 µs curve applies for resistive loads,
most capacitive loads, and inductive loads that are clamped
by standard or fast recovery rectifiers. Similarly, the 100 ns
curve applies to inductive loads which are clamped by ultra–
fast recovery rectifiers, and are valid for turn–on crossover
times less than 100 ns (AN952).
RBSOA
At voltages above 75% of V
, it is essential
(BR)CEO(sus)
Reversed Biased Safe Operating Area has a first order de-
pendency on circuit configuration and drive parameters. The
RBSOA curves in this data sheet are valid only for the condi-
tions specified. For a comparison of RBSOA results in sever-
al types of circuits (see Application Note AN951).
to provide the transistor with an adequate amount of base
drive VERY RAPIDLY at turn–on. More specifically, safe op-
eration according to the curves is dependent upon base cur-
rent rise time being less than collector current rise time. As a
general rule, a base drive compliance voltage in excess of
10 volts is required to meet this condition (see Application
Note AN875).
DESIGN SAMPLES
Transistor parameters tend to vary much more from wafer
lot to wafer lot, over long periods of time, than from one de-
vice to the next in the same wafer lot. For design evaluation
it is advisable to use transistors from several different date
codes.
TURN–OFF
A bipolar transistor’s ability to withstand turn–off stress is
dependent upon its forward base drive. Gross overdrive vio-
lates the RBSOA curve and risks transistor failure. For this
reason, circuits which use fixed base drive are more likely to
fail at light loads due to heavy overdrive (see Application
Note AN875).
BAKER CLAMPS
Many unanticipated pitfalls can be avoided by using Baker
Clamps. MUR105 and MUR170 diodes are recommended
for base drives less than 1 amp. Similarly, MUR405 and
MUR470 types are well–suited for higher drive requirements
(see Article Reprint AR131).
OPERATION ABOVE V
(BR)CEO(sus)
When bipolars are operated above collector–emitter
breakdown, base drive is crucial. A rapid application of ade-
8
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
NOTES:
SEATING
PLANE
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–T–
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
C
S
B
F
T
4
INCHES
MIN
MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
MAX
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
–––
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.46
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
–––
MAX
15.75
10.28
4.82
0.88
3.73
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
–––
A
K
Q
Z
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.018
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
–––
1
2
3
U
H
L
R
J
V
G
T
U
V
D
N
Z
0.080
2.04
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
CASE 221A–06
TO–220AB
ISSUE Y
9
Motorola Bipolar Power Transistor Device Data
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