MPC7400RX500LK [MOTOROLA]
RISC Microprocessor, 32-Bit, 500MHz, CMOS, CBGA360, CERAMIC, BGA-360;
| 型号： | MPC7400RX500LK |
| 厂家： | 
MOTOROLA |
| 描述： | RISC Microprocessor, 32-Bit, 500MHz, CMOS, CBGA360, CERAMIC, BGA-360 外围集成电路 |
| 文件： | 总2页 (文件大小：504K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MPC7400FACT/D
Rev. 1
F a c t S h e e t
MO T O R O L A MPC7400
™
PO W E R PC MI C R O P R O C E S S O R S
The MPC7400 PowerPC microprocessor is a high-performance, low-power, 32-bit implementation of the PowerPC
Reduced Instruction Set Computer (RISC) architecture combined with a full 128-bit implementation of Motorola’s
AltiVec™ technology instruction set, creating a high-performance RISC microprocessor ideal for leading-edge
computing, control, and signal processing functions. The MPC7400 supports the high-bandwidth MPX bus with
minimized signal setup times and reduced idle cycles to increase maximum operating frequency to over 100 MHz,
increased address bus bandwidth, increased data bus bandwidth, and more enhancements. To maintain backward
compatibility for existing applications, the MPC7400 also supports the 60x bus protocol. MPC7400 microprocessors
offer single-cycle double-precision floating-point performance, provide full symmetric multiprocessing (SMP)
capabilities, and support up to 2MB of backside L2 cache. While the
MPC7400 Microprocessor
MPC7400 is software-compatible with existing applications for
PowerPC 603e™, PowerPC 740™, and PowerPC 750™
microprocessors, to utilize the full potential of this AltiVec
technology-enabled device, some instruction changes in existing source
code are required to interface with the vector execution unit.
Superscalar Microprocessor
MPC7400 microprocessors feature a high-frequency superscalar
PowerPC core, capable of issuing three instructions per clock cycle
(two instructions + branch) into seven independent execution units:
ꢀ
Two integer units
ꢀ
Double-precision floating-point unit
ꢀ
Vector unit
ꢀ
Load/store unit
System unit
Branch processing unit
Motorola MPC7400 Block Diagram
ꢀ
ꢀ
Completion
Unit
Branch
Unit
Dispatch
Unit
AltiVec Technology
Motorola’s AltiVec technology expands the capabilities of
PowerPC microprocessors by providing leading-edge,
general-purpose processing performance while
concurrently addressing high-bandwidth data processing
and algorithmic-intensive computations in a single-chip
solution. AltiVec technology:
Integer
Floating
Vector
Unit
Vector
Reg File
Unit
Point Unit
Integer
Reg File
Floating Point
Reg File
Load/Store Unit
ꢀ
Meets the computational demands of networking
D MMU
Data Cache
I MMU
Instruction Cache
infrastructure such as multichannel modems, echo
cancellation equipment, and basestation processing.
L2 Tags
Bus Interface Unit
ꢀ
Enables faster, more secure encryption methods
optimized for the SIMD processing model
Provides compelling performance for multimedia-
64b L2
Cache Port
32b Address
64b Data
ꢀ
oriented desktop computers, desktop publishing, and
digital video processing
60x/MPX Bus
FSRAM
ꢀ
Enables real-time processing of the most demanding
data streams (MPEG-2 encode, continuous speech recognition, real-time high-resolution 3D graphics, etc.)
Power Management
MPC7400 microprocessors feature a low-power 1.8-volt design with three power-saving user-programmable modes —
nap, doze (with bus snoop) and sleep— which progressively reduce the power drawn by the processor. The MPC7400
also provides a thermal assist unit and instruction cache throttling for software-controllable thermal management.
Cache and MMU Support
The MPC7400 microprocessor has separate 32-Kbyte, physically-addressed instruction and data caches. Both caches
feature cache locking and are eight-way set-associative. The MPC7400 microprocessor’s dedicated L2 cache interface
with on-chip L2 tags features a very fast (up to core speed, 1:1) interface to memory, instruction-only or data-only
modes, and parity checking on both L2 address and data.
MPC7400 microprocessors contain separate memory management units (MMUs) for instructions and data, supporting
52
32
4 Petabytes (2 ) of virtual memory and 4 Gigabytes (2 ) of physical memory. They also offer four instruction block
address translation (iBAT) and four data block address translation (dBAT) registers.
MPX Bus Interface
MPC7400 microprocessors support the MPX bus architecture with a 64-bit data bus and a 32-bit address bus. Support
is included for burst, split and pipelined transactions, data streaming, out-of-order transactions, and data intervention (in
SMP systems). The interface provides snooping for
Motorola MPC7400 Processor Summary
data cache coherency. The MPC7400 implements
MPC7400
MERSI coherency protocol for multiprocessing in
350-500 MHz
hardware, allowing access to system memory for
350, 400, 450, and 500 MHz
CPU Speeds – Internal
additional caching bus masters, such as DMA
devices.
x3, x3.5, x4, x4.5, x5, x5.5,
x6, x6.5, x7, x7.5, x8, x9
CPU Bus Dividers
Bus Interface
Bus Protocol
64-bit
MPX/60x
Example Applications
3 (2 + Branch)
Instructions per Clock
L1 Cache
ꢀ
Networking and telecommunications
32-Kbyte instruction
32-Kbyte data
infrastructure
512 Kbyte,
1 Mbyte, or 2 Mbyte
ꢀ
High-performance computing (scientific,
L2 Cache
medical, etc.)
Desktop and portable computing
Core-to-L2 Frequency
1:1,1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1
5.0W/11.5W @ 400 MHz
ꢀ
Typical/Maximum
Power Dissipation
2
83 mm
Die Size
Package
Contact Information
360 CBGA
0.18µ 5LM CMOS
Motorola offers user’s manuals, application notes,
sample code and full local support for the PowerPC
product line. For more information, visit:
http://motorola.com/PowerPC/ and
http://motorola.com/AltiVec/
Process
1.8V internal,1.8/2.5/3.3V I/O
21.4 @ 450 MHz
Voltage
SPECint95 (estimated)
SPECfp95 (estimated)
Other Performance
20.4 @ 450 MHz
825 MIPS @ 450 MHz
Integer(2), Floating-Point, Vector,
Branch, Load/Store, System
For all other inquiries about Motorola products,
please contact the Motorola Customer Response
Center at: 1-800-521-6274 or
Execution Units
Motorola PowerPC 7xxx Part Number Key
http://motorola.com/semiconductors
XPC
7400
RX
400
L
K
Frequency
3 digits
Revision
7xxx Series Device
(7400)
Spec Definition
Package
RX CBGA w/o Lid
Product Code
PPC Sample
XPC XC qualified
MPC Qualified
L
P
1.8V,105°C
2.15V, 65°C
© 2000 Motorola, Inc. All rights reserved. Printed in the U.S.A. Motorola and the Motorola logo are registered trademarks and DigitalDNA, the DigitalDNA logo and AltiVec are
trademarks of Motorola, Inc. PowerPC, the PowerPC logo, PowerPC 603e, PowerPC 740, and PowerPC 750 are trademarks of International Business Machines Corporation and
used under license therefrom. All other trademarks are the property of their respective owners.
1ATX45602-1 Printed in USA 5/00 Hibbert LITRISC
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