SN54LS112AJD [MOTOROLA]
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16;
| 型号： | SN54LS112AJD |
| 厂家： | 
MOTOROLA |
| 描述： | J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16 触发器 |
| 文件： | 总4页 (文件大小：150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54/74LS112A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54/74LS112A dual JK flip-flop features individual J, K, clock, and
asynchronous set and clear inputs to each flip-flop. When the clock goes
HIGH, the inputs are enabled and data will be accepted. The logic level of the
J and K inputs may be allowed to change when the clock pulse is HIGH and
thebistablewillperformaccordingtothetruthtableaslongasminimumset-up
and hold time are observed. Input data is transferred to the outputs on the
negative-going edge of the clock pulse.
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
LOGIC DIAGRAM (Each Flip-Flop)
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
16
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
MODE SELECT — TRUTH TABLE
INPUTS
OUTPUTS
OPERATING MODE
S
D
C
J
K
Q
Q
D
Set
L
H
L
H
H
H
H
H
L
L
H
H
H
H
X
X
X
h
l
X
X
X
h
h
l
H
L
H
q
L
H
q
L
H
H
q
H
L
LOGIC SYMBOL
Reset (Clear)
*Undetermined
Toggle
Load “0” (Reset)
Load “1” (Set)
Hold
h
l
l
q
* BothoutputswillbeHIGHwhilebothS andC areLOW,buttheoutputstates
D
D
are unpredictable if S and C go HIGH simultaneously.
D
D
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input (or output)
l, h (q) = one set-up time prior to the HIGH to LOW clock transition.
FAST AND LS TTL DATA
5-185
SN54/74LS112A
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
T
A
Operating Ambient Temperature Range
54
74
–55
0
25
25
125
70
°C
I
I
Output Current — High
Output Current — Low
54, 74
–0.4
mA
mA
OH
54
74
4.0
8.0
OL
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Input HIGH Voltage
Unit
Test Conditions
Min
Typ
Max
Guaranteed Input HIGH Voltage for
All Inputs
V
2.0
V
IH
54
74
0.7
0.8
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
V
V
V
V
= MIN, I = –18 mA
IN
IK
CC
54
74
2.5
2.7
= MIN, I
OH
= MAX, V = V
IN IH
CC
OH
or V per Truth Table
IL
3.5
V
V
= V
MIN,
54, 74
0.25
0.4
0.5
I
= 4.0 mA
= 8.0 mA
CC
IN
CC
OL
OL
= V or V
V
OL
Output LOW Voltage
J, K
IL IH
74
0.35
V
I
per Truth Table
20
60
80
Set, Clear
µA
V
CC
= MAX, V = 2.7 V
IN
Clock
I
I
Input HIGH Current
IH
J, K
0.1
0.3
0.4
Set, Clear
Clock
mA
mA
V
V
= MAX, V = 7.0 V
IN
CC
Input LOW Current
J, K
–0.4
–0.8
= MAX, V = 0.4 V
IN
IL
CC
Clear, Set, Clk
I
I
Short Circuit Current (Note 1)
Power Supply Current
–20
–100
6.0
mA
mA
V
V
= MAX
= MAX
OS
CC
CC
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C, V
CC
= 5.0 V)
A
Limits
Typ
45
Symbol
Parameter
Unit
MHz
ns
Test Conditions
Min
Max
f
Maximum Clock Frequency
30
MAX
V = 5.0 V
CC
= 15 pF
15
20
20
t
t
Propagation Delay, Clock
Clear, Set to Output
PLH
PHL
C
L
15
ns
AC SETUP REQUIREMENTS (T = 25°C, V
CC
= 5.0 V)
A
Limits
Typ
Symbol
Parameter
Clock Pulse Width High
Clear, Set Pulse Width
Setup Time
Unit
ns
Test Conditions
Min
20
25
20
0
Max
t
t
t
t
W
ns
W
s
V
CC
= 5.0 V
ns
Hold Time
ns
h
FAST AND LS TTL DATA
5-186
Case 751B-03 D Suffix
16-Pin Plastic
SO-16
-A-
16
1
9
8
P
C
-B-
R X 45°
G
-T-
J
M
F
D
°
°
°
°
K
Case 648-08 N Suffix
16-Pin Plastic
-A-
16
1
9
B
S
8
F
L
C
K
-T-
M
H
J
G
D
°
°
°
°
Case 620-09 J Suffix
16-Pin Ceramic Dual In-Line
-A-
16
9
-B-
1
8
L
C
-T-
K
M
N
E
J
F
G
D
°
°
°
°
FAST AND LS TTL DATA
5-187
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