SN74LS113ANS [MOTOROLA]

J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14;
SN74LS113ANS
型号: SN74LS113ANS
厂家: MOTOROLA    MOTOROLA
描述:

J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDIP14

触发器
文件: 总3页 (文件大小:90K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54/74LS113A  
DUAL JK NEGATIVE  
EDGE-TRIGGERED FLIP-FLOP  
The SN54/74LS113A offers individual J, K, set, and clock inputs. These  
monolithic dual flip-flops are designed so that when the clock goes HIGH, the  
inputs are enabled and data will be accepted. The logic level of the J and K  
inputs may be allowed to change when the clock pulse is HIGH and the  
bistable will perform according to the truth table as long as minimum setup  
times are observed. Input data is transferred to the outputs on the  
negative-going edge of the clock pulse.  
DUAL JK NEGATIVE  
EDGE-TRIGGERED FLIP-FLOP  
LOW POWER SCHOTTKY  
LOGIC DIAGRAM (Each Flip-Flop)  
J SUFFIX  
CERAMIC  
CASE 632-08  
14  
1
N SUFFIX  
PLASTIC  
CASE 646-06  
14  
1
D SUFFIX  
SOIC  
CASE 751A-02  
14  
1
ORDERING INFORMATION  
SN54LSXXXJ Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
MODE SELECT — TRUTH TABLE  
INPUTS  
J
OUTPUTS  
OPERATING MODE  
S
D
K
Q
Q
Set  
Toggle  
Load “0” (Reset)  
Load “1” (Set)  
Hold  
L
X
h
l
h
l
X
h
h
l
H
q
L
H
q
L
q
H
L
q
H
H
H
H
LOGIC SYMBOL  
l
H, h = HIGH Voltage Level  
L, I = LOW Voltage Level  
X = Don’t Care  
l, h (q) = Lower case letters indicate the state of the referenced input (or output)  
l, h (q) = one set-up time prior to the HIGH to LOW clock transition.  
FAST AND LS TTL DATA  
5-189  
SN54/74LS113A  
GUARANTEED OPERATING RANGES  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
V
CC  
Supply Voltage  
54  
74  
4.5  
4.75  
5.0  
5.0  
5.5  
5.25  
V
T
A
Operating Ambient Temperature Range  
54  
74  
55  
0
25  
25  
125  
70  
°C  
I
I
Output Current — High  
Output Current — Low  
54, 74  
0.4  
mA  
mA  
OH  
54  
74  
4.0  
8.0  
OL  
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)  
Limits  
Symbol  
Parameter  
Input HIGH Voltage  
Unit  
Test Conditions  
Min  
Typ  
Max  
Guaranteed Input HIGH Voltage for  
All Inputs  
V
2.0  
V
IH  
54  
74  
0.7  
0.8  
Guaranteed Input LOW Voltage for  
All Inputs  
V
V
V
Input LOW Voltage  
V
IL  
Input Clamp Diode Voltage  
Output HIGH Voltage  
0.65  
3.5  
1.5  
V
V
V
V
V
V
= MIN, I = 18 mA  
IN  
IK  
CC  
54  
74  
2.5  
2.7  
= MIN, I  
OH  
= MAX, V = V  
IN  
CC  
IH  
OH  
or V per Truth Table  
IL  
3.5  
V
V
= V  
CC  
MIN,  
= V or V  
IL IH  
54, 74  
0.25  
0.4  
0.5  
I
= 4.0 mA  
= 8.0 mA  
CC  
IN  
OL  
OL  
V
OL  
Output LOW Voltage  
74  
0.35  
V
I
per Truth Table  
J, K  
Set  
Clock  
20  
60  
80  
µA  
V
CC  
= MAX, V = 2.7 V  
IN  
I
I
Input HIGH Current  
Input LOW Current  
IH  
J, K  
Set  
Clock  
0.1  
0.3  
0.4  
mA  
mA  
V
V
= MAX, V = 7.0 V  
IN  
CC  
J, K  
Set, Clock  
0.4  
0.8  
= MAX, V = 0.4 V  
IN  
IL  
CC  
I
I
Short Circuit Current (Note 1)  
Power Supply Current  
20  
100  
6.0  
mA  
mA  
V
V
= MAX  
= MAX  
OS  
CC  
CC  
CC  
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.  
AC CHARACTERISTICS (T = 25°C, V  
CC  
= 5.0 V)  
A
Limits  
Typ  
45  
Symbol  
Parameter  
Unit  
MHz  
ns  
Test Conditions  
Min  
Max  
f
Maximum Clock Frequency  
30  
MAX  
V = 5.0 V  
CC  
= 15 pF  
15  
20  
20  
t
t
Propagation Delay, Clock  
Set to Output  
PLH  
PHL  
C
L
15  
ns  
AC SETUP REQUIREMENTS (T = 25°C, V  
CC  
= 5.0 V)  
A
Limits  
Typ  
Symbol  
Parameter  
Clock Pulse Width High  
Set Pulse Width  
Setup Time  
Unit  
ns  
Test Conditions  
Min  
20  
25  
20  
0
Max  
t
t
t
t
W
ns  
W
s
V
CC  
= 5.0 V  
ns  
Hold Time  
ns  
h
FAST AND LS TTL DATA  
5-190  
Case 751A-02 D Suffix  
14-Pin Plastic  
SO-14  
-A-  
14  
1
8
7
P
C
-B-  
R X 45°  
G
K
J
M
F
D
°
°
°
°
Case 632-08 J Suffix  
14-Pin Ceramic Dual In-Line  
-A-  
14  
1
8
7
-B-  
C
L
-T-  
K
M
F
G
N
J
D
°
°
°
°
Case 646-06 N Suffix  
14-Pin Plastic  
14  
1
8
B
7
A
F
L
C
J
N
K
G
H
D
M
°
°
°
°
FAST AND LS TTL DATA  
5-191  

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