MP020A-5GS [MPS]
Offline, Primary-Side Regulator with CC/CV Control and a 700V MOSFET;
| 型号： | MP020A-5GS |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Offline, Primary-Side Regulator with CC/CV Control and a 700V MOSFET |
| 文件： | 总21页 (文件大小：1400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP020A-5
Offline, Primary-Side Regulator
with CC/CV Control and a 700V MOSFET
DESCRIPTION
FEATURES
The MP020A-5 is an offline, primary-side
regulator that provides accurate constant
voltage and constant current regulation without
an optocoupler or a secondary feedback circuit.
The MP020A-5 has an integrated 700V
MOSFET.
Primary-Side Control without Optocoupler or
Secondary Feedback Circuit
Precise Constant Current and Constant
Voltage Control (CC/CV)
Integrated 700V MOSFET with Minimal
External Components
Variable Off Time, Peak-Current Control
550µA High-Voltage Current Source
30mW No-Load Power Consumption
Programmable Cable Compensation
OVP, OCP, OCkP, OTP, and VCC UVLO
Natural Spectrum Shaping for Improved
EMI Signature
The MP020A-5's variable off-time control allows
a flyback converter to operate in discontinuous
conduction mode (DCM). The MP020A-5 also
features protection functions such as VCC
under-voltage lockout (UVLO), over-current
protection (OCP), over-temperature protection
(OTP), open-circuit protection (OCkP), and
over-voltage protection (OVP). Its internal high-
voltage start-up current source and power-
saving technologies limit the no-load power
consumption to less than 30mW.
Low Cost and Simple External Circuit
Available in a SOIC8-7A Package
APPLICATIONS
Cell Phone Chargers
The MP020A-5's variable switching frequency
technology provides natural spectrum shaping
to smooth the EMI signature, making it suitable
for offline, low-power battery chargers and
adapters.
Adapters for Handheld Electronics
Standby and Auxiliary Power Supplies
Small Appliances
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS” and “The Future of Analog IC Technology” are
registered trademarks of Monolithic Power Systems, Inc.
The MP020A-5 is available in a SOIC8-7A
package.
Maximum Output
Power (85 - 265VAC
)
Part Number RDS(ON)
Open
Adapter
Frame
MP020A-5GS
10Ω
5W
8W
TYPICAL APPLICATION
MP020A-5 Rev. 1.0
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP020A-5GS
SOIC8-7A
See Below
* For Tape & Reel, add suffix –Z (e.g. MP020A-5GS–Z)
TOP MARKING
MP020A-5: Product code of MP020A-5GS
LLLLLLLL: Lot number
MPS: MPS prefix
Y: Year code
WW: Week code
PACKAGE REFERENCE
TOP VIEW
SOIC8-7A
MP020A-5 Rev. 1.0
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
ABSOLUTE MAXIMUM RATINGS (1)
DRAIN to GND............................. -0.7V to 700V
VCC to GND.................................. -0.3V to 30V
CP to GND....................................... -0.3V to 7V
FB input......................................... -0.7V to 10V
Thermal Resistance (4) θJA
SOIC8-7A ............................. 76.......45 ... °C/W
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
(2)
Continuous power dissipation (TA = +25°C)
SOIC8-7A..................................................1.3W
Junction temperature...............................150°C
Lead temperature ....................................260°C
Storage temperature................-60°C to +150°C
ESD capability human body mode ............2.0kV
ESD capability machine mode ...................200V
3) The device is not guaranteed to function outside of its
operating conditions.
Recommended Operating Conditions (3)
Operating junction temp. (TJ). ..-40°C to +125°C
Operating VCC range ..................... 6.6V to 28V
4) Measured on JESD51-7, 4-layer PCB.
MP020A-5 Rev. 1.0
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
ELECTRICAL CHARACTERISTICS
VCC = 15V, TA = 25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
Max
Units
Supply Voltage Management (VCC)
VCC on threshold
VCCH
VCCL
16.8
6
17.3
6.3
17.8
6.6
V
V
VCC off threshold
VCC operating voltage
Quiescent current
6.6
28
V
IQ
At no load condition, VCC = 20V
60kHz, VCC = 20V
360
500
0.1
410
μA
μA
μA
Operating current
IOP
Leakage current from VCC
Internal MOSFET (DRAIN)
Break-down voltage
Supply current from DRAIN
ILeak_VCC VCC = 0 16V, DRAIN floating
1
VBRDSS VCC = 20V, VFB = 7V
700
450
V
ICharge VCC = 4V, VDRAIN = 100V
550
1
750
10
µA
µA
Ω
Leakage current from DRAIN ILeak_Drain VDS = 500VDC
On-state resistance
Minimum switching frequency
Internal Current Sense
Current limit
RON
fMIN
ID = 10mA, TJ = 20°C
At no load condition
10
13
120
Hz
ILimit
tLEB
VFB = -0.5V
365
230
380
300
395
370
mA
ns
Leading-edge blanking
Feedback Input (FB)
FB input current
IFB
VFB
VFB = 4V, VCP = 3V
10
3.93
80
14
4
18
4.07
160
-0.08
6.5
μA
V
FB threshold
DCM detect threshold
FB open-circuit threshold
FB OVP threshold
VDCM
VFBOPEN
VFBOVP
tOVP
120
-0.15
6.35
3.5
mV
V
-0.22
6.2
V
OVP sample delay
µs
Output Cable Compensation (CP)
Cable compensation voltage
Thermal Shutdown
VCP
Full load
2
V
Thermal shutdown threshold
150
120
°C
°C
Thermal shutdown recovery
threshold
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL CHARACTERISTICS
MP020A-5 Rev. 1.0
6/23/2017
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL CHARACTERISTICS (continued)
MP020A-5 Rev. 1.0
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL PERFORMANCE CHARACTERISTICS
Performance waveforms are tested on the evaluation board in the Design Example section.
VIN = 230VAC, VOUT = 5V, IOUT = 1A, L = 1.6mH, TA = 25°C, unless otherwise noted.
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board in the Design Example section.
VIN = 230VAC, VOUT = 5V, IOUT = 1A, L = 1.6mH, TA = 25°C, unless otherwise noted.
MP020A-5 CV/CC Characteristics
25℃ CV/CC
5
4
3
2
265Vac
230Vac
115Vac
1
85Vac
0
0
0.1
0.2
0.3
0.4
0.5 0.6
Io(A)
0.7
0.8
0.9
1
1.1
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
PIN FUNCTIONS
SOIC8-7A
Pin #
Name Description
Supply. The IC begins functioning when VCC charges to the on threshold (VCCH) through
an internal high-voltage current source. When VCC falls below the off threshold (VCCL),
the internal high-voltage current source turns on to charge VCC. Connect a 0.1µF
decoupling ceramic capacitor for most applications.
1
VCC
2, 5, 6
3
GND
FB
Ground.
Feedback. FB provides the output reference voltage and detects the falling voltage
edges to determine the operation mode (CV mode or CC mode).
Output cable compensation. Connect a 1μF ceramic capacitor as a low pass filter. The
upper resistor of the resistor divider connected to FB adjusts the compensation voltage.
4
8
CP
DRAIN Internal MOSFET drain. DRAIN is the input for the high-voltage start-up current source.
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
BLOCK DIAGRAM
Protection
Unit
Power
Management
VCC
FB
Start Up Unit
Constant
Current Control
DRV
Drain
Driving Signal
Management
Constant
Voltage Control
Current
Sense
Cable
Compensation
GND
CP
Figure 1: Functional Block Diagram
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
Working Principle
OPERATION
After start-up, the internal MOSFET turns on,
and the current sense resistor (RCS) senses the
primary current (iP(t)) internally (see Figure 3).
The current rises linearly at a rate that can be
calculated with Equation (1):
Start-Up
Initially, the IC is self-supplying through an
internal high-voltage current source, which is
drawn from DRAIN. The internal high-voltage
current source turns off for better efficiency
when VCC reaches its on threshold (VCCH).
Then the transformer’s auxiliary winding takes
over as the power source. When VCC falls
below its off threshold (VCCL), the IC stops
switching, and the internal high-voltage current
source turns on again (see Figure ).
diP(t)
dt
V
IN
(1)
LM
IPK
iP
Vcc
0
VCCH
VCCL
Figure 1: Primary Current Waveform
When iP(t) rises up to IPK, the internal MOSFET
turns off (see Figure 4). Then the energy stored
in the inductor transfers to the secondary side
through the transformer.
Drain
SwitchingPulses
The inductor (LM) stores energy with each cycle
as a function shown in Equation (2):
1
E LM IP2K
(2)
High-voltage
current source
2
ON
The power transferred from the input to the
output can be determined with Equation (3):
1
OFF
P LM IP2K fS
(3)
2
Where fS is the switching frequency. When IPK is
constant, the output power depends on fS.
Figure 2: VCC UVLO
Constant Voltage (CV) Operation
The MP020A-5 detects the auxiliary winding
voltage from FB and operates in constant
voltage (CV) mode to regulate the output
voltage. Assume the secondary winding is the
master and the auxiliary winding is the slave.
When the secondary-side diode turns on, the
FB voltage can be calculated with Equation (4):
N
RDOWN
VFB P _ AU (VO VD )
(4)
NS
RUP RDOWN
Where VD is the secondary-side diode forward-
drop voltage, Vo is the output voltage, NP_AU is
the number of auxiliary winding turns, NS is the
number of secondary side winding turns, and
RUP and RDOWN are the resistor divider for
sampling.
Figure 3: Simplified Flyback Converter
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
Leading-Edge Blanking
The parasitic capacitances induce a spike on
the sense resistor when the power switch turns
on. The MP020A-5 includes a 300ns leading-
edge blanking period to avoid falsely
terminating the switching pulse. During this
blanking period, the current sense comparator
Figure 2: Auxiliary Voltage Waveform
is disabled, and the gate driver cannot switch
off (see Figure 4).
The output voltage differs from the secondary
voltage due to the current-dependent forward-
diode voltage drop. If the secondary voltage is
always detected at a fixed secondary current,
the difference between the output voltage and
the secondary voltage is a fixed VD. The
MP020A-5 samples the auxiliary winding
voltage 3.5µs after the primary switch turns off
(see Figure 5). The CV loop control function
turns the secondary-side diode off to regulate
the output voltage.
tLEB
VLimit
t
Figure 4: Leading-Edge Blanking
Constant Current (CC) Operation
DCM Detection
Figure 3 shows the constant-current operation.
The MP020A-5 operates in DCM in both CV
and CC modes. To avoid operating in
continuous conduction mode (CCM), the
MP020A-5 detects the falling edge of the FB
input voltage with each cycle. If the chip does
not detect a 120mV falling edge, it stops
switching.
VFB
ZCD
Sample
VZCD
IPK
VCOMP_I
Io estimator
IO_REF
OVP and OCkP
Figure 3: CC Control Loop
The MP020A-5 includes over-voltage protection
(OVP) and open-circuit protection (OCkP). If the
voltage at FB exceeds 6.35V for 3.5µs, or the
FB input’s 0.15V falling edge cannot be
monitored, the MP020A-5 immediately shuts off
the driving signals and enters hiccup mode. The
MP020A-5 resumes normal operation when the
fault has been removed.
The flyback always works in discontinuous
conduction mode (DCM), and the zero-current
detection (ZCD) sample block can detect the
duty cycle of the secondary-side diode.
In constant current (CC) operation, the product
of VZCD times Ipk approximately equals IO_REF, as
shown in Equation (5):
Thermal Shutdown
(5)
IO_REF VZCD IPK
When the temperature of the IC exceeds 150°C,
over-temperature protection (OTP) is triggered,
and the IC enters auto-recovery mode. When
the temperature falls below 120°C, the IC
recovers.
The calculated output current from the IO
estimator block is compared with the reference
value (IO_REF), and the error signal (VCOMP_I
controls the turn-on signal of the integral
MOSFET. IO can be calculated with Equation
(6):
)
1 NP
(6)
IO
IO _REF
2 NS
The MP020A-5 maintains IO_REF at 0.152A.
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
Output Cable Compensation
Determine the compensation voltage with
Equation (7):
To compensate for the secondary-side cable
voltage drop for a more precise output voltage,
the MP020A-5 has an internal output cable
compensation circuit (see Figure 5). The
internal ZCD sample can detect the duty of the
secondary-side diode. A low-pass filter converts
the duty signal to a DC voltage (VCP) that
changes as the load current varies.
5.6DS
360103
NS
(7)
VFCP
2RUP
N
P _ AU
Where
VFCP
is
the
secondary-side
compensation voltage drop, DS is the
secondary-diode duty cycle in CC mode (0.4 for
the MP020A-5), RUP is the upper resistor of the
resistor divider, NS is the number of turns for the
secondary-side transformer windings, and NP_AU
is the number of transformer auxiliary winding
turns.
VCP can be converted to a current signal drawn
from FB. The voltage drop on RUP helps the
output cable compensation. When the system
operates in the maximum load, the CP voltage
reaches a maximum of 2V.
T1
RUP
VFCP
*
*
Vo
FB
RDOWN
-
+
VCP
CP
DS
Figure 5: Output Cable Compensator
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
Output Capacitor
APPLICATION INFORMATION
Use low ESR or very low ESR output capacitors
to meet the output voltage ripple requirement
without using an LC post filter. Using low ESR
capacitors improves output voltage regulation
and feedback voltage sampling at high
temperatures or low temperatures. Use an
output capacitor with an ESR below 100mΩ for
better efficiency over high ESR output
capacitors.
Input Filter
The input filter helps convert the AC input to a
DC source through the rectifier. Figure 6 shows
the input filter, and Figure 7 shows the typical
DC bus voltage waveform.
L
+
R
Output Diode
C2
C1
+
+
AC Input
DC Input
Use a Schottky diode because of its fast
switching speed and low forward-voltage drop
for better high- or low-temperature CV
regulation and efficiency.
If the lower average efficiency (3% to 4%) is
sufficient, replace the output diode with a fast or
ultra-fast diode to reduce costs. Be sure to
readjust the resistor divider values to the
correct output voltage because the forward
voltage drop is higher than the Schottky diode’s.
Figure 6: Input Filter
VDC(max)
Vin
DC input voltage
VDC(min)
AC input voltage
Leakage Inductance
The
transformer’s
leakage
inductance
decreases the system efficiency and affects the
output current or voltage constant precision.
Optimize the transformer structure to minimize
the leakage inductance. Aim for a leakage
inductance less than 5% of the primary
inductance.
VAC
t
0
Figure 7: DC Input Voltage Waveform
Bulk capacitors (C1 and C2) filter the rectified
AC input. The inductor (L) forms a π filter with
C1 and C2 to restrain the differential mode EMI
noise. The resistor (R) parallel with L restrains
the mid-frequency band EMI noise. Normally, R
is 1 - 10kΩ.
RCD Snubber
The transformer’s leakage inductance causes
the MOSFET drain voltage to spike and
excessive ringing on the drain voltage
waveform, which affects the output voltage
sampling 3.5µs after the MOSFET turns off.
C1 and C2 are usually set as 2µF/W to 3µF/W
for the universal input condition. For 230VAC
single-range applications, halve the capacitor
values. Avoid using very low minimum DC
voltages to ensure that the converter can
supply the maximum power load, which can be
calculated with Equation (8):
The RCD snubber circuit can limit the DRAIN
voltage spike. Figure 8 shows the RCD snubber
circuit.
NP
NS
DS
(8)
VDC(min)
(VO VD )
1DS
If VDC(min) cannot satisfy this expression,
increase the value of the input capacitors to
increase VDC(min)
.
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
The damping resistor in series with the RCD
has a relatively large value to prevent any
excessive voltage ringing that can affect the CV
sampling and increase the output ripple. Use a
200 - 500Ω damping resistor to restrain the
drain-voltage ringing.
Divided Resistor
For better application performance, select the
resistor divider’s total value to be between 40 -
100kΩ. Smaller resistors draw larger currents
from the auxiliary winding, which increases the
no-load consumption. Larger resistors may also
pick up noise from adjacent components.
Figure 8: RCD Snubber
If necessary, use a resistor between 1kΩ and
2kΩ connected between the FB and resistor
divider. RFB can also limit substrate injection
current effects (see Figure 9).
Select RSN and CSN to meet the voltage spike
requirements and improve system operation.
The power dissipated in the snubber circuit can
be approximated with Equation (9):
VSN
1
2
LK IPK2
fS
(9)
P
SN
VSN NPS VO
Where LK is the leakage inductance, VSN is the
clamp voltage, and NPS is the turn ratio of
primary and secondary side.
Since RSN consumes the majority of the power,
RSN is approximated with Equation (10):
2
VSN
(10)
RSN
P
Figure 9: Feedback Resistor Divider Circuit
SN
For more accurate CV regulation, the accuracy
of these feedback resistors should be at least
1%.
The maximum ripple of the snubber capacitor
voltage can then be calculated with Equation
(11):
Dummy Load
VSN
VSN
(11)
When the system operates without a load and
no dummy load, the output voltage rises above
the normal operation because of the minimum
switching frequency limitation. Use a dummy
load for good load regulation. However, a large
dummy load deteriorates efficiency and no-load
consumption, so selecting the dummy load is
tradeoff between efficiency and load regulation.
For most applications, use a dummy load
around 10mW, which satisfies the 30mW
requirement.
CSN RSN fS
Generally, a 15% ripple is reasonable, so CSN
can be estimated with Equation (11) as well.
Normally, select a time constant (τ = RSN x CSN)
below 0.1ms for better CV sampling. Adjust the
resistor based on the power loss and the
acceptable
applications.
clamp
voltage in
practical
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
Maximum Switching Frequency
Use a secondary-side diode conduction time
that exceeds 5.4µs, as shown in Equation (12):
NS LM
NP (VO VD )
(12)
5.4s
TS _ON IPK
For high- or low-temperature applications,
select a maximum switching frequency below
75kHz.
PCB Layout Guide
Efficient PCB layout is critical for reliable
operation, good EMI, and good thermal
performance. For best results, refer to Figure
10 and follow the guidelines below.
Top Layer
1. Minimize the loop area formed by the input
capacitor, the MP020A-5 drain-source, and
the primary winding to reduce EMI noise.
2. Provide at least 1in2 of top-side copper for
adequate heat-sinking.
3. The copper area connected to GND is the
heat conduction path for the MP020A-5.
4. Minimize the clamp circuit loop to reduce
EMI.
Bottom Layer
Figure 10: Recommended Layout
5. Minimize the secondary loop area of the
output diode and output filter to reduce EMI
noise.
Design Example
Table 1 shows a design example following the
application guidelines based the specifications
below.
6. Provide sufficient copper area at the anode
and cathode terminal of the output diode to
act as a heat sink.
Table 1: Design Example
VIN
VOUT
IOUT
fS
85 ~ 265VAC
5V
7. Place the AC input away from the switching
nodes to minimize the noise coupling that
may bypass the input filter.
1A
60kHz
Figure 14 through Figure 16 show the detailed
application schematic. This circuit was used for
the typical performance and circuit waveforms.
For more device applications, please refer to
the related evaluation board datasheets.
8. Place the bypass capacitor as close as
possible to the IC and source.
9. Place the feedback resistors next to FB.
10. Minimize the feedback sampling loop to
minimize noise coupling.
The transformer structure used in Figure 14 can
benefit from passing the 3-wire conducted EMI
test (output GND connect to earth) without the
Y-cap. The Y-cap results in leakage current,
which is prohibited in some cell phone charger
applications. Figure 15 illustrates how the
common noise of the secondary-side diode is
restrained. The secondary-side winding splits to
two separate windings (NSEC1 and NSEC2), which
11. Use a single-point connection at the
negative terminal of the input filter capacitor
for the MP020A-5 source pin and bias
winding return.
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MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
have the same turns and approximate parasitic
capacitors (CSP1 and CSP2), but their hot spot is
opposite (Point 9 and Point 10 in Figure 15).
Therefore, the common mode noise current
produced at the secondary-side windings can
counteract each other.
The transformer structure is simple if the
application does not need to pass the 3-wire
conducted EMI or uses a Y-cap. Figure 16
shows a schematic with a simple transformer
structure.
MP020A-5 Rev. 1.0
6/23/2017
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17
MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL APPLICATION CIRCUITS
Figure 11: 5V/1A with Complicated Transformer Structure
Figure 15: Secondary Side Windings Structure to Restrain the Common Mode Noise
MP020A-5 Rev. 1.0
6/23/2017
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© 2017 MPS. All Rights Reserved.
18
MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
TYPICAL APPLICATION CIRCUITS
Figure 16: 5V/1A with Simple Transformer Structure
MP020A-5 Rev. 1.0
6/23/2017
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19
MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
FLOW CHART
Start
Y
VCC<VCCL
Monitor VCC
N
N
Monitor VCC
VCC>VCCH
Y
N
Monitor Io
Monitor VFB
N
VFB>-0.15V
for entire
cycle
VFB>6.35V
for 3.5us
Y
Io<Io_ref
Y
N
Y
CV
CC
OVP
OCkP
Operation
Operation
Operation
Operation
Shut Off
Switching
Pulse
Figure 17: Flow Chart
MP020A-5 Rev. 1.0
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20
6/23/2017
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© 2017 MPS. All Rights Reserved.
MP020A-5 – OFFLINE, PRIMARY-SIDE REGULATOR W/ CC/CV CONTROL AND 700V MOSFET
PACKAGE INFORMATION
SOIC8-7A
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
8
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.213(5.40)
PIN 1 ID
1
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
0.0075(0.19)
0.0098(0.25)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
SEE DETAIL "A"
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
GAUGE PLANE
0.010(0.25) BSC
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE0.004" INCHES MAX.
0.016(0.41)
0.050(1.27)
0o-8o
5) JEDEC REFERENCE ISMS-012.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal
responsibility for any said applications.
MP020A-5 Rev. 1.0
6/23/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
21
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