MP28253EL [MPS]

21V, 3A, 500kHz Synchronous Step-down Converter;
MP28253EL
型号: MP28253EL
厂家: MONOLITHIC POWER SYSTEMS    MONOLITHIC POWER SYSTEMS
描述:

21V, 3A, 500kHz Synchronous Step-down Converter

文件: 总15页 (文件大小:373K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MP28253  
21V, 3A, 500kHz  
Synchronous Step-down Converter  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The MP28253 is a high frequency synchronous  
rectified step-down switch mode converter with  
built in internal power MOSFETs. It offers a  
very compact solution to achieve 3A continuous  
output current over a wide input supply range  
with excellent load and line regulation. The  
MP28253 operates at high efficiency over a  
wide output current load range.  
Wide 4.5V to 21V Operating Input Range  
3A Output Current  
Low RDS(ON) Internal Power MOSFETs  
Proprietary Switching Loss Reduction  
Technique  
Fixed 500kHz Switching Frequency  
External Soft-Start  
Sync from 300kHz to 2MHz External Clock  
Internal Compensation  
Integrated Bootstrap Diode  
Over-Current Protection and Hiccup  
Thermal Shutdown  
Output Adjustable from 0.8V  
Available in 14-pin QFN3x4 Package  
Current mode operation provides fast transient  
response and eases loop stabilization.  
Full protection features include OCP and thermal  
shut down.  
The MP28253 requires a minimum number of  
readily available standard external components  
and is available in a space saving 3mm x 4mm  
14-pin QFN package.  
APPLICATIONS  
Notebook Systems and I/O Power  
Networking Systems  
Digital Set Top Boxes  
Personal Video Recorders  
Flat Panel Television and Monitors  
Distributed Power Systems  
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green  
status, please visit MPS website under Products, Quality Assurance page.  
“MPS” and “The Future of Analog IC Technology” are registered trademarks of  
Monolithic Power Systems, Inc.  
The information in this datasheet about the product and its associated  
technologies are proprietary and intellectual property of Monolithic Power  
Systems and are protected by copyright and pending patent applications  
TYPICAL APPLICATION FOR NOTEBOOK)  
1
6
VIN  
IN  
BST  
4.5V-21V  
C1  
MP28253  
9
2,3,4,5  
PG  
PG  
VOUT 1.2V/3A  
SW  
R3  
100k  
R1  
11  
VCC  
4.99k  
Rt  
24k  
8
FB  
SS  
C5  
47nF  
7
R2  
10k  
10  
ON/OFF  
EN/SYNC  
GND AGND  
12,13 14  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
1
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
ORDERING INFORMATION  
Part Number*  
Package  
Top Marking  
Free Air Temperature (TA)  
MP28253EL  
3x4 QFN14  
28253  
-20°C to +85°C  
For Tape & Reel, add suffix –Z (e.g. MP28253EL–Z).  
For RoHS compliant packaging, add suffix –LF (e.g. MP28253EL–LF–Z)  
PACKAGE REFERENCE  
TOP VIEW  
PIN 1 ID  
IN  
SW  
1
2
3
4
5
6
7
14 AGND  
13 GND  
12 GND  
11 VCC  
SW  
SW  
SW  
SS  
PG  
FB  
10  
9
BST  
EN/SYNC  
8
EXPOSED PAD  
ON BACKSIDE  
Thermal Resistance (5)  
3x4 QFN14 .............................48...... 11... °C/W  
θJA  
θJC  
ABSOLUTE MAXIMUM RATINGS (1)  
Supply Voltage VIN ....................................... 22V  
V
SW..........................-0.3V (-5V for<10ns) to 23V  
Notes:  
1) Exceeding these ratings may damage the device.  
2) Please refer to Page 9, Enable Control Section for absolute  
maximum rating of EN pin.  
VBS .......................................................VSW + 6V  
(2)  
All Other Pins............................. -0.3V to +6V  
3) The maximum allowable power dissipation is a function of the  
maximum junction temperature TJ(MAX), the junction-to-  
ambient thermal resistance θJA, and the ambient temperature  
TA. The maximum allowable continuous power dissipation at  
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-  
TA)/θJA. Exceeding the maximum allowable power dissipation  
will cause excessive die temperature, and the regulator will go  
into thermal shutdown. Internal thermal shutdown circuitry  
protects the device from permanent damage.  
Operating Temperature.............. -20°C to +85°C  
Continuous Power Dissipation (TA = +25°C)  
(3)  
……………………………………………....2.6W  
Junction Temperature...............................150°C  
Lead Temperature ....................................260°C  
Storage Temperature............... -65°C to +150°C  
Recommended Operating Conditions (4)  
Supply Voltage VIN ...........................4.5V to 21V  
Maximum Junction Temp. (TJ) ...............+125°C  
4) The device is not guaranteed to function outside of its  
operating conditions.  
5) Measured on JESD51-7, 4-layer PCB.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
2
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
ELECTRICAL CHARACTERISTICS  
VIN = 12V, TA = +25°C, unless otherwise noted.  
Parameters  
Symbol  
IIN  
Condition  
Min  
Typ  
0
Max  
Units  
μA  
Supply Current (Shutdown)  
Supply Current (Quiescent)  
HS Switch On Resistance  
LS Switch On Resistance  
VEN = 0V  
Iq  
VEN = 2V, VFB = 1V  
0.7  
150  
50  
mA  
HSRDS-ON  
LSRDS-ON  
mΩ  
mΩ  
V
12V  
EN = 0V, VSW = 0V or  
Switch Leakage  
SWLKG  
0
10  
μA  
Current Limit (6)  
ILIMIT  
FSW  
4
5.6  
500  
0.25  
90  
A
kHz  
fSW  
%
Oscillator Frequency  
Fold-back Frequency  
Maximum Duty Cycle  
Sync Frequency Range  
Feedback Voltage  
VFB = 0.75V  
VFB = 0V  
425  
575  
FFB  
DMAX  
FSYNC  
VFB  
VFB = 700mV  
85  
0.3  
789  
2
MHz  
mV  
nA  
V
805  
10  
1.3  
0.4  
2
821  
50  
Feedback Current  
IFB  
VFB = 800mV  
VEN = 2V  
EN Rising Threshold  
EN Threshold Hysteresis  
VEN_RISING  
VEN_HYS  
1
1.6  
V
μA  
EN Input Current  
IEN  
VEN = 0V  
0
EN Turn Off Delay  
ENTd-Off  
PGVth-Hi  
PGVth-Lo  
PGTd  
5
μs  
VFB  
VFB  
μs  
Power Good Rising Threshold  
Power Good Falling Threshold  
Power Good Delay  
0.9  
0.7  
20  
Power Good Sink Current  
Capability  
VPG  
Sink 4mA  
0.4  
10  
V
Power Good Leakage Current  
Soft-start current  
IPG_LEAK  
ISS  
VPG = 3.3V  
nA  
10.5  
4.0  
μA  
VIN Under Voltage Lockout  
Threshold Rising  
INUVVth  
3.8  
4.2  
V
VIN Under Voltage Lockout  
Threshold Hysteresis  
INUVHYS  
VCC  
880  
mV  
VCC Regulator  
5
5
V
%
VCC Load Regulation  
Soft-Start Period  
Thermal Shutdown  
ICC=5mA  
CSS=47nF  
2
4
6.5  
ms  
°C  
TSD  
150  
Note:  
6) Guaranteed by design.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
3
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
PIN FUNCTIONS  
Pin #  
Name  
Description  
Supply Voltage. The MP28253 operates from a +4.5V to +21V input rail. C1 is  
needed to decouple the input rail. Use wide PCB traces and multiple vias to make  
the connection.  
1
IN  
2,3,4,5  
6
SW  
Switch Output. Use wide PCB traces and multiple vias to make the connection.  
Bootstrap. A capacitor connected between SW and BS pins is required to form a  
floating supply across the high-side switch driver.  
BST  
EN=1 to enable the chip. External clock can be applied to EN pin for changing  
switching frequency. For automatic start-up, connect EN pin to VIN by proper EN  
resistor divider. It shows in Page 9, Enable Control Section.  
7
8
EN/SYNC  
FB  
Feedback. An external resistor divider from the output to GND, tapped to the FB  
pin, sets the output voltage. To prevent current limit run away during a short circuit  
fault condition the frequency fold-back comparator lowers the oscillator frequency  
when the FB voltage is below 500mV.  
Power Good Output, the output of this pin is open drain. Power good threshold is  
90% low to high and 70% high to low of regulation value.  
9
10,  
PG  
SS  
Soft-Start control input. SS controls the soft-start period. Connect a capacitor from  
SS to Gnd to set the soft-start period.  
Bias Supply. Decouple with 0.1μF~0.22μF cap. And the capacitance should be no  
more than 0.22μF.  
11  
VCC  
GND  
AGND  
System Ground. This pin is the reference ground of the regulated output voltage.  
For this reason care must be taken in PCB layout.  
12,13  
14  
Signal Ground. AGND is not internally connected to System Ground, make sure  
AGND connected to system Ground in PCB layout.  
Exposed No Internal Connection. It is recommended to connect exposed pad to GND plane  
Pad  
for optimal thermal performance.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
4
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
TYPICAL PERFORMANCE CHARACTERISTICS  
VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted.  
Enabled Supply Current vs.  
Input Voltage  
Disabled Supply Current vs.  
Input Voltage  
Vcc Regulator Line Regulation  
V
=1V  
FB  
V
=0V  
EN  
0.2  
0.15  
0.1  
6
1000  
950  
900  
850  
800  
750  
700  
650  
600  
550  
500  
5.5  
5
0.05  
0
4.5  
4
-0.05  
-0.1  
-0.15  
-0.2  
3.5  
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
Current Limit vs.  
Duty Cycle  
Operating Range  
Load Regulation  
0.3  
0.2  
0.1  
0
100  
10  
8
6
4
2
0
DmaxLimit  
V
=4.5V  
IN  
Minimum on time Limit  
V
=21V  
IN  
-0.1  
-0.2  
-0.3  
V
=12V  
IN  
1
0.1  
0
0.5  
1
1.5  
2
2.5  
3
0
20  
40  
60  
80  
100  
0
5
10  
15  
20  
25  
DUTY CYCLE (%)  
INPUT VOLTAGE (V)  
OUTPUT CURRENT (A)  
Case Temperature Rise vs.  
Output Current  
Line Regulation  
0.3  
0.2  
0.1  
0
15  
10  
5
I
=0A  
OUT  
I
=1.5A  
OUT  
-0.1  
-0.2  
-0.3  
I
=3A  
OUT  
0
0
5
10  
15  
20  
25  
0
1
2
3
4
INPUT CURRENT (V)  
OUTPUT CURRENT (A)  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
5
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted.  
Efficiency  
VOUT=1.2V  
Efficiency  
VOUT=1.8V  
Efficiency  
VOUT=2.5V  
100  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
VIN=4.5V  
VIN=4.5V  
VIN=4.5V  
VIN=12V  
VIN=12V  
VIN=21V  
VIN=12V  
VIN=21V  
VIN=21V  
0
0.5  
1
1.5  
2
2.5  
3
0
0.5  
1
1.5  
2
2.5  
3
0
0.5  
1
1.5  
2
2.5  
3
OUTPUT CURRENT (A)  
OUTPUT CURRENT (A)  
OUTPUT CURRENT (A)  
Efficiency  
VOUT=3.3V  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
VIN=5V  
VIN=12V  
VIN=21V  
0
0.5  
1
1.5  
2
2.5  
3
OUTPUT CURRENT (A)  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
6
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted.  
Short Entry  
Short Recovery  
Power Up without Load  
V
V
V
OUT  
1V/div  
OUT  
1V/div  
OUT  
1V/div  
V
SW  
5V/div  
V
V
SW  
SW  
5V/div  
5V/div  
V
IN  
10V/div  
I
I
INDUCTOR  
5A/div  
INDUCTOR  
5A/div  
I
INDUCTOR  
5A/div  
1ms/div  
2ms/div  
2ms/div  
Power Up with 3A Load  
Enable Startup  
without Load  
Enable Startup  
with 3A Load  
V
V
V
OUT  
OUT  
OUT  
1V/div  
1V/div  
1V/div  
V
V
SW  
V
SW  
SW  
5V/div  
5V/div  
5V/div  
V
V
EN  
V
EN  
IN  
5V/div  
5V/div  
10V/div  
I
I
I
INDUCTOR  
5A/div  
INDUCTOR  
5A/div  
INDUCTOR  
5A/div  
2ms/div  
2ms/div  
2ms/div  
Output Ripple Voltage  
IOUT=3A  
Input Ripple Voltage  
IOUT=3A  
Load Transient Response  
IOUT=1.5A-3A  
V
OUT/AC  
10mV/div  
V
OUT/AC  
V
IN/AC  
50mV/div  
100mV/div  
V
SW  
5V/div  
I
V
INDUCTOR  
5A/div  
SW  
I
OUT  
2A/div  
5V/div  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
7
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
BLOCK DIAGRAM  
Figure 1—Function Block Diagram  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
8
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
OPERATION  
The MP28253 is a high frequency synchronous  
rectified step-down switch mode converter with  
built in internal power MOSFETs. It offers a very  
compact solution to achieve 3A continuous  
output current over a wide input supply range  
with excellent load and line regulation.  
1) Enabled by external logic H/L signal  
The chip starts up once the enable signal goes  
higher than EN/SYNC input high voltage (2V),  
and is shut down when the signal is lower than  
EN/SYNC input low voltage (0.4V). To disable  
the chip, EN must be pulled low for at least 5µs.  
The input is compatible with both CMOS and TTL.  
The MP28253 operates in a fixed frequency,  
peak current control mode to regulate the output  
voltage. A PWM cycle is initiated by the internal  
clock. The integrated high-side power MOSFET  
is turned on and remains on until its current  
reaches the value set by the COMP voltage.  
When the power switch is off, it remains off until  
the next clock cycle starts. If, in 90% of one PWM  
period, the current in the power MOSFET does  
not reach the COMP set current value, the power  
MOSFET will be forced to turn off  
2) Enabled by Vin through voltage divider.  
Connect EN with VIN through a resistive voltage  
divider for automatic startup as the figure 2  
shows.  
Power Good Indicator  
When the FB is below 0.7VFB, the PG pin will be  
internally pulled low. When the FB is above  
0.9VFB, the PG becomes an open-drain output.  
Internal Regulator  
Most of the internal circuitries are powered from  
the 5V internal regulator. This regulator takes the  
VIN input and operates in the full VIN range.  
When VIN is greater than 5.0V, the output of the  
regulator is in full regulation. When VIN is lower  
than 5.0V, the output decreases, 0.1uF ceramic  
capacitor for decoupling purpose is required.  
Figure 2—Enable Divider Circuit  
Choose the value of the pull-up resistor REN1 and  
pull-down resistor REN2 to reset the automatic  
start-up voltage:  
(REN1 + REN2 ||1MΩ)  
V
= VEN_RISING ⋅  
IN_START  
REN2 ||1MΩ  
Error Amplifier  
(REN1 + REN2 ||1MΩ)  
REN2 ||1MΩ  
The error amplifier compares the FB pin voltage  
with the internal FB reference (VFB) and outputs a  
current proportional to the difference between the  
two. This output current is then used to charge or  
discharge the internal compensation network to  
form the COMP voltage, which is used to control  
the power MOSFET current. The optimized  
internal compensation network minimizes the  
external component counts and simplifies the  
control loop design.  
V
=
VEN-FALLING ⋅  
IN_STOP  
As shown in Figure 2, the EN pin is also clamped  
internally using a 6.7V series-Zener-diode. The  
EN input pin can be connected through a pullup  
resistor to any voltage connected to the VIN pin  
such that the pullup resistor limits the EN input  
current to less than 100µA.  
For example, with 12V connected to Vin, RPull-  
up (12V – 6.7V) ÷ 100µA = 53k.  
Enable/Sync Control  
EN/Sync is a digital control pin that turns the  
regulator on and off. Drive EN high to turn on the  
regulator, drive it low to turn it off. There is an  
internal 1MEG resistor from EN/Sync to GND  
thus EN/Sync can be floated to shut down the  
chip.  
If the EN pin is directly connected to a voltage  
source without any pullup resistor, then the  
amplitude of the voltage source should be limited  
below 6V to prevent from causing damage to the  
Zener diode.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
9
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
external decoupled cap. The soft-start time can  
1ms Turn On Delay  
5us Turn Off Delay  
be caculated as below:  
VIN_STA  
RT  
VIN_STOP  
Vref(V)×C5(nF)  
tss(ms) =  
Vin  
VEN_Rising  
10.5μA  
To reduce the susceptibility to noise, do not leave  
SS pin open. Use a capacitor with small value if  
soft –start function not needed.  
VEN_Falling  
EN/Sync  
VCC_Rising  
Vcc  
Over-Current-Protection and Hiccup  
The MP28253 has cycle-by-cycle over current  
limit when the inductor current peak value  
exceeds the set current limit threshold.  
Meanwhile, output voltage starts to drop until FB  
is below the Under-Voltage (UV) threshold,  
typically 30% below the reference. Once a UV is  
triggered, the MP28253 enters hiccup mode to  
periodically restart the part. This protection mode  
is especially useful when the output is dead-short  
to ground. The average short circuit current is  
greatly reduced to alleviate the thermal issue and  
to protect the regulator. The MP28253 exits the  
hiccup mode once the over current condition is  
removed.  
Vout  
Figure 3—Startup Sequence Using EN Divider  
3) Synchronized by External Sync Clock Signal  
The chip can be synchronized to external clock  
range from 300kHz up to 2MHz through this pin  
2ms right after output voltage is set, with the  
internal clock rising edge synchronized to the  
external clock rising edge.  
5us  
1ms  
2ms  
Vin  
EN/Sync  
VCC_Rising  
Vcc  
Thermal Shutdown  
Vout_set  
Thermal shutdown is implemented to prevent the  
chip from operating at exceedingly high  
temperatures. When the silicon die temperature  
is higher than 150°C, it shuts down the whole  
chip. When the temperature is lower than its  
lower threshold, typically 140°C, the chip is  
enabled again.  
0.625*Vout_set  
Vout  
CLK  
Foldback  
External CLK  
500kHz  
Figure 4—Startup Sequence Using External  
Sync Clock Signal  
Floating Driver and Bootstrap Charging  
The floating power MOSFET driver is powered by  
an external bootstrap capacitor. This floating  
driver has its own UVLO protection. This UVLO’s  
rising threshold is 2.2V with a hysteresis of  
150mV. The bootstrap capacitor voltage is  
regulated internally by VIN through D1, M3, C4,  
L1 and C2 (Figure 5). If (VIN-VSW) is more than  
5V, U2 will regulate M3 to maintain a 5V BST  
voltage across C4.  
Under-Voltage Lockout (UVLO)  
Under-voltage lockout (UVLO) is implemented to  
protect the chip from operating at insufficient  
supply voltage. The MP28253 UVLO comparator  
monitors the output voltage of the internal  
regulator, VCC. The UVLO rising threshold is  
about 4.0V while its falling threshold is a  
consistent 3.2V.  
External Soft-Start  
The soft-start is implemented to prevent the  
converter output voltage from overshooting  
during startup. When the chip starts, the internal  
circuitry generates a soft-start voltage (SS)  
ramping up from 0V to 1.2V. When it is lower  
than the internal FB reference (REF), SS  
overrides REF so the error amplifier uses SS as  
the reference. When SS is higher than REF, REF  
regains control. The SS time can be set by  
SW  
Figure 5—Internal Bootstrap Charging Circuit  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
10  
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
Startup and Shutdown  
If both VIN and EN are higher than their  
appropriate thresholds, the chip starts. The  
reference block starts first, generating stable  
reference voltage and currents, and then the  
internal regulator is enabled. The regulator  
provides stable supply for the remaining  
circuitries.  
Three events can shut down the chip: EN low,  
VIN low and thermal shutdown. In the shutdown  
procedure, the signaling path is first blocked to  
avoid any fault triggering. The COMP voltage and  
the internal supply rail are then pulled down. The  
floating driver is not subject to this shutdown  
command.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
11  
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
APPLICATION INFORMATION  
VOUT × (VIN VOUT  
VIN × ΔIL × fOSC  
)
Setting the Output Voltage  
L =  
The external resistor divider is used to set the  
output voltage (see Typical Application on page  
1). The feedback resistor R1 also sets the  
feedback loop bandwidth with the internal  
compensation capacitor (see Typical Application  
on page 1). Choose R1 to be around 40.2kfor  
optimal transient response. R2 is then given by:  
Where ΔIL is the inductor ripple current.  
Choose inductor ripple current to be  
approximately 30% if the maximum load current,  
3A. The maximum inductor peak current is:  
ΔIL  
IL(MAX) = ILOAD  
+
R1  
R2 =  
VOUT  
2
1  
Under light load conditions below 100mA, larger  
inductance is recommended for improved  
efficiency.  
VFB  
The T-type network is highly recommended when  
Vo is low, as Figure 6 shows.  
Selecting the Input Capacitor  
R1  
Rt  
The input current to the step-down converter is  
discontinuous, therefore a capacitor is required to  
supply the AC current to the step-down converter  
while maintaining the DC input voltage. Use low ESR  
capacitors for the best performance. Ceramic  
capacitors with X5R or X7R dielectrics are highly  
recommended because of their low ESR and  
small temperature coefficients. For most  
applications, a 22µF capacitor is sufficient.  
1
FB  
VOUT  
R2  
Figure 6— T-type Network  
Table 1 lists the recommended T-type resistors  
value for common output voltages.  
Table 1—Resistor Selection for Common  
Output Voltages  
Since the input capacitor (C1) absorbs the input  
switching current it requires an adequate ripple  
current rating. The RMS current in the input capacitor  
can be estimated by:  
VOUT  
(V)  
R1  
R2  
Rt  
L
COUT  
(k) (k) (k) (μH) (μF, Ceramic)  
1.05 4.99 16.5 24.9 1-4.7  
47  
47  
47  
47  
47  
47  
47  
1.2  
1.5  
1.8  
2.5  
3.3  
5
4.99 10.2 24.9 1-4.7  
4.99 5.76 24.9 1-4.7  
4.99 4.02 24.9 1-4.7  
VOUT  
VIN  
VOUT  
VIN  
IC1 = ILOAD  
×
× 1−  
The worse case condition occurs at VIN = 2VOUT,  
40.2 19.1  
40.2 13  
40.2 7.68  
0
0
0
1-4.7  
1-4.7  
1-4.7  
where:  
ILOAD  
IC1  
=
2
Note:  
For simplification, choose the input capacitor  
whose RMS current rating greater than half of the  
maximum load current.  
The above feedback resistor table applies to a specific load  
capacitor condition as shown in the table 1. Other capacitive loading  
conditions will require different values.  
Selecting the Inductor  
The input capacitor can be electrolytic, tantalum  
or ceramic. When electrolytic or tantalum  
capacitor is used, a small, high quality ceramic  
capacitor, i.e. 0.1μF, should be placed as close  
to the IC as possible. When using ceramic  
capacitors, make sure that they have enough  
capacitance to provide sufficient charge to  
prevent excessive voltage ripple at input. The  
A 1µH to 10µH inductor with a DC current rating  
of at least 25% percent higher than the maximum  
load current is recommended for most  
applications. For highest efficiency, the inductor  
DC resistance should be less than 15m. For  
most designs, the inductance value can be  
derived from the following equation.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
12  
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
3) Ensure all feedback connections are short  
input voltage ripple caused by capacitance can  
be estimated by:  
and direct. Place the feedback resistors and  
compensation components as close to the  
chip as possible.  
ILOAD  
VOUT  
VIN  
VOUT  
ΔV  
=
×
× 1−  
IN  
fS × C1  
V
IN  
4) Route SW away from sensitive analog areas  
such as FB.  
5) Connect IN, SW, and especially GND  
respectively to a large copper area to cool  
the chip to improve thermal performance and  
long-term reliability.  
Selecting the Output Capacitor  
The output capacitor (C2) is required to maintain  
the DC output voltage. Ceramic, tantalum, or low  
ESR electrolytic capacitors are recommended.  
Low ESR capacitors are preferred to keep the  
output voltage ripple low. The output voltage  
ripple can be estimated by:  
6) Adding RC snubber circuit from IN pin to SW  
pin can reduce SW spikes.  
C1  
VOUT  
VOUT  
VIN  
1
ΔVOUT  
=
× 1−  
× RESR  
+
GND  
VIN  
fS × L  
8 × fS × C2  
AGND  
IN  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Where L is the inductor value and RESR is the  
equivalent series resistance (ESR) value of the  
output capacitor.  
SW  
SW  
SW  
SW  
BST  
GND  
GND  
VCC  
Css  
L1  
SS  
In the case of ceramic capacitors, the impedance  
at the switching frequency is dominated by the  
capacitance. The output voltage ripple is mainly  
caused by the capacitance. For simplification, the  
output voltage ripple can be estimated by:  
PG  
8
EN  
FB  
R2  
C2  
VOUT  
8 × fS2 × L × C2  
VOUT  
ΔVOUT  
=
× 1−  
V
IN  
Top Layer  
In the case of tantalum or electrolytic capacitors,  
the ESR dominates the impedance at the  
switching frequency. For simplification, the output  
ripple can be approximated to:  
VOUT  
VOUT  
VIN  
ΔVOUT  
=
× ⎜1−  
×RESR  
fS ×L  
The characteristics of the output capacitor also  
affect the stability of the regulation system. The  
MP28253 can be optimized for a wide range of  
capacitance and ESR values..  
The recommended external BST diode is IN4148,  
and the BST cap is 0.1~1µF.  
PCB Layout  
PCB layout is very important to achieve stable  
operation. Please follow these guidelines and  
take Figure 7 for references.  
Bottom Layer  
Figure 7—PCB Layout  
1) Keep the connection of input ground and  
GND pin as short and wide as possible.  
2) Keep the connection of input capacitor and  
IN pin as short and wide as possible.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
13  
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
External Bootstrap Diode  
An external bootstrap diode may enhance the  
efficiency of the regulator, the applicable  
conditions of external BST diode is:  
VOUT  
z Duty cycle is high: D=  
>65%  
VIN  
In this case, an external BST diode is  
recommended from the VCC pin to BST pin, as  
shown in Figure 8  
External BST Diode  
IN4148  
BST  
VCC  
CBST  
MP28253  
SW  
L
COUT  
Figure 8—Add Optional External Bootstrap  
Diode to Enhance Efficiency  
The recommended external BST diode is IN4148,  
and the BST cap is 0.1~1µF.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
14  
MP28253 – 3A, 21V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS  
PACKAGE INFORMATION  
3mm x 4mm QFN14  
1.60  
1.80  
2.90  
3.10  
0.30  
0.50  
PIN 1 ID  
SEE DETAIL A  
PIN 1 ID  
MARKING  
1
14  
0.18  
0.30  
3.20  
3.40  
3.90  
4.10  
PIN 1 ID  
INDEX AREA  
0.50  
BSC  
8
7
TOP VIEW  
BOTTOM VIEW  
PIN 1 ID OPTION A  
0.30x45º TYP.  
PIN 1 ID OPTION B  
R0.20 TYP.  
0.80  
1.00  
0.20 REF  
0.00  
0.05  
SIDE VIEW  
DETAIL A  
2.90  
1.70  
NOTE:  
0.70  
1) ALL DIMENSIONS ARE IN MILLIMETERS.  
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.  
3) LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX.  
4) JEDEC REFERENCE IS MO-229, VARIATION VGED-3.  
5) DRAWING IS NOT TO SCALE.  
0.25  
0.50  
3.30  
RECOMMENDED LAND PATTERN  
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third  
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not  
assume any legal responsibility for any said applications.  
MP28253 Rev. 1.02  
12/25/2013  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2013 MPS. All Rights Reserved.  
15  

相关型号:

MP28253EL-LF

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14
MPS

MP28253EL-LF-Z

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14
MPS

MP28253EL-Z

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14
MPS

MP28254EL

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14
MPS

MP28254EL-LF

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14
MPS

MP28254EL-LF-Z

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14
MPS

MP28254EL-Z

Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14
MPS

MP28255

21V, 4A, 500kHz Synchronous Step-down Converter
MPS

MP28255EL

21V, 4A, 500kHz Synchronous Step-down Converter
MPS

MP28255EL-LF-Z

Switching Regulator, Current-mode, 4A, 575kHz Switching Freq-Max, PDSO14, QFN-14
MPS

MP28255EL-Z

Switching Regulator, Current-mode, 4A, 575kHz Switching Freq-Max, PDSO14, QFN-14
MPS

MP28256

21V, 3A 500kHz Synchronous Step-Down Coverter
MPS