MP6902 [MPS]
Fast Turn-off Intelligent Controller; 快速关断智能控制器
| 型号： | MP6902 |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Fast Turn-off Intelligent Controller |
| 文件： | 总12页 (文件大小：423K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP6902
Fast Turn-off Intelligent Controller
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6902 is a Low-Drop Diode Emulator IC
for Flyback converters which combined with an
external switch replaces Schottky rectification
diodes for high efficiency. The chip regulates
the forward drop of an external switch to about
70mV and switches it off as soon as the voltage
becomes negative. MP6902 has a light-load
sleep mode that reduces the quiescent current
to <300uA.
•
•
•
Supports DCM and Quasi-Resonant
Flyback Converters
Works with 12V Standard and 5V Logic
Level FETS
Compatible with Energy Star, 1W Standby
Requirements
VDD Range From 8V to 24V
Fast Turn-off Total Delay of 20ns
Max 400kHz Switching Frequency
<300μA Quiescent Current at Light Load
Mode
•
•
•
•
•
•
Supports High-side and Low-side
Rectification
Power Savings of Up to 1.5W in a Typical
Notebook Adapter
APPLICATIONS
•
•
•
•
Industrial Power Systems
Distributed Power Systems
Battery Powered Systems
Flyback Converters
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
ORDERING INFORMATION
Part Number*
Package
SOIC8
Top Marking
MP6902DS
MP6902DS
* For Tape & Reel, add suffix –Z (e.g. MP6902DS–Z);
For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6902DS–LF–Z)
PACKAGE REFERENCE
TOP VIEW
PGND
EN
1
2
3
4
8
7
6
5
V
G
NC
LL
V
DD
SS
V
D
V
Thermal Resistance (4)
SOIC8 .....................................90 ...... 45...°C/W
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
VDD to VSS......................................-0.3V to +27V
PGND to VSS ................................-0.3V to +0.3V
VG to VSS ......................................... -0.3V to VCC
VD to VSS .....................................-0.7V to +180V
LL, EN to VSS ...............................-0.3V to +6.5V
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
Maximum Operating Frequency............ 400 kHz
(2)
Continuous Power Dissipation
(TA=+25°C)
............................................................. 1.4W
Junction Temperature...............................150°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Lead Temperature (Solder).......................260°C
Storage Temperature .............. -55°C to +150°C
Recommended Operation Conditions (3)
VDD to VSS............................................8V to 24V
Operating Junction Temp. (TJ).... -40°C to +125°C
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
2
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
ELECTRICAL CHARACTERISTICS
VDD = 12V, TA= +25°C, unless otherwise noted.
Parameter
Symbol Conditions
Min
8
5.0
0.8
Typ
Max
24
7.0
1.2
10
Units
V
V
V
mA
mA
VDD Voltage Range
VDD UVLO Rising
VDD UVLO Hysteresis
Operating Current
Quiescent Current
6.0
1
8
ICC
Iq
CLOAD=5nF, FSW=100kHz
VSS-VD=0.5V
VDD =4V
2
3
210
375
290
150
30
255
440
380
Shutdown Current
µA
VDD=20V, EN=0V
Light-load Mode Current
Thermal Shutdown
Thermal Shutdown Hysteresis
Enable UVLO Rising
Enable UVLO Hysteresis
Internal Pull-up Current On EN
Pin
CONTROL CIRCUITRY SECTION
VSS –VD Forward Voltage
µA
oC
oC
V
1.1
55
1.5
0.2
1.9
0.4
V
10
15
µA
Vfwd
TDon
TDon
70
150
250
85
mV
ns
ns
µA
µs
µs
µs
CLOAD = 5nF
CLOAD = 10nF
VD = 180V
Turn-on Delay
Input Bias Current On VD Pin
Minimum On-time (5)
Light-load-enter Delay
Light-load-enter Pulse Width
Light-load-enter Pulse Width
Hysteresis
Light-load Resistor Value
Light-load Mode Exit Pulse
Width Threshold (VDS)
Light-load Mode Enter Pulse
Width Threshold (VGS) (5)
GATE DRIVER SECTION
VG (Low)
1
TMIN
CLOAD = 5nF
1.6
100
1.75
TLL-Delay RLL=100kΩ
TLL
TLL-H
RLL
RLL=100kΩ
1.3
2.2
RLL=100kΩ
0.2
µs
kΩ
mV
30
300
VLL-DS
-400
-250
1.0
-150
VLL-GS
V
ILOAD=1mA
VDD >17V
0.05
14
0.1
15
V
V
13
VDD-2.2
VG (High)
VDD <17V
Turn-off Threshold (VSS-VD)
Turn-off Propagation Delay
30
15
mV
ns
VD=VSS
VD =VSS, CLOAD=5nF,
TDoff
TDoff
35
45
ns
ns
R
GATE=0Ω
Turn-off Total Delay
VD =VSS, CLOAD=10nF,
RGATE=0Ω
Pull Down Impedance
Pull Down Current (5)
Notes:
1
2
2
Ω
A
3V <VG<10V
5) Guaranteed by Design and Characterization.
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
3
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
PIN FUNCTIONS
Pin #
Name
PGND
EN
Description
1
2
3
4
5
6
7
8
Power Ground, return for driver switch
Enable pin, active high
LL
Light load timing setting. Connect a resistor to set the light load timing.
FET drain voltage sense
VD
VSS
VDD
NC
Ground, also used as reference for VD
Supply Voltage
No connection
VG
Gate drive output
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
4
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 12V, unless otherwise noted.
Notes:
6) See Figure 13 for the test circuit.
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
BLOCK DIAGRAM
Figure 1—Function Block Diagram
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
6
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
OPERATION
The MP6902 supports operation in DCM and
Quasi-Resonant Flyback converters. The control
circuitry controls the gate in forward mode and
will turn the gate off when the MOSFET current is
fairly low.
body diode voltage drop (<-500mV) is much
smaller than the turn on threshold of the control
circuitry (-70mV), which will then pull the gate
driver voltage high to turn on the synchronous
MOSFET after about 150ns turn on delay
(Defined in Figure 2).
Blanking
As soon as the turn on threshold (-70mV) is
triggered, a blanking time (Minimum on-time:
~1.6us) will be added during which the turn off
threshold will be changed from -30mV to +50mV.
This blanking time can help to avoid error trigger
on turn off threshold caused by the turn on
ringing of the synchronous MOSFET.
The control circuitry contains a blanking function.
When it pulls the MOSFET on/off, it makes sure
that the on/off state at least lasts for some time.
The turn on blanking time is ~1.6us, which
determines the minimum on-time. During the turn
on blanking period, the turn off threshold is not
totally blanked, but changes the threshold
voltage to ~+50mV (instead of -30mV). This
assures that the part can always be turned off
even during the turn on blanking period. (Albeit
slower)
VDS
-30mV
-70mV
tDon
tDoff
VD Clamp
VGATE
tTotal
Because VD can go as high as 180V, a High-
Voltage JFET is used at the input. To avoid
excessive currents when Vg goes below -0.7V, a
small resistor is recommended between VD and
the drain of the external MOSFET.
5V
2V
Under-Voltage Lockout (UVLO)
Figure 2—Turn on and Turn off delay
When the VDD is below UVLO threshold, the part
is in sleep mode and the Vg pin is pulled low by a
10kΩ resistor.
Conducting Phase
When the synchronous MOSFET is turned on,
Vds becomes to rise according to its on
resistance, as soon as Vds rises above the turn
on threshold (-70mV), the control circuitry stops
pulling up the gate driver which leads the gate
voltage is pulled down by the internal pull-down
resistance (10kΩ) to larger the on resistance of
synchronous MOSFET to ease the rise of Vds.
By doing that, Vds is adjusted to be around -
70mV even when the current through the MOS is
fairly small, this function can make the driver
voltage fairly low when the synchronous
MOSFET is turned off to fast the turn off speed
(this function is still active during turn on blanking
time which means the gate driver could still be
turned off even with very small duty of the
synchronous MOSFET).
Enable pin
If EN is pulled low, the part is in sleep mode.
Thermal shutdown
If the junction temperature of the chip exceeds
170oC, the Vg will be pulled low and the part
stops switching. The part will return to normal
function after the junction temperature has
dropped to 120oC.
Thermal Design
If the dissipation of the chip is higher than
100mW due to switching frequencies above
100kHz.
Turn-on Phase
When the synchronous MOSFET is conducting,
current will flow through its body diode which
generates a negative Vds across it. Because this
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
7
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
Turn-off Phase
When Vds rises to trigger the turn off threshold (-
30mV), the gate voltage is pulled to low after
about 20ns turn off delay (defined in Figure 2) by
the control circuitry. Similar with turn-on phase, a
200ns blanking time is added after the
synchronous MOSFET is turned off to avoid error
trigger.
Figure
3
shows synchronous rectification
operation at heavy load condition. Due to the
high current, the gate driver will be saturated at
first, during which the gate driver voltage is kept
at ~2V lower than VDD (when VDD>16V, gate
driver will be internal clamped at 14V). After Vds
goes to above -70mV, gate driver voltage
decreases to adjust the Vds to typical -70mV.
Figure 5—Drain-Source and Gate Driver
voltage on SR MOFET
Figure
rectification waveform on drain-source voltage
DS and gate driver signal VGS. For safe operation
of the IC, it is required:
5
shows the whole synchronous
Figure
4
shows synchronous rectification
V
operation at light load condition. Due to the low
current, the gate driver voltage never saturates
but begins to decrease as soon as the
synchronous MOSFET is turned on and adjust
the Vds.
VOUT + V /n + VDS _Spike < 180V * k
IN
Where 180V is the maximum voltage rating on VD
pin of MP6902, VIN/VOUT is the input/output DC
voltage, n is the turn ratio from primary to
secondary of the power transformer, VDS_Spike is
the spike voltage on drain-source which is lead
by leakage inductance, while k is the de-rating
factor which is usually selected as 0.7~0.8.
Vds
-30mV
-70mV
Light-load Latch-off Function
Isd
The gate driver of MP6902 is latched to save the
driver loss at light-load condition to improve
efficiency. When the synchronous MOSFET’s
conducting period keeps lower than light load
timing (TLL) for longer than the light-load-enter
delay (TLL-Delay), MP6902 enters light-load mode
and latches off the gate driver. Here the
synchronous MOSFET’s conducting period is
from turn on of the gate driver to the moment
when VGS drops to below 1V (VLL_GS). During
Vgs
t0
t1
t2
Figure 3—Synchronous Rectification
Operation at heavy load
Vds
-30mV
-70mV
light-load
mode,
MP6902
monitors
the
synchronous MOSFET’s body diode conducting
period by sensing the time duration of the VDS
below -250mV(VLL_DS). If it is longer than TLL+TLL-
Isd
(TLL-H, light-load-enter pulse width hysteresis),
H
the light-load mode is finished and gate driver of
MP6902 is unlatched to restart the synchronous
rectification.
Vgs
t0
t1
t2
Figure 4—Synchronous Rectification
Operation at light load
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
8
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
Id
For MP6902, the light load enter timing (TLL) is
50% SR Conduction Period
Ipeak
programmable by connecting a resistor (RLL) on
LL pin, by monitoring the LL pin current (the LL
pin voltage keeps at ~2V internally), TLL is set as
following:
Ipeak˜ 4·IOUT
Ic˜ 2·IOUT
Ic
2.2μs
100kΩ
Vg
T ≈ RLL (kΩ)⋅
LL
SR MOSFET Selection and Driver Ability
SR Conduction Period
The Power Mosfet selection proved to be a trade
off between Ron and Qg. In order to achieve high
efficiency, the Mosfet with smaller Ron is always
preferred, while the Qg is usually larger with
smaller Ron, which makes the turn-on/off speed
lower and lead to larger power loss. For MP6902,
because Vds is regulated at ~-70mV during the
driving period, the Mosfet with too small Ron is
not recommend, because the gate driver may be
pulled down to a fairly low level with too small
Ron when the Mosfet current is still fairly high,
which make the advantage of the low Ron
inconspicuous.
Figure 6—Synchronous Rectification typical
waveforms in QR Flyback
Turn-on Delay vs. Qg
350
300
250
200
150
100
50
0
0
20
40
60
80
100
120
140
Qg (nC)
Figure 6 shows the typical waveform of QR
flyback. Assume 50% duty cycle and the output
Figure 7—Total Turn-on Delay vs. Qg
Typical System Implementations
current is IOUT
.
To achieve fairly high usage of the Mosfet’s Ron,
it is expected that the Mosfet be fully turned on at
least 50% of the SR conduction period:
C1
6
4
2
VD
VDD
PGND
LL
C2
1
3
Vds = −Ic ×Ron = −2⋅IOUT ×Ron ≤ −Vfwd
MP6902
EN
VG
C3
R3
R1
Where Vds is Drain-Source voltage of the Mosfet
and Vfwd is the forward voltage threshold of
MP6902, which is ~70mV.
8
5
VSS
R2
So the Mosfet’s Ron is recommended to be no
lower than ~35/IOUT (mΩ). (For example, for 5A
application, the Ron of the Mosfet is
recommended to be no lower than 7mΩ)
Figure 8— IC Supply derived directly from
Output Voltage
Figure
8
shows
the
typical
system
Figure 7 shows the corresponding total delay
during turn-on period (tTotal, see Figure 2) with
driving different Qg Mosfet by MP6902. From
Figure 7, with driving a 120nC Qg Mosfet, the
driver ability of MP6902 is able to pull up the gate
driver voltage of the Mosfet to ~5V in 300ns as
soon as the body diode of the Mosfet is
conducting, which greatly save the turn-on power
loss in the Mosfet’s body diode.
implementation for the IC supply derived from
output voltage, which is available in low-side
rectification and the output voltage is
recommended to be in the VDD range of MP6902
(from 8V to 24V).
If output voltage is out of the VDD range of
MP6902 or high-side rectification is used, it is
recommended to use an auxiliary winding from
the power transformer for the IC supply, which is
shown in Figure 9 and Figure.10.
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
9
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
R4
R4
C1
C1
D2
D1
R5
6
4
2
6
4
VDD
PGND
LL
VD
VD
VDD
D1
C2
C2
1
3
1
3
PGND
MP6902
MP6902
2
8
EN
VG
EN
VG
LL
C3
R3
R1
R3
C3
R1
8
5
5
VSS
VSS
R2
R2
Figure 9— IC Supply derived from Auxiliary
Winding in Low-Side Rectification
Figure 11— IC Supply derived from
Secondary Winding through External LDO in
Low-Side Rectification
C1
R1
R2
C1
4
2
8
R1
VG
LL
VD
EN
R2
3
MP6902
C3
D1
8
4
2
R3
VG
LL
VD
EN
MP6902
5
1
3
D1
R4
VSS
C3 R3
R5
D2
6
R4
PGND
VDD
5
1
VSS
C2
6
PGND
VDD
C2
Figure 10— IC Supply derived from Auxiliary
Winding in High-Side Rectification
Figure 12— IC Supply derived from
Secondary Winding through External LDO in
High-Side Rectification
There is another non-auxiliary winding solution
for the IC supply, which uses an external LDO
circuit from the secondary transformer winding.
See Figure.11 and Figure.12, compared with
using auxiliary winding for IC supply, this solution
has a bit higher power loss which is dissipate on
the LDO circuit especially when the secondary
winding voltage is high.
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
10
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL APPLICATION CIRCUIT
Figure 13—MP6902 for Secondary Synchronous Controller in 90W Flyback Application
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
11
MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
0.063(1.60)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.213(5.40)
PIN 1 ID
1
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
GAUGE PLANE
0.010(0.25) BSC
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
0.016(0.41)
0.050(1.27)
0o-8o
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6902 Rev. 1.13
1/11/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
12
相关型号：
©2020 ICPDF网 联系我们和版权申明