MP8352DL-LF [MPS]
Switching Regulator, Current-mode, 800kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14;
| 型号： | MP8352DL-LF |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, Current-mode, 800kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14 开关 光电二极管 输出元件 |
| 文件： | 总12页 (文件大小：336K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP8352
3V-6V Input, 6A, 600kHz Step-Down Converter
with Synchronizable Gate Driver
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP8352 is a monolithic step-down switch
mode converter with a built in internal power
MOSFET. It achieves 6A continuous output
current over a wide input supply range with
excellent load and line regulation.
•
•
•
•
•
•
3V to 6V Operating Input Range
6A Continuous Output Current
45mΩ Internal Power MOSFET Switch
External Power Supply Vcc
Power Good Indicator
Synchronous Gate Driver Delivers up to
95% Efficiency
Current mode operation provides fast transient
response and eases loop stabilization.
•
•
•
Fixed 600KHz Frequency
Synchronizable Up to 1.5MHz
Cycle-by-Cycle Over Current Protection with
Hiccup
Fault condition protection includes cycle-by-cycle
current limiting and thermal shutdown.
The MP8352 requires a minimum number of
readily available standard external components
and is available in a space saving 3mm x 4mm
14-pin QFN package.
•
•
•
Thermal Shutdown
Output Adjustable from 0.8V
Stable with Low ESR Output Ceramic
Capacitors
•
Available in a 3mm x 4mm 14-Pin QFN
Package
APPLICATIONS
•
Point of Load Regulator in Distributed
Power System
•
•
•
•
Digital Set Top Boxes
Personal Video Recorders
Broadband Communications
Flat Panel Television and Monitors
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency vs.
Output Current
100
4, 5, 6
11
V
IN
BST
IN
L1
2.2uH
12
2
8, 9, 10
13
External V
VCC
PG
SW
BG
CC
90
80
70
60
MP8352
M2
PGOOD
OFF ON
V
CC
Vin=3V
Vin=5V
Vin=6V
1
3
FB
EN/SYNC
GND
14
0
1
2
3
4
5
6
LOAD CURRENT(A)
MP8352 Rev. 1.0
1/25/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
1
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
ORDERING INFORMATION
Part Number*
Package
Top Marking
Free Air Temperature (TA)
MP8352DL
3x4 QFN14
8352
–40°C to +85°C
* For Tape & Reel, add suffix –Z (eg. MP8352DL–Z).
For RoHS compliant packaging, add suffix –LF (eg. MP8352DL–LF–Z)
PACKAGE REFERENCE
TOP VIEW
FB
1
2
3
4
5
6
7
14 GND
13 BG
PG
EN/SYNC
12 VCC
11 BST
10 SW
IN
IN
IN
9
8
SW
SW
N/C
EXPOSED PAD
ON BACKSIDE
Thermal Resistance (4)
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VIN ...................................... 6.5V
VSW....................... -0.3V(-5V for < 10ns) to 7.5V
VBS -VSW.......................................................... 6V
All Other Pins.................................–0.3V to +6V
3x4 QFN14..............................48.......11....°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-ambient
thermal resistance θJA, and the ambient temperature TA. The
maximum allowable continuous power dissipation at any
ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA.
Exceeding the maximum allowable power dissipation will cause
excessive die temperature, and the regulator will go into
thermal shutdown. Internal thermal shutdown circuitry protects
the device from permanent damage.
(2)
Continuous Power Dissipation (TA = +25°C)
………………………………………………....2.6W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature.............. –65°C to +150°C
Recommended Operating Conditions (3)
Supply Voltage VIN Vcc .......................3V to 6V
Operating Junct. Temp (TJ)..... –40°C to +125°C
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP8352 Rev. 1.0
1/25/2010
www.MonolithicPower.com
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© 2010 MPS. All Rights Reserved.
2
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
ELECTRICAL CHARACTERISTICS
VIN = 5V, VCC = 5V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max Units
Feedback Voltage
Feedback Current
VFB
IFB
RDS(ON)
0.788 0.808 0.828
V
nA
mΩ
µA
A
3V ≤ VIN ≤ 6V
VFB = 0.8V
10
45
Switch On Resistance
Switch Leakage
VEN = 0V, VSW = 0V
0
10
Current Limit (5)
8
Oscillator Frequency
Fold-back Frequency
Maximum Duty Cycle
Minimum On Time
VCC Under Voltage Lockout Threshold Rising
VCC Under Voltage Lockout Threshold
Hysteresis
fSW
VFB = 0.6V
VFB = 0V
VFB = 0.6V
400
60
85
600
150
90
100
2.8
800
240
KHz
KHz
%
ns
V
tON
200
mV
EN Input Low Voltage
En Input High Voltage
0.4
V
V
2.0
VEN = 2V
VEN = 0V
2
0.1
300
1.5
5.0
45
0.75
150
1
4
20
0.74
40
EN Input Current
µA
Sync Frequency Range (Low)
Sync Frequency Range (High)
Enable Turnoff Delay
Supply Current (Shutdown)
Supply Current (Quiescent)
Thermal Shutdown
Gate Driver Sink Impedance
Gate Driver Source Impedance
Gate Drive Current Sense Trip Threshold
Power Good Threshold Rising
Power Good Threshold Hysteresis
PG Pin Level
FSYNCL
FSYNCH
TOFF
KHz
MHz
us
µA
mA
°C
Ω
Ω
mV
V
VEN = 0V, VCC=5V
VEN = 2V, VFB = 1V
65
1.0
RSINK
RSOURCE
0.69
0.79
0.4
mV
V
VPG
PG Sink 4mA
Note:
5) Guaranteed by design.
MP8352 Rev. 1.0
1/25/2010
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3
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=5V, VCC=5V, VOUT=2.5V, TA = +25ºC, unless otherwise noted.
Disabled Supply Current
vs.Vcc Voltage
Enabled Supply Current
vs.Vcc Voltage
Efficiency vs.
Output Current
100
90
80
70
60
130
11 0
90
1000
900
800
700
600
500
70
50
Vin=3V
Vin=5V
Vin=6V
30
10
0
1
2
3
4
5
6
3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC VOLTAGE(V)
3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC VOLTAGE(V)
LOAD CURRENT(A)
Peak Current vs.
Duty Cycle
Line Regulation
Case Temperature Rise
vs.Output Current
55
45
35
25
15
5
13
12
11
10
9
0.01
0.00
-0.01
-0.02
-0.03
-0.04
-0.05
-0.06
8
Io = 0A
Io =3A
7
Io =6A
6
1
2
3
4
5
6
10 20 30 40 50 60 70 80 90
3.0 3.5 4.0 4.5 5.0 5.5 6.0
OUTPUT CURRENT(A)
DUTY CYCLE(%)
INPUT VOLTAGE (V)
Load Regulation
0.005
-0.005
-0.015
-0.025
-0.035
-0.045
-0.055
-0.065
-0.075
Vin=3V
Vin=5V
Vin=6V
0
1
2
3
4
5
6
LOAD CURRENT(A)
MP8352 Rev. 1.0
1/25/2010
www.MonolithicPower.com
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© 2010 MPS. All Rights Reserved.
4
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=6V, VCC=5V, VOUT=2.5V, TA = +25ºC, unless otherwise noted.
Hiccup with Short Output
Short Recovery
Enable Startup
No Load
V
OUT
Inductor
Current
5A/div
Inductor
Current
5A/div
1V/div
VSW
5V/div
V
EN
5V/div
V
OUT
OUT
1V/div
1V/div
Inductor
Current
2A/div
SW
5V/div
SW
5V/div
1ms/div
1ms/div
Enable Startup
Full Load
Vcc Startup
No Load
Vcc Startup
Full Load
V
OUT
V
OUT
V
OUT
1V/div
1V/div
1V/div
VSW
5V/div
VSW
5V/div
VSW
5V/div
Vcc
5V/div
EN
5V/div
Vcc
5V/div
Inductor
Current
2A/div
Inductor
Current
5A/div
Inductor
Current
5A/div
1ms/div
1ms/div
Input Ripple Voltage
Full Load
Output Ripple Voltage
Full Load
Load Transient Response
Load:3A-6A with slew rate:1A/us
V
V
V
OUT
OUT
IN
10mV/div
20mV/div
200mV/div
VSW
5V/div
VSW
5V/div
Inductor
Current
IO
2A/div
5A/div
400ns/div
1
s/div
400 s/div
MP8352 Rev. 1.0
1/25/2010
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5
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PIN FUNCTIONS
Pin #
Name
Description
Feedback. An external resistor divider from the output to GND, tapped to the FB pin
sets the output voltage. To prevent current limit run away during a short circuit fault
condition the frequency foldback comparator lowers the oscillator frequency when the
FB voltage is below 250mV.
1
FB
Power Good Indicator. Connect this pin to VCC or VOUT by a 100kꢀ pull-up resistor. The
output of this pin is low if the output voltage is 10% less than the nominal voltage,
otherwise it is an open drain.
2
PG
3
EN/SYNC
IN
On/Off Control and External Frequency Synchronization Input.
Supply Voltage. The MP8352 operates from a +3V to +6V unregulated input. C1 is
needed to prevent large voltage spikes from appearing at the input.
4, 5, 6
7
N/C
SW
No Connect.
8, 9, 10
Switch Output.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BST pins to form a floating supply across the
power switch driver.
11
BST
12
13
VCC
BG
Need external Bias Power Supply. Decouple with a 1µF ceramic capacitor.
Gate Driver Output. Connect this pin to the synchronous MOSFET Gate.
Ground. This pin is the voltage reference for the regulated output voltage. For this
reason care must be taken in its layout. This node should be placed outside of the M2
Exposed Pad to C1 ground path to prevent switching current spikes from inducing voltage noise into
the part. Connect exposed pad to GND plane for optimal thermal performance.
GND,
14
MP8352 Rev. 1.0
1/25/2010
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MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
OPERATION
IN
CURRENT SENSE
AMPLIFIER
- -
+
x40
RSEN
5mΩ
V
CC
BST
SW
OSCILLATOR
600KHz
EN/SYNC
Q
Q
DRIVER
S
+
--
R
R
V
CC
C1
1pF
CURRENT
LIMIT
V
CC
COMPARATOR
VCC
BG
C1
50pF
R1
300kΩ
REFERENCE
DRIVER
V
BG
+
+
--
--
FB
PWM
PG
ERROR
AMPLIFIER
COMPARATOR
V
BG
POWER
GOOD
GND
Figure 1—Functional Block Diagram
The MP8352 is a fixed frequency, synchronous,
step-down switching regulator with an integrated
high-side power MOSFET and a gate driver for a
low-side external MOSFET. It achieves 6A
continuous output current over a wide input
supply range with excellent load and line
regulation. It provides a single highly efficient
solution with current mode control for fast loop
response and easy compensation.
Error Amplifier
The error amplifier compares the FB pin voltage
with the internal 0.8V reference (REF) and
outputs a current proportional to the difference
between the two. This output current is then used
to charge or discharge the internal compensation
network to form the COMP voltage, which is used
to control the power MOSFET current. The
optimized
internal
compensation
network
minimizes the external component counts and
simplifies the control loop design.
The MP8352 operates in a fixed frequency, peak
current control mode to regulate the output
voltage. A PWM cycle is initiated by the internal
clock. The integrated high-side power MOSFET is
turned on and remains on until its current reaches
the value set by the COMP voltage. When the
power switch is off, it remains off until the next
clock cycle starts. If, in 90% of one PWM period,
the current in the power MOSFET does not reach
the COMP set current value, the power MOSFET
will be forced to turn off.
MP8352 Rev. 1.0
1/25/2010
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7
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
Enable/Synch Control
Thermal Shutdown
The MP8352 has a dedicated Enable/Synch
control pin (EN/SYNC). By pulling it high or low,
the IC can be enabled and disabled by EN. Tie
EN to VIN for automatic start up. To disable the
part, EN must be pulled low for at least 5µs.
Thermal shutdown is implemented to prevent
the chip from operating at exceedingly high
temperatures. When the silicon die temperature
is higher than 150°C, it shuts down the whole
chip. When the temperature is lower than its
lower threshold, typically 140°C, the chip is
enabled again.
The MP8352 can be synchronized to external
clock range from 300KHz up to 1.5MHz through
the EN/SYNC pin. The internal clock rising
edge is synchronized to the external clock rising
edge.
Floating Driver and Bootstrap Charging
The floating power MOSFET driver is powered
by an external bootstrap capacitor. This floating
driver has its own UVLO protection. This
UVLO’s rising threshold is 2.2V with a
hysteresis of 150mV. The bootstrap capacitor
voltage is regulated internally by VIN through D1,
M3, C4, L1 and C2 (Figure 2). If (VIN-VSW) is
more than 5V, U2 will regulate M1 to maintain a
5V BST voltage across C4.
VCC Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented
to protect the chip from operating at insufficient
supply voltage. The MP8352 UVLO comparator
monitors the output voltage of the internal
regulator, VCC. The UVLO rising threshold is
about 2.8V while its falling threshold is a
consistent 2.6V.
D1
V
Internal Soft-Start
CC
The soft-start is implemented to prevent the
converter output voltage from overshooting
during startup. When the chip starts, the
internal circuitry generates a soft-start voltage
(SS) ramping up from 0V to 1.2V. When it is
lower than the internal reference (REF), SS
overrides REF so the error amplifier uses SS as
the reference. When SS is higher than REF,
REF regains control.
M3
+
BST
+
U2
5V
--
--
C4
V
OUT
SW
L1
C2
Figure 2—Internal Bootstrap Charging
Over-Current-Protection and Hiccup
Circuit
The MP8352 has cycle-by-cycle over current
limit when the inductor current peak value
exceeds the set current limit threshold.
Meanwhile, output voltage starts to drop until
FB is below the Under-Voltage (UV) threshold,
typically 30% below the reference. Once a UV
is triggered, the MP8352 enters hiccup mode to
periodically restart the part. This protection
mode is especially useful when the output is
dead-short to ground. The average short circuit
current is greatly reduced to alleviate the
thermal issue and to protect the regulator. The
MP8352 exits the hiccup mode once the over
current condition is removed.
Startup and Shutdown
If VIN, VCC and EN are higher than their
appropriate thresholds, the chip starts. The
reference block starts first, generating stable
reference voltage and currents, and then the
internal regulator is enabled. The regulator
provides stable supply for the remaining
circuitries.
Three events can shut down the chip: EN low,
VCC low and thermal shutdown. In the
shutdown procedure, the signaling path is first
blocked to avoid any fault triggering. The
COMP voltage and the internal supply rail are
then pulled down. The floating driver is not
subject to this shutdown command.
MP8352 Rev. 1.0
1/25/2010
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© 2010 MPS. All Rights Reserved.
8
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
APPLICATION INFORMATION
Setting the Output Voltage
Synchronous MOSFET
The external resistor divider is used to set the
output voltage (see the schematic on front
page). The feedback resistor R1 also sets the
feedback loop bandwidth with the internal
compensation capacitor (see Figure 1). Choose
R1 to be around 40.2kꢀ for optimal transient
response. R2 is then given by:
The external synchronous MOSFET is used to
supply current to the inductor when the internal
high-side switch is off. It reduces the power loss
significantly when compared against a Schottky
rectifier.
Table 2 lists example synchronous MOSFETs
and manufacturers.
R1
R2 =
Table 2—Synchronous MOSFET Selection
Guide
VOUT
− 1
0.8V
Part No.
AM4874
Si7848
Manufacture
Analog Power
Vishay
Table 1—Resistor Selection for Common
Output Voltages
VOUT (V)
1.8
R1 (kΩ)
40.2 (1%)
40.2 (1%)
40.2 (1%)
R2 (kΩ)
32.4 (1%)
19.1 (1%)
13 (1%)
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, therefore a capacitor is required to
supply the AC current to the step-down converter
while maintaining the DC input voltage. Use low
ESR capacitors for the best performance. Ceramic
capacitors with X5R or X7R dielectrics are
highly recommended because of their low ESR
and small temperature coefficients. For most
applications, a 22µF capacitor is sufficient.
2.5
3.3
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
of at least 25% percent higher than the
maximum load current is recommended for
most applications. For highest efficiency, the
inductor DC resistance should be less than
15mꢀ. For most designs, the inductance value
can be derived from the following equation.
Since the input capacitor (C1) absorbs the input
switching current it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
VOUT × (VIN − VOUT
VIN × ∆IL × fOSC
)
L =
⎛
⎞
⎟
VOUT
VIN
VOUT
VIN
⎜
IC1 = ILOAD
×
× 1−
⎜
⎝
⎟
⎠
Where ∆IL is the inductor ripple current.
Choose inductor current to be approximately
30% if the maximum load current, 6A. The
maximum inductor peak current is:
The worse case condition occurs at VIN = 2VOUT,
where:
ILOAD
IC1
=
2
∆IL
IL(MAX) = ILOAD
+
For simplification, choose the input capacitor
whose RMS current rating greater than half of
the maximum load current.
2
Under light load conditions below 100mA, larger
inductance is recommended for improved
efficiency.
MP8352 Rev. 1.0
1/25/2010
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9
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
The input capacitor can be electrolytic, tantalum
PCB Layout Guide
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1µF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple caused by capacitance can
be estimated by:
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance.
If change is necessary, please follow these
guidelines and take Figure 3 for references.
1) Keep the path of switching current short
and minimize the loop area formed by Input
cap, high-side MOSFET and low-side
MOSFET/schottky diode (as the red dotted
line loop shows).
⎛
⎞
⎟
⎟
⎠
ILOAD
VOUT
VIN
VOUT
⎜
∆V
=
×
× 1−
IN
⎜
⎝
fS × C1
V
IN
2) Keep
the
connection
of
low-side
Selecting the Output Capacitor
MOSFET/schottky diode between SW pin
and input power ground as short and wide
as possible.
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
preferred to keep the output voltage ripple low.
The output voltage ripple can be estimated by:
3) Bypass ceramic capacitors are suggested
to be put close to the VIN and VCC Pin.
4) Ensure all feedback connections are short
and direct. Place the feedback resistors
and compensation components as close to
the chip as possible.
⎛
⎜
⎝
⎞
⎟
⎟
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
1
⎜
⎜
∆VOUT
=
× 1−
× RESR
+
fS × L
8 × fS × C2
⎠
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
5) Route SW away from sensitive analog
areas such as FB.
6) Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
VOUT
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
8 × fS2 × L × C2
VOUT
SGND
⎜
∆VOUT
=
× 1−
V
FB
GND
BG
IN
PG
External Blas Supply
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
EN/SYNC VCC
IN
IN
BST
SW
SW
IN
VOUT
VOUT
⎛
⎞
N/C
SW
∆VOUT
=
× ⎜1−
⎟ ×RESR
⎜
⎟
fS ×L
VIN
⎝
⎠
Single Point
Connection
L
CIN
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP8352 can be optimized for a wide range of
capacitance and ESR values.
PGND
VOUT
COUT
Figure 3—PCB Layout Conceptual Drawing,
Only Top Layer Shown,
and a Ground Plane Is Assumed
MP8352 Rev. 1.0
1/25/2010
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10
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator, the applicable
conditions of external BST diode are:
VOUT
z Duty cycle is high: D=
>65%
VIN
In these cases, an external BST diode is
recommended from VCC to BST pin, as shown
in Fig.4
External BST Diode
IN4148
BST
External V
CBST
CC
MP8352
2.5V
SW
L
COUT
Figure 4—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BST diode is
IN4148, and the BST cap is 0.1~1µF, when the
BST diode is used.
Vcc Bias Supply Consideration
The MP8352 does not have the LDO inside. It
needs external bias power supply to make the
device work properly.
MP8352 Rev. 1.0
1/25/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
11
MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PACKAGE INFORMATION
3mm x 4mm QFN14
1.60
1.80
2.90
3.10
0.30
0.50
PIN 1 ID
SEE DETAIL A
PIN 1 ID
MARKING
1
14
0.18
0.30
3.20
3.40
3.90
4.10
PIN 1 ID
INDEX AREA
0.50
BSC
7
8
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
2.90
1.70
NOTE:
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-229, VARIATION VGED-3.
5) DRAWING IS NOT TO SCALE.
0.25
3.30
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP8352 Rev. 1.0
1/25/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
12
相关型号：
MP8352DL-LF-Z
Switching Regulator, Current-mode, 800kHz Switching Freq-Max, PDSO14, 3 X 4 MM, ROHS COMPLIANT, MO-229VGED-3, QFN-14
MPS
MP8352DL-Z
Switching Regulator, Current-mode, 800kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14
MPS
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