MP8903DG-2.5-LF-P [MPS]
IC REG LINEAR POS ADJ 150MA 8QFN;
| 型号： | MP8903DG-2.5-LF-P |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | IC REG LINEAR POS ADJ 150MA 8QFN |
| 文件： | 总10页 (文件大小：461K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP8903
Low Dropout
150mA Linear Regulator
The Future of Analog IC Technology
DESCRIPTION
FEATURES
•
•
2.7V to 6.5V Input Voltage Range
The MP8903 is a 150mA low-dropout linear
regulator that can operate from 2.7V to 6.5V
input. It regulates the output with 2% accuracy
and comes with preset 2.5V, 2.85V or 3.3V
output. An external resistor divider may be used
to adjust the output voltage from 1.25V to 5V.
Fixed Output Voltage Options of 2.5V,
2.85V or 3.3V
•
Adjustable Output Voltage from 1.25V to 5V
using an External Rr Divider
Low 100mV DropomA Output
2% Accurate Output Vge
Stable With ow-ESR Output Capacitors
Thermal Protecion
•
•
•
•
•
The MP8903 has thermal protection to guard
against harsh operating conditions, and is
available in small QFN8 (2x2mm) and 5-pin
TSOT23 packages.
AvailaTiny QFN8 (2x2mm) and
TSOT2ckages
APPLICATIONS
•
•
802.11 PC Cards
Mobile Handset PLL Power
Audio Codec Power
All MPS parts are lead-fee and adhere tthe RoHS directiveMPS g
status, please visit MPS ebsite under Products, Quality page.
“MPS” and “ThFuture of Anaog IC Technology” are ered tks of
Monolithic Poer SystmsInc.
TYPICAL APPLICATION
V
vs I
LOAD
DROPOUT
V
160
140
120
100
80
IN
2.7V to 6.5V
UTPUT
125V to 5V
IN
OUT
R1
R2
MP8903DXX.X
EN GND
FB
Te sum of
R1 nd R2
should not
60
EN (Pin3)
may be connected
to IN (Pin 1) directly
40
exeed 100k
20
0
0
20 40 60 80 100 120 140 160
(mA)
I
LOAD
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
1
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
ORDERING INFORMATION
Part Number
MP8903DG–2.5*
MP8903DG–2.85
MP8903DG–3.3
MP8903DJ–2.5
MP8903DJ–2.85
MP8903DJ–3.3
Package
Top Marking
Free Air Temperature (T
R4
R5
R6
R4
R5
R6
QFN8 (2x2mm)
–40°C to +85°
TSOT23-5
* For Tape & Reel, add suffix –Z (e.g. MP8903DG–2.85–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP8903DG–2.85––Z)
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
GND
EN
IN
1
2
3
4
8
7
6
5
FB
IN
GND
EN
1
2
3
5
4
UT
FB
NC
OUT
OUT
IN
QFN8 (2x2mm)
TSOT23-5
rmal Resistance (4)
OT23-5......................220.... 110.. °C/W
QFN8 (2x2mm............80...... 16... °C/W
θJA
θJC
ABSOLUTE MAXIMUM RNGS (1)
IN Supply Voltage......................–0.3V to +7.0V
FB Voltage........................–0.3V to VOUT + 0.3V
All Other Pins.................................–0.3V to +6V
Continuous Power Dissipation (TA = +25°C) (2)
TSOT23-5.......................................... 0.57W
QFN8 (2x2....................................... 1.6W
Junction Temerature..............................150°C
Lead Temperature ....................................260°C
Storage Temperature ............ –65°C to +150°C
Notes:
1) Exceeding tese ratings may damage the device.
2) The maximum llowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
bient thermal resistance θJA, and the ambient temperature
The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/ θJA. Exceeding the maximum allowable power dissipation
wll cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
ommended Operating Conditions (3)
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7 4-layer board.
Voltage...................................2.7V to 6.5V
put Voltage.................................1.25V to 5V
Load Current...........................150mA Maximum
Operating Temperature............. –40°C to +85°C
Maximum Junction Temp. (TJ) ......+125°C
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
2
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
ELECTRICAL CHARACTERISTICS
VIN = 5V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
Max
6.5
±2.0
1
Uni
Operating Voltage
Output Voltage Accuracy
Shutdown Current
IOUT = 1mA
2.7
IOUT = 1mA, VOUT = 1.5V to 5V
±1.0
0.1
VEN = 0V, VIN = 5V
A
1.197 1.222 1.246
FB Regulation Voltage
Dropout Voltage (6)
V
1.194 1.222 1.249
–40°C ≤ TA ≤ +85°C
VOUT = 3V
OUT = 4V
IOUT = 150mA
OUT = 1mA,
mV
V
I
Line Regulation
Load Regulation
0.005
0.001
50
0.08
0.02
%/V
%/mA
dB
VIN = (VOUT + 0.5V) to 6.5V (7)
I
OUT = 1mA to 150mA,
VIN = VOUT + 0.5V (7)
VIN > VOUT +0.5V, C3 = 2.2μF
VIN(AC) = 100mV, f = 1kHz (5)
PSRR
VIN > VOUT +0.5V, C3 = 2.2μF,
20
dB
VIN(AC) = 100mV, f = 1MHz (5)
EN Input High Voltage
EN Input Low Voltage
EN Input Bias Current
Thermal Protection (5)
Thermal Protection Hysteresis (5)
Notes:
1.5
0.4
1
VEN 0V
0.01
155
30
μA
C
°C
5) Parameter is guaranteed by design, not pion tsted.
6) Dropout Voltage is defined as the input ifferential when the output vtage drops 1% below its ormal value
7) IN = 2.7V for VOUT = 1.25V to 2.2V
V
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
3
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 4.5V, VOUT = 2.85V, C1 = 1μF, C2 = 0.1μF, C3 = 2.2μF, TA = +25°C unless otherwise noted.
I
vs V
I
vs I
LOAD
GND
IN
GND
135
130
125
120
115
110
105
135
130
125
120
115
110
10
V
= 6.5V
IN
I
= 150mA
V
= 5.0V
LOAD
IN
I
= 1mA
LOAD
V
.7V
100
IN
2
3
4
5
6
7
50
150
V
(V)
I
(mA)
LOAD
IN
V
s I
LOAD
DROPOUT
V
OUT
vs. V
IN
160
140
120
100
80
2.87
2.865
2.86
I
= 1mA
LOAD
2.855
2.85
60
I
= 150m
LOAD
40
2.845
2.84
20
0
0
60 80 100 120 140 160
(mA)
3
4
5
6
7
V
(V)
OAD
IN
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
4
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
PIN FUNCTIONS
QFN8
TSOT23-5
(2x2mm)
Pin #
Name Description
GND Ground.
Pin #
1
2
3
Enable Input. Drive EN high to turn on the MP8903; low to turn it of
2
EN
automatic startup, connect EN to IN.
Power Source Input. IN supplies the internal power to the MP8903 and is the
source of the pass transistor. Bypass IN to GND with a 1μF or greater
capacitor.
Regulator Output. OUT is the output of the linear Bypass OUT to
GND with a 1μF or greater capacitor.
3, 4
1
5
IN
5, 6
7
OUT
NC No Connect.
Feedback Input. Connect a resistive voltage divider from OUT to FB to set the
output voltage. The OUT feedback threld is 1.222V.
8
4
FB
OPERATION
The MP8903 is a low-current, low-dropout
linear regulator. The MP8903 uses a PMOS
pass element and features internal thermal
shutdown. The normally fixed output MP8903
may be converted to an adjustable output devic
by applying a resistor divider network as shown i
Figure 2. An optional feed-forward capacitoYP
,
may be added for an improved transient resp
OUT
V
V
IN
OUT
INTERNAL
RESISTOR
DIVIDER
C
YP
+
FB
BANDGAP
REFERE
C3
V
EN
GND
Figure 1—Fxed Output Regulator
EXTERNAL
RESISTOR
DIVIDER
UT
V
V
IN
OUT
R1
FB
C
BYP
+
--
BANDGAP
REFERENCE
R2
C
OUT
V
EN
GND
Figure 2—Adjustable Regulator: VOUT = VFB (1+(R1/R2))
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
5
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
Input Capacitor Selection
APPLICATION INFORMATION
Setting the Output Voltage
The fixed output voltage of the MP8903 is set to
2.5V, 2.85V or 3.3V, depending on the internal
resistor divider (Figure 1). You can also adjust
the output voltage by using an external resistor
divider (R1 and R2 in Figure 2). However, the
sum of R1 and R2 should not exceed 100kΩ in
order to minimize the impact of the internal
resistor divider. For an accurate output-voltage
setting, use 10kΩ (±1%) for the low-side
resistor R2 of the voltage divider, while the
high-side resistor R1 can be determined by the
equation:
For proper operation, place a ceramic capa
(C1) between 1µF and 10µF of dielectric type
X5R or X7R between the input pin and.
Larger values in this range will helve
line transient response at the drawbck of
increased size.
Output Capacitor Selection
For stable operation, ceramic capacitor
(C3) of type X5R or etween 1µF and
10µF. Larger values in s range will help
improve load transient response and reduce
noise with the dawback of increased size.
Output caof other dielectric types may
be used, not recommended as their
capacitance cdeviate greatly from heir rated
vale over emperature.
⎛
⎞
VOUT − VFB
⎜
⎜
⎟
⎟
R1 = R2×
VFB
⎝
⎠
Where VFB is the OUT feedback threshold
voltage equal to 1.222V.
To improve load transent response, add
small ceramic (X5R, X7R or Y5V dielric)
100nF feed forward capacitor in parallel w.
The feed forward capactor is not rired
stable operation.
Example: For 2.5V Output
2.5V −1.222V
R1=
= 10.41kΩ
1.222V
⎛
⎞
⎜
⎟
10kΩ
⎝
⎠
You can select a standard 10.5ꢀ (±1%)
resistor for R1.
The following table lists the se1 values
for some typical output voltages:
Table 1—Adjustable Ouput Voltage R1 Values
R2 (Ω)
VOUT (V)
1.25
1.5
1.8
2
R1 (Ω)
232
2.26k
4.75k
6.34k
10.5k
13k
2.5
2.8
3
10k
14.7k
16.9k
22.6k
30.9k
3.3
4
5
In Figures 3 and 4, C2 is added r an improved
transient response.
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
6
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
TYPICAL APPLICATION CIRCUIT
V
IN
2.7V to 6.5V
3, 4
5, 6
OUTPUT
2.85V
IN
OUT
C2
100nF
MP8903DX-2.85
2
8
V
IN
EN
GND
FB
1
Figure 3—Typical Application Circuit (Fixed)
V
IN
2.7V to 6.5V
3, 4
5, 6
UTPUT
IN
OUT
MP8903DX-X.X
2
8
V
IN
EN GND
F
1
Figure 4—Typical Application Circuit (Adjutable)
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
7
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
PCB LAYOUT GUIDE
PCB layout is very important to achieve good regulation, ripple rejection, transient response a
thermal performance. It is highly recommended to duplicate EVB layout for optimum performance.
If change is necessary, please follow these guidelines and take figure 5 for reference.
1) Input and output bypass ceramic capacitors are suggested to be put close to the IN Pin UT
Pin respectively.
2) Ensure all feedback connections are short and direct. Place the feedback resistors and
compensation components as close to the chip as possible.
3) Connect IN, OUT and especially GND respectively to a large copper cool the chip to
improve thermal performance and long-term reliability.
V
V
IN
IN
1
5
4
3,4
5,6
OUTPUT
OUTPUT
IN
OUT
FB
IN
OUT
FB
C2
C2
903DJ
MP8903DG
R
C
R3
C1
R1
2
R1
R2
2
8
V
V
IN
GND
2
C3
IN
EN GND
4
C3
GND
R2
T
VIN
C1
1
2
3
4
8
FB
GND
EN
IN
R3
NC
OUT
7
6
5
R1
C2
R3
1
2
3
VIN OUT
GN
5
IN
OUT
C3
R2
C2
EN
FB 4
C1
C3
OUT
IN
R1
GND
Top Layer
Figure 5—PCyout
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
8
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
PACKAGE INFORMATION
QFN8 (2x2mm)
PIN 1 ID
SEE DETAIL
1.90
2.10
0.25
0.45
0.45
0.65
PIN 1 ID
MARKING
0.18
0.30
8
5
1
1.90
2.10
1.05
1.25
0.50
BSC
PIN 1 ID
INDEX AREA
TOP VIEW
VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NO
1.9
0.0
0.70
1) ALL IMENSIONS ARETERS.
2) EXPOSED PADDLE SIZOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHE 0.10 MILLIMETER MAX.
4) DRAWING CONFOMS TO JEDEC MO-229, VARIATION VCCD-3.
5) DRAWING IS NOT TO SCALE.
0.25
0.50
1.20
RECOMMENDED LAND PATTERN
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
9
MP8903 – LOW DROPOUT, 150mA LINEAR REGULATOR
TSOT23-5
0.95
BSC
0.60
TYP
2.80
3.00
5
4
1.20
TYP
1.50
1.70
2.60
TYP
2.60
3.00
1
3
TOP VIEW
RECOMENDED LAND PATTERN
0.84
0.90
10 MAX
SEATING PLANE
0.09
0.20
0.30
0.50
0.0
0.10
0.95 BSC
SEE DETAIL "A"
FRONT VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PRSION OR GATE BURR.
GAUGLANE
0.2
3) GE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OROTRUSION.
0.30
050
4) LEACOPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
0o-8o
5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
DETAIL A
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP8903 Rev. 1.11
4/30/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
10
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