MP9159AGJ [MPS]
1 A, 6 V, 1.5 MHz, Low IQ, COT Synchronous Step-Down Converter in 8-pin TSOT23;
| 型号： | MP9159AGJ |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 1 A, 6 V, 1.5 MHz, Low IQ, COT Synchronous Step-Down Converter in 8-pin TSOT23 |
| 文件： | 总15页 (文件大小：444K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP9159A
1 A, 6 V, 1.5 MHz, Low IQ, COT
Synchronous Step-Down Converter
in 8-pin TSOT23
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP9159A is a monolithic step-down,
switch-mode converter with built-in power
MOSFETs. It achieves a 1 A continuous output
current from a 2.5 V to 6 V input voltage range
with excellent load and line regulation. The
output voltage can be regulated as low as
0.6 V.
Very Low IQ: 17 μA
Default 1.5 MHz Switching Frequency
1.5% VFB Accuracy
EN and Power Good for Power Sequencing
Wide 2.5 V to 6 V Operating Input Range
Output Adjustable from 0.6 V
Up to 1 A Output Current
100% Duty Cycle in Dropout
120 mΩ and 90 mΩ Internal Power
MOSFET Switches
The constant-on-time (COT) control scheme
provides fast transient response and eases loop
stabilization. Fault condition protection includes
cycle-by-cycle current limiting and thermal
shutdown.
Cycle-by-Cycle Over-Current Protection
Short-Circuit Protection with Hiccup Mode
Stable with Low ESR Output Ceramic
Capacitors
The MP9159A is available in a small TSOT23-8
package and requires a minimum number of
Available in a TSOT23-8 Package
readily
available,
standard,
external
components.
APPLICATIONS
The MP9159A is ideal for a wide range of
applications including high-performance DSPs,
FPGAs, PDAs, and portable instruments.
Wireless/Networking Cards
Portable Instruments
Battery Powered Devices
Low Voltage I/O System Power
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
L1
VIN
VOUT
1 H
2.5V to 6V
1.2V/1A
SW
VIN
C1
10 F
OUT
C2
10 F
R1
200k
MP9159A
EN
PG
EN
PG
FB
R2
200k
AGND
PGND
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
1
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP9159AGJ
TSOT23-8
See Below
* For Tape & Reel, add suffix –Z (eg. MP9159AGJ–Z)
TOP MARKING
AVD: Product code of MP9159AGJ
Y: Year code
PACKAGE REFERENCE
TOP VIEW
PG
VIN
EN
1
2
3
4
8
7
6
5
FB
SW
AGND
OUT
PGND
TSOT23-8
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
2
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
TSOT23-8..............................100..... 55... C/W
θJA
θJC
Supply voltage (VIN) ................................... 6.5 V
VSW......................................................................
-0.3 V (-1.5 V for < 20n s & -4 V for < 8 ns) to 6.5 V
(10 V for <10 ns)
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will produce an excessive die temperature,
causing the regulator to go into thermal shutdown. Internal
thermal shutdown circuitry protects the device from
permanent damage.
All other pins................................-0.3 V to 6.5 V
Junction temperature................................150C
Lead temperature .....................................260C
(2)
Continuous power dissipation (TA = +25°C)
……….….. .............................................. 1.25 W
Storage temperature................ -65C to +150C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions (3)
Supply voltage (VIN) .........................2.5 V to 6 V
Operating junction temp. (TJ)... -40°C to +125°C
MP9159A Rev. 1.01
6/30/2016
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© 2016 MPS. All Rights Reserved.
3
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 5 V, TA = +25C, unless otherwise noted.
Parameter
Symbol Condition
Min
-1.5
-2.5
Typ
Max
+1.5
+2.5
50
Units
V/%
V/%
nA
0.600
2.5 V ≤ VIN ≤ 6 V, TA=25C
TA = -40C to +85C(6)
VFB = 0.6 V
Feedback voltage
VFB
Feedback current
IFB
10
120
90
PFET switch on resistance
NFET switch on resistance
RDSON_P
RDSON_N
mΩ
mΩ
V
EN = 0 V, VIN = 6 V
Switch leakage
PFET current limit
On time
0
1
μA
A
VSW = 0 V and 6 V
2
VIN = 5 V, VOUT = 1.2 V
VIN = 3.6 V, VOUT = 1.2 V
VOUT = 1.2 V
166
220
TON
ns
-20%
-25%
1500 +20% kHz/%
1500 +25% kHz/%
Switching frequency
Minimum off time(6)
Fs
TA = -40oC to +85oC(6)
TMIN-OFF
60
ns
Soft-start time
TSS-ON
VOUT from 10% to 90%
0.6
1.15
1.7
ms
FB voltage respect to the
regulation
Power good upper trip threshold
PGH
+10
%
Power good lower trip threshold
Power good delay
PGL
PGD
VPG-L
-10
50
%
μs
V
Power good sink current capability
Sink 1 mA
0.4
Power good logic high voltage
VPG-H
RPG
VIN = 5 V, VFB = 0.6 V
4.9
V
kΩ
V
Power good internal pull-up
resistor
550
2.3
Under-voltage lockout threshold—
rising
2.15
2.45
0.4
Under-voltage lockout threshold—
hysteresis
260
mV
EN input logic low voltage
EN input logic high voltage
V
1.2
V
VEN = 2 V
1.5
0
μA
μA
nA
EN input current
VEN = 0 V
Supply current (shutdown)
Supply current (quiescent)
VEN = 0 V, VIN = 3 V
20
100
20
VEN = 2 V, VFB = 0.63 V,
17
μA
VIN = 5 V
Thermal shutdown(5)
Thermal hysteresis(5)
150
30
C
C
NOTES:
5) Guaranteed by design.
6) Guaranteed by characterization test.
MP9159A Rev. 1.01
6/30/2016
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© 2016 MPS. All Rights Reserved.
4
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5 V, VOUT = 1.2 V, L = 1.0 µH, TA = +25ºC, unless otherwise noted.
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
5
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5 V, VOUT = 1.2 V, L = 1.0 µH, TA = +25ºC, unless otherwise noted.
MP9159A Rev. 1.01
6/30/2016
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© 2016 MPS. All Rights Reserved.
6
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5 V, VOUT = 1.2 V, L = 1.0 µH, TA = +25ºC, unless otherwise noted.
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
7
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5 V, VOUT = 1.2 V, L = 1.0 µH, TA = +25ºC, unless otherwise noted
MP9159A Rev. 1.01
6/30/2016
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© 2016 MPS. All Rights Reserved.
8
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
TSOT23-8
Name Description
Pin #
Power good indicator. The output of PG is an open drain with an internal pull-up
resistor to VIN. PG is pulled up to VIN when the FB voltage is within ±10% of the
regulation level. If FB voltage is out of this regulation range, it is low.
Supply voltage. The MP9159A operates from a +2.5 V to +6 V unregulated input. C1 is
required to prevent large voltage spikes from appearing at the input.
Switch output.
1
PG
2
VIN
SW
3
4
5
6
PGND Power ground.
Input sense pin for output voltage.
AGND Analog ground for internal control circuit.
OUT
Feedback. An external resistor divider from the output to AGND (tapped to FB) sets the
output voltage.
On/off control.
7
8
FB
EN
MP9159A Rev. 1.01
6/30/2016
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© 2016 MPS. All Rights Reserved.
9
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
VIN
Bias
&
Voltage
Soft start
EN
+
COMP
VTH
Reference
-
Lo-Iq
Main
Switch
(PCH)
0.6V
RST
Constant
PDRV
+
+
-
PWM
E.A.
PWM
On -Time
Pulse
Lo-Iq
+
+
-
EN
SW
FBCOMP
Lo-Iq
Driver
FB
VOUT
Synchronous
Rectifier
Ramp
Generator
SW
(NCH)
NDRV
Lo-Iq
Hi-Z
OUT
VIN
PGND
AGND
PG
0.66V
FB for
+
COMP
+
Fixed Output
COMP
-
-
Lo-Iq
+
COMP
0.54V
-
Figure 1—Functional block diagram
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
10
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The MP9159A uses constant-on-time (COT)
control with input voltage feed forward to
stabilize the switching frequency over a full
input range. At light load, the MP9159A
employs a proprietary control of the low-side
switch and the inductor current to eliminate
ringing on the switching node and improve
efficiency.
time in CCM is 55 ns. It is difficult to enter DCM
at light load. Using a smaller inductor improves
this problem, making it easier to enter DCM.
Enable (EN)
When the input voltage is greater than the
under-voltage lockout threshold (2.3 V,
typically), the MP9159A is enabled by pulling
EN higher than 1.2 V. Floating EN or pulling EN
down to ground disables the MP9159A. There
is an internal 1 MΩ resistor from EN to ground.
Constant-On-Time (COT) Control
Compare to fixed frequency PWM control,
constant-on-time control offers the advantage of a
simpler control loop and faster transient response.
By using input voltage feed forward, MP9159A
maintains a nearly constant switching frequency
across the input and output voltage range. The
on time of the switching pulse can be estimated
using Equation (1):
Soft Start (SS)
MP9159A has built-in soft start that ramps up
the output voltage in a controlled slew rate,
avoiding overshoot at start-up. The soft-start
time period is about 1.15 ms, typically.
Power GOOD Indicator (PG)
VOUT
MP9159A has an open drain with a 550 kꢀ pull-
up resistor pin that functions as a power good
indicator (PG). When FB is within +/-10% of the
regulation voltage (i.e., 0.6 V), PG is pulled up
to VIN by the internal resistor. If the FB voltage
is out of the +/-10% window, PG is pulled down
to ground by an internal MOSFET. The
MOSFET has a maximum Rdson of less than 400
ꢀ.
TON
0.667s
(1)
V
IN
To prevent inductor current runaway during load
transient, the MP9159A fixes the minimum off
time at 60 ns. However, this minimum-off time
limit will not affect operation of the MP9159A in
steady-state operation.
Light-Load Operation
In a light-load condition, the MP9159A uses a
proprietary control scheme to save power and
improve efficiency. It turns off the low-side
switch when the inductor current begins to
reverse. Then it works in discontinuous
conduction mode (DCM) operation.
Current Limit
MP9159A has a minimum 2 A current limit for
the high-side switch. When the high-side switch
hits the current limit, the MP9159A remains at
the hiccup threshold until the current decreases.
This prevents the inductor current from
continuing to build up, which will result in
damage to the components.
There is a zero current cross circuit to detect if
the inductor current starts to reverse.
Considering the internal circuit propagation time,
the typical delay is 50 ns. This means the
inductor current will still fall after the ZCD is
triggered in this delay. If the inductor current
falling slew rate is fast (Vo voltage is high or
close to Vin), the low-side MOSFET (LS-FET) is
turned off, and the inductor current may be
negative. This phenomena prevents the
MP9159A from entering DCM operation even if
there is no load. If DCM is required, the off time
of the LS-FET in CCM should be longer than
100 ns (2 times the propagation delay). For
example, if Vin is 3.6 V and Vo is 3.3 V, the off
Short Circuit and Recovery
The MP9159A enters short-circuit protection
mode when the current limit is reached, and it
tries to recover from the short circuit with hiccup
mode. During a short-circuit protection, the
MP9159A disables the output power stage,
discharges the soft-start capacitor, and then
automatically tries to soft-start again. If the
short-circuit condition still holds after the soft-
start ends, the MP9159A repeats this operation
cycle until the short circuit disappears, and the
output rises back to regulation level.
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
11
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Choose
the
inductor
current
to
be
COMPONENT SELECTION
approximately 30 percent of the maximum load
current. The maximum inductor peak current
can be calculated using Equation (4):
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Typical Application on page 1).
The value of the feedback resistor (R1) cannot
be too large or too small, considering the trade-
off between a dynamic circuit and stability in the
circuit. Choose R1 around 120 kꢀ to 200 kꢀ.
R2 is then given using Equation (2):
IL
2
IL(MAX) ILOAD
(4)
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, and therefore a capacitor is
required to supply the AC current to the step-
down converter while maintaining the DC input
voltage. Use low ESR capacitors for the best
performance. Ceramic capacitors with X5R or
X7R dielectrics are highly recommended
because of their low ESR and small
temperature coefficients. For most applications,
a 10 µF capacitor is sufficient. For a higher
output voltage, a 22 μF capacitor may be
needed for a more stable system.
R1
(2)
R2
Vout
1
0.6
The feedback circuit is highly recommended
(see Figure 2).
Vout
MP9159A
R1
FB
Since the input capacitor absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated using Equation (5)
and Equation (6):
R2
Figure 2—Feedback network
Table 1 lists the recommended resistor values
for common output voltages.
VOUT
VIN
VOUT
VIN
IC1 ILOAD
1
(5)
Table 1—Resistor selection for common output
voltages
The worse case condition occurs at VIN = 2VOUT
where:
,
V
OUT (V)
R1 (kΩ)
200(1%)
200(1%)
200(1%)
200(1%)
200(1%)
R2 (kΩ)
300(1%)
200(1%)
100(1%)
63.2(1%)
44.2(1%)
ILOAD
IC1
(6)
1.0
2
1.2
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current. The input capacitor
can be electrolytic, tantalum, or ceramic. When
using electrolytic or tantalum capacitors, a small,
high-quality ceramic capacitor (e.g., 0.1 μF)
should be placed as close to the IC as possible.
When using ceramic capacitors, make sure
they have enough capacitance to provide
sufficient charge to prevent excessive voltage
ripple at the input. The input voltage ripple
caused by capacitance can be estimated using
Equation (7):
1.8
2.5
3.3
Selecting the Inductor
A 0.68 µH to 2.2 µH inductor is recommended
for most applications. For highest efficiency, the
inductor DC resistance should be less than
15 mꢀ. For most designs, the inductance value
can be derived from Equation (3):
VOUT (V VOUT
)
IN
(3)
L1
V IL fOSC
IN
ILOAD
VOUT
VOUT
(7)
V
1
IN
Where ΔIL is the inductor ripple current.
fS C1
V
IN
V
IN
MP9159A Rev. 1.01
6/30/2016
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12
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
Selecting the Output Capacitor
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For the high-frequency switching
converter, a poor layout design can result in
poor line or load regulation and stability issues.
For best results, refer to Figure 3 and follow the
guidelines below:
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic
capacitors are recommended. Low ESR
capacitors are preferred to keep the output
voltage ripple low. The output voltage ripple can
be estimated using Equation (8):
1. Place the high current paths (GND, VIN,
and SW) very close to the device with
short, direct, and wide traces.
VOUT
VOUT
1
(8)
VOUT
1
R
ESR
fS L1
V
8 fS C2
IN
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
2. Place the input capacitor as close as
possible to VIN and GND.
3. Place the external feedback resistors
next to FB.
When using ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance. The output voltage ripple is
caused mainly by the capacitance. For
simplification, the output voltage ripple can be
estimated using Equation (9):
4. Keep the switching node (SW) short and
away from the feedback network.
OUT
R4
SW
L1
VOUT
8 fS2 L1 C2
VOUT
R3
(9)
ΔVOUT
1
VIN
V
IN
1
8
2
3
4
7
6
When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated with
Equation (10):
5
GND
C1A C1
Figure 3—Recommended PCB layout
Design Example
Table 2 shows a design example following the
VOUT
VOUT
(10)
ΔVOUT
1
RESR
fS L1
V
IN
application
guidelines
for
the
given
specifications:
The characteristics of the output capacitor
affect the stability of the regulation system.
Table 2—Design example
VIN
VOUT
fSW
5 V
1.2 V
1500 kHz
The detailed application schematic is shown in
Figure 4. The typical performance and circuit
waveforms have been shown in the “Typical
Performance Characteristics” section. For more
device applications, please refer to the related
evaluation board datasheets.
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
13
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
L1
VIN
VOUT
1 H
2.5V to 6V
1.2V/1A
SW
VIN
C1
10 F
OUT
C2
10 F
R1
200k
MP9159A
EN
PG
EN
PG
FB
R2
200k
AGND
PGND
Figure 4—Typical application circuit
L1
VIN
VOUT
0.56 H
5V to 6V
3V/ 1A
SW
VIN
C1
22 F
OUT
C2
22 F
R1
200k
MP9159A
EN
PG
EN
PG
FB
R2
49.9k
AGND PGND
Figure 5—Typical application circuit for higher efficiency at light load
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
14
MP9159A – 1 A, 6 V, 1.5 MHz SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSOT23-8
See note 7
EXAMPLE
TOP MARK
IAAAA
PIN 1 ID
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL''A''
FRONT VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER
FORMING) SHALL BE0.10 MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
DETAIL ''A''
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK
FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP9159A Rev. 1.01
6/30/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
15
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